Issue



Table of Contents

Solid State Technology

Year 2004
Issue 11

DEPARTMENTS

Editorial


Let's start down the road to nanotech

While recent industry roadmaps have shown many red brick walls ahead, mapmakers say they are confident that the industry will still be able to follow the track of Moore's Law for another 15 years.


World News


World News


Tech News


NEC cuts 65nm standby power by two orders of magnitude

NEC has cut standby current leakage at the 65nm node by 30–100× by using HfSiON as the high-k gate dielectric and a transistor structure optimized for Transmeta Corp.'s LongRun2 technology to dynamically adjust the body bias as well as the supply voltage.


Feol


Environmentally friendly wet cleans protect yields, bottom line

New global guidelines and semiconductor industry targets for protecting the environment are compelling chipmakers to consider options for waste/effluent treatment and reduction.


Tap


Parallel test techniques reduce test costs

The 1999 SIA roadmap predicted a transistor's cost-of-test (COT) would exceed its fabrication cost by 2012.


Product News


Product News


Perspectives


No cooling-off period for annealing

Solid State Technology asked industry experts to predict the future of thermal processing.


FEATURES

Mems


Precision thickness control in the ECES process

The electrochemical etch-stop (ECES) technique is a popular method for bulk micromachining of a p-n junction silicon wafer in microelectromechanical (MEMS) applications because it has the ability to fabricate microstructures and membranes with precise thickness control.


Cover Article


Advancing the standards for ultrahigh-purity fluoropolymer components

New wet processes for semiconductor manufacturing require higher standards for purity and improved design and materials for fluid system components.


Wafer Cleaning


Eliminating carbon and watermarks during post-CMP cleaning

The use of organosilicate glass (OSG) as a low-k dielectric in copper interconnects creates challenges in cleaning wafers after they have been through chemical mechanical planarization (CMP).


Materials


Engineered substrates require strain metrology

Innovative materials have emerged as an alternative to simple scaling for achieving improved device performance.


Vacuum Technology


Handling and filtration evaluation of a colloidal silica CMP slurry

Maintaining CMP slurry quality is critical for low defectivity in complex CMP processes.


Software


Middleware layers could lead to plug-and-play automation

The emergence of equipment data acquisition (EDA) standards, such as the new Interface A standard, opens up the possibility of plug-and-play manufacturing tools with greater levels of automation in semiconductor fabs.


ASIA-PACIFIC-SUPPLEMENT

Departments


News


Features


New synergy in the fabless arena: The Korea-India connection

The relationship between Korea and India has never been stronger, and it now encompasses the world of high technology.


Features


Asian TFT-LCD market drives manufacturing trends

Asia is the focal point of the thin-film transistor–liquid-crystal display (TFT-LCD) industry.


Features


Industry dynamics require a new look at risks and total cost

Equipment Buying in Japan Part One: Outsourcing


Features


Balancing risk and opportunity in the pre-owned equipment market

Equipment Buying in Japan Part Two: OEMs


Features


Consumer demands make for a sizzling imaging market in Japan

In the 1970s, Japanese IC manufacturers were trying to catch up to the US. In the 1980s, they took the lead and dominated DRAM while the US refocused on logic.