Issue

Basic research in the United States has long been the envy of the rest of the world.

Key metrics for enhanced MOSFET performance are increased speed, increased drain current at saturation (I_dsat), and reduced capacitance equivalent thickness (CET) in inversion [1].

For any well-defined gas-phase chemical or airborne molecular contamination (AMC) problem, sound filter media design and targeted performance expectations can make chemical filters part or all of an effective solution.

The continued drive of ULSI device scaling has produced circuits in which the interconnect signal delay exceeds the gate delay.

For leading-edge logic chips, the 2003 edition of the International Technology Roadmap for Semiconductors (ITRS) [1] projects continued rapid scaling in the physical gate length (L_g) and other transistor dimensions.

Defect detection is a rapidly moving technology that struggles to keep up with ITRS requirements.

Many of the frontend process challenges identified in the 2003 ITRS relate to the perception that continued CMOS scaling will require the introduction of new materials in the near term (2003–2007) and new device structures in the long term (2008–2018).

Comparing the new 2003 edition of ITRS Lithography Chapter with the year 2002 Update, it becomes apparent that the largest differences are related to the narrowing of potential solutions for near-term nodes and to the introduction of novel techniques for mid- and long-term nodes.

The 2003 edition of the International Technology Roadmap for Semiconductors (ITRS) continues to reflect a slower-than-projected rate of reduction in effective k value for MPUs and ASICs.

Emerging materials will augment silicon transistor technology by providing enhanced speed, lower power consumption, improved heat dissipation, or added RF/analog functionality while maintaining the large-scale integration capability of CMOS technology.

Solid State Technology asked ITRS leaders to highlight changes in the latest roadmap.