Issue



Table of Contents

Solid State Technology

Year 2003
Issue 5

DEPARTMENTS

Editorial


Big changes come with smaller features

Momentous changes are ahead for the structure and business models of the semiconductor and allied industries, suggested several speakers and panel discussions at the SPIE Microlithography Symposium recently.


World News


World News

February chip sales down 3.3%, orders up 6%


Tech News


Technology News

Process enhances spin-on low-k dielectric processing


Show Report


Innovation from small companies pervades Semicon Europa

Semicon Europa, held last month in Munich, Germany, was less crowded than usual, and many companies shared booths with others. The war in Iraq and global economic conditions tempered the usual hoopla, but plenty of technical innovation was on display.


Feol


SPIE Microlithography Report: LIL may bridge 157nm, EUV gap

Although there were mixed messages about an uncertain lithography future at the SPIE Microlithography Symposium in Santa Clara, CA, Feb. 23–28, it appears that immersion optics may save the day.


Interconnect


Near speed-of-light velocities for on-chip transmission of electrical signals

Using a design that takes advantage of the inductance-dominated, high-frequency regime of on-chip interconnect, comparable or better performance than proposed on-chip optical interconnects is possible without the additional associated manufacturing challenges of on-chip optics. The design is capable of transmitting data at velocities near the speed of light and offers a 5¥ improvement in delay over a conventional repeater-insertion strategy


Product News


Product News

Laser dicer won't damage ultra-thin wafers


Perspectives


SST editors ask industry experts about advanced wafer-cleaning evolution

Considering that wafer cleaning is crucial to virtually every wafer-processing step, Solid State Technology asked several industry process experts: How do you perceive conventional wet chemistry or nonliquid wafer-cleaning technology evolving to meet advanced requirements for interfaces and particle control?


People


People in the News

Nikon Precision Europe, Langen, Germany, has appointed Hiroshi Sano president. He has worked for Nikon since 1979, most recently at Nikon Precision Singapore Pte. Ltd., a subsidiary of Nikon Pre-cision Equipment Co.


FEATURES

Cover Article


Advantages and implementation of integrated after-develop inspection

In an industry moving rapidly to full automation, integrated metrology has been somewhat elusive. The combination of risks has kept its adoption at 2% or less.


Deposition


Progress and opportunities in atomic layer deposition

A new era in film deposition control in semiconductor technology is being ushered in with atomic layer deposition. Milestones include the extension of cylinder and deep trench DRAM capacitors <100nm using new dielectric materials.


Mems


Hard disk drive performance enhanced by MEMS devices

Microelectromechanical systems technology is a collection of miniature sensors and actuators that are fabricated using semiconductor-manufacturing techniques. MEMS have been used since the early 1990s in airbag sensors and ink-jet printer heads.


Automation Robotics


Defining, designing, and evaluating a 300mm test wafer stocker

Despite thoughts that a wafer fab's use of test wafers is becoming passé, test wafers are used today more than ever to qualify processing and contamination control. This means that the overhead of test wafer storage and handling can be a significant factor in any fab operation, particularly a 300mm fab.


Gas Flow And Handling


Principles and design issues of bulk specialty-gas systems

Over the past few years, various semiconductor manufacturers have ventured out to try bulk supply of specialty gases required for wafer processing.


Thermal Processing


Beyond the 100nm node: Single-wafer RTP

Key developments such as improved spike anneal temperature control, enhanced low-temperature processing capability, and a radical-based oxidation process are extending the capabilities of rapid thermal processing for applications such as ultra-shallow junction activation and anneal, silicidation, and shallow trench isolation liner oxide formation to meet projected industry roadmap requirements for sub-100nm device design nodes.


Stripping


An optimized process for dry stripping photomasks

Increasingly, new photoresists and novel polymer-rich plasma etch processes used in photomask manufacturing require that conventional wet stripping must be replaced with dry plasma-stripping techniques.