Issue

Making complex integrated circuits is the most demanding manufacturing task the world has ever known (outside the field of biology!).

Worldwide highlights; USA; Japan; Asia Pacific; Europe

Gas purification enables SiGe production; Industry Roadmap likely to be overtaken; Patterned phosphors enable electroluminescent display; and more.

Overflow audiences heard about the latest developments in semiconductor processing research at the Materials Research Society Spring Meeting in San Francisco at the end of April.

Falling in line with other extreme-UV lithography development programs, CEA, France's atomic energy agency, has embarked on its own EUV effort, with an initial goal of developing a test bench capable of exposing EUV resists.

Just 12 months ago, investing in a wafer fab in Asia was considered too risky. That's changed dramatically. Philips Semiconductors, Eindhoven, The Netherlands, is beefing up its Asia presence to address the surge in demand for communication and consumer ICs.

The chemical mechanical planarization (CMP) market is one of the fastest growing technology areas within the semiconductor process sector.

DUV step-and-scan tool; Wafer-transport robot; Compact solvent processor; and more.

Electronic chemicals web site; Flow sensor catalog; Specialty chemicals, metals, materials brochure; and more

onQ Technology, Austin, TX, has named Dick Neely VP of operations.

June to October 2000; industry events.

SOI wafers are gaining acceptance in the industry as the benefits they provide become more desired, and as the SOI suppliers increase capacity and reduce costs. The epitaxial SOI wafer process described here includes a hydrogen annealing process that creates an atomically smooth epitaxial layer, and a water jet splitting process that allows the reuse of the seed wafer.

A new segregated hydrofluoroether under development has a global warming potential <3% that of comparable perfluorocarbon fluids. With a boiling point of 128°C, this fluid is well suited for use in ion implanters, steppers, etchers, plasma-aided tools, and automated testers.

Rotated nonconcentric matching of advanced lithography tools to an installed base of older tools is emerging as a viable technique for production wafer fabs. The technique involves use of common matching reticles and golden standard wafers.

Shallow trench chemical mechanical planarization is often the most difficult aspect of the shallow trench isolation module. This article discusses the use of fixed abrasive technology and compares the results to conventional and high-selectivity slurry processes.

A theoretical model has been developed for chemical mechanical planarization of copper damascene based on the multistep, multislurry process platform.

To meet growing requirements for agile fab management, tomorrow's factory control solutions must extend well beyond traditional manufacturing execution systems. They must be proactive, powerful, adaptable, extensible, and automated, with a tighter integration of equipment and information.

The evolution of sensor and actuator bus networks in the semiconductor industry and their emerging adoption into 300mm process tools will bring a new level of overall equipment effectiveness in semiconductor manufacturing.

While standardization is a splendid idea, pressure to adopt SSQA in total can be counterproductive; it needs to be tempered.

The corona oxide semiconductor method can be used to determine and quantify different processes of generation-recombination in the epitaxy layers on silicon, also accounting for the effect of the substrate.

Epitaxial deposition of silicon is widely applied in the fabrication of linear and mixed signal ICs. However, the ability to align to wafers after epitaxial-layer growth and overlay performance has always been a challenge.

Implementation of an on-line dispatch system onto the wafer fab floor increases production visibility of line balance and schedule adherence, and helps fab management make the sequence of decisions that improve cycle time and eventually on-time delivery.

Crucial to the continued success of DUV lithography, particularly for low k1 processes, there is a new class of defects that can significantly impact mask performance and semiconductor chip manufacturing yields.

New techniques using scanning probe technology are enabling circuit designers to break the optical barrier to internal node probing.

Burgeoning water use and wastewater generation impose a chilling effect upon current and anticipated semiconductor industry growth. Traditional waste treatment is costly and cannot meet escalating demands.

The effects of electrostatic attraction and its role in contamination control will likely be a greater concern with 300mm, even in Class 1 cleanrooms; if this potential problem is not properly considered, a fab could experience, for example, a 20% increase in particles/wafer pass on all tools.

SEMICON WEST 2000 Preview