Issue



Table of Contents

Solid State Technology

Year 2000
Issue 4

FEATURES

Implantation


Ion Implantation: An improved secondary electron flood helps control ion implant charge

The accumulation of surface charges on electrically insulating layers during ion implantation affects the yield of charge-sensitive devices. Experiments with a typical secondary electron flood system and refinements to it demonstrate that improvements can be made over some common secondary electron flood systems currently in use.


Packaging Assembly


Packaging/Assembly: Copper: Emerging material for wire bond assembly

Copper is being re-evaluated as a material for wire bonding because of the emergence of copper metallization on wafers. This work describes the current status of copper wire bonding, including the need for special processes to address the metallurgical challenges created by the new systems.


Materials


Materials: A low-temperature solution for silicon nitride deposition

BTBAS (bis(tertiary-butylamino)silane) is a nonchlorine precursor able to deposit device-quality silicon nitride at a temperature 200°C below that of the conventional LPCVD process with dichlorosilane and ammonia. The low-temperature BTBAS process is well suited for temperature-sensitive front-end applications.


Industry Insights


Fixing US intellectual property laws

For most of the last 200 years, America's patent law was the best in the world. Yet that law was written when the world was a very different place. In the last two decades, collapsing barriers to trade and communication, and aggressive new legal tactics have often put American inventors at a disadvantage compared to their foreign competitors.


Metrology Test


Metrology: Requirements for dual-damascene Cu-linewidth resistivity measurements

Understanding the complexities associated with copper linewidth electrical measurements, which are not as straightforward as those with aluminum, provides a viable means of metrology for dual damascene processing. The complexities of this method come from the required sidewall barrier. A sequence of resistance measurements on four different lines combined with a set of capacitance measurements, all done with adequately specified instrumentation, provides the solution.


DEPARTMENTS

Editorial


Keeping ahead of the curve

Long ago in my Navy days, our task force would maintain radio silence during fleet operations while following a random zig-zag course.


World News


World News

Worldwide highlights; USA; Japan; Asia Pacific; and Europe.


Tech News


Technology News

Roadmap-caliber BiCMOS from TI; Plasma doping progress; 50nm gates via optical lithography, OPC advances; Sub-100nm features with conformable contact photolithography


Eurofocus


EuroFocus

SC300 consortium experiments with single monitor wafer; Infineon launches IPO; Metron Technology buys Shieldcare


Asia Pacific


Asia's silicon foundries flourish

There was a time when silicon foundries were fabs for fabless IC manufacturers, and functioned as the semiconductor industry's extra capacity, and even as low-tech centers for mass production, typically in Asian countries.


Market Watch


Predicting the market in low-k dielectrics

The path hasn't been easy, but there is little doubt that the market for low-k dielectrics is poised for take-off. Given low-k's embryonic nature, however, forecasting is subject to uncertainty.


People


People

Hyundai Electronics Industries Co. Ltd., San Jose, CA, has appointed Chong Sup Park president and CEO. A founding member of the company, he was previously chairman of Hyundai Electronics America...


Literature


Literature

Chemicals and services brochure; Thermal system components brochure; Wafer-level backside inspection note


Product News


Product News

300mm single-wafer handling; Step-and-repeat exposure system; Single-wafer spin processor; CVD system for flat panel displays; and more.