Issue



Table of Contents

Solid State Technology

Year 2000
Issue 3

DEPARTMENTS

Editorial


Fab Trends: Are Europe and Asia leading the way?

Not too long ago, most semiconductor fabricating plants made a family of standard chips or discretes.


World News


World News

Worldwide Highlights; USA; Japan; Asia Pacific; and Europe


Tech News


Technology News

Lithography's nemesis exposed; Practical in situ FTIR for CVD yields revised TEOS-O3 model; Powerful simulation yields perovskite transistors; Low noise microchannels developed; Sub-0.1-µm filtration for 248nm resists; and Tech Briefs


Literature


New Literature

Cleanroom material brochure; CD-ROM metals and materials catalog; Online vacuum components catalog; and Vacuum e-business site


Product News


Product News

SEM with 3-D imaging; Coat/develop cluster system; Surface topography measurement; Spray etch processor; and more.


Eurofocus


EuroFocus

European boom led by telecom, automotive, smart cards; 1000+ exhibitors expected at Europa; Smart card market zooms


Market Watch


Market Watch: European market roundup: Continued growth predicted through 2001

After maintaining relative stability in the face of the 1996-1998 IC industry downturn, the European market grew to $28.2 billion in 1999, a 10% increase over 1998's $25.5 billion in revenue.


FEATURES

Gas Handling


Gas flow & handling: Requirements for next-generation gas-flow components

Working down from anticipated device trends over the next five years to deposition and etch process needs, we can derive a comprehensive list of specification advances needed for mass flow control and other gas components.


Lithography


Lithography: The challenges in materials design for 157nm photoresists

Developing 157nm lithography capability in time for production requires the solution to several daunting materials challenges.


Industry Insights


System-on-a-chip: What industry needs to do

The integration of system functions and even entire systems onto a single chip is now feasible.


Cmp


CMP: Spin-etch planarization for dual damascene interconnect structures

Dielectric erosion is an existing issue for copper damascene chemical mechanical planarization even when hard dielectric materials such as dense SiO2 are used.


Deposition


Deposition: Pentacene organic thin-film transistors and ICs

Using the organic semiconductor pentacene as the active material, we have fabricated high-performance organic thin-film transistors and the fastest ICs using organic transistors reported to date.


Advanced Rampd Cmos How


Advanced R&D: CMOS: How far can it go?

European research into the limits of CMOS technology, which comes from the demand for low voltage, low power and high performance, stems from strong cooperation between device and materials efforts.


Metrology Test


Metrology: EFTEM provides elemental mapping at nanometer resolution

Energy-filtering transmission electron microscopy is becoming an important nanoanalysis technique in materials science. Its main advantage comes from the two-dimensional chemical information or "elemental maps" at nanometer resolution extracted quickly from large sample areas.