Issue

The complexity of semiconductor manufacturing and its wealth of data provide an ideal environment for the application of data mining to discover patterns of behavior leading to knowledge.

While a wafer backside and back edge can be hermetically sealed and protected from copper contamination during electroplating, the front-side exclusion zone and beveled edge are still vulnerable because clamping during electroplating is not a totally effective mask.

Who has better die yields, semiconductor companies that focus on particulate contamination or those that focus on process control and reproducibility?

Hot-wall batch vertical furnaces continue to provide temperature control, cost of ownership, and process variety advantages compared to single-wafer tools for wafer processing.

THIRD IN A SERIES: High-quality plastic package molding systems can be optimized with computer-aided engineering software tools. These tools have made possible the design of a mold gate-and-runner system, in this case for a QFP100L package with a leading-edge 50?m pad pitch, which provides balanced encapsulant flow to minimize wire sweep during the molding process.

Software has long been a step-child of semiconductor fabrication. Toolmakers often tack on proprietary programs to help customers operate their tools and gather process data.

If there were lingering doubts that a recovery in the semiconductor industry was underway, the upbeat mood at Semicon Taiwan '99 would have dispelled them.

Linear bearings catalog; 1999-2000 photoelectric sensor catalog; Gas measurement brochure; Circuit assembly brochure; Contact sense probe guide; Equipment handling/automated assembly systems web site; On-line gas and equipment catalog

Worldwide highlights; USA; Asia/Pacific; Japan; Europe; Rest of World

Dover Instrument Corp., Westborough, MA, has appointed Michael Townsend president and COO. Townsend joined Dover in 1992, and was most recently VP of sales, marketing, and customer support. He replaces Stephen Hero who will remain as CEO...

BACUS meets in Monterery; Intel to use phase-shift in pursuit of 130nm node; CMP being applied to 5-layer MEMS technology; ISSSDM speakers discuss interconnects, Japan, and collaboration; Bell Labs' Cochran outlines device challenges, hot topics; Two-layer copper for SDRAM

Dielectric etch system; Multichip bonder; Next-g eneration RTP; Compound semiconductor metrology, and more.

PicoPolish to move to Switzerland; IMEC's success with DOW's SiLK; Steag Electronic Systems; AIXTRON AG; STM Microelectronics

The total available market (TAM) for wafer cleaning is experiencing rapid growth due to a number of industry factors. In 1998, the TAM for wafer-cleaning capital equipment was greater than $1.0 billion and is projected to be more than $2.6 billion by 2003*.

Sony has implemented a new single-wafer spin cleaning technique that alternately cycles between ozonized water and dilute HF at room temperature.