FEATURES
Etch Moving atomic layer etch from lab to fab
A new plasma-enhanced atomic layer etch method delivers atomic-level etch precision with process times that are practical for use in a manufacturing environment.
FinFETs FinFET evolution for the 7nm and 5nm CMOS technology nodes
In addition to extending the fin-based design investments, augmenting the FinFET for improved performance allows an evolution of the process infrastructure for a few more nodes.
Power Electronics Advances in back-side via etching of SiC for GaN
The development of an 85?m diameter, 100?m deep SiC back-side via etch process for production is described.
Inspection Applying leading-edge non-visual defect inspection to a mainstream 200mm fab
Improving economic competitiveness through cost reduction, cycle time improvement and more eco-friendly processing.
3D Integration A bilayer temporary bonding solution for 3D-IC TSV fabrication
New technology eliminates the need for specialized equipment for wafer pre- or post-treatment.
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