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Industry experts answer questions about the new standard in a virtual roundtable.

In recent years, energy consumption has decreased due to several innovations that have helped to improve the energy efficiency of process tools and sub-fab equipment, but an increase in the number of processes and the growing complexity of processing at the current node has resulted in a spike in energy consumption in the fab. Approximately 43% of the energy consumed in the fab is due to the processing equipment and, of this, 20% is vacuum and abatement (8% overall).

A new standard from SEMI, E175, defines energy saving modes, which combined with the EtherCAT signaling standard, can help fabs save energy and other gas/utility costs when the tool is not processing and with no impact on subsequent wafer processing.

EtherCAT, based on industrial Ethernet, provides high- speed control and monitoring. It is the communication standard of choice for the latest semiconductor tool controllers to connect to sensors and actuators around the tool, including vacuum and abatement systems.

SEMI E175 defines how process tools communicate with sub-fab equipment, such as vacuum pumps and gas abatement systems, to reduce utility consumption at times when wafers are not being processed by the tool, and returning to full performance when the tool is again required to process wafers. It builds on SEMI E167, which defines communication between the fab host/ WIP controller and the process tools for the purpose of utility saving.

Collaboration between the E175 and EtherCAT groups has seen a harmonization of the communication standards to provide co-ordinated energy saving across devices in the fab.
We invited experts in this area to answer a few questions in a virtual roundtable. The participants are:

• GERALD SHELLEY, Senior Product Manager Communication and Control at Edwards, and the EtherCAT Chair Abatement / Roughing pump working groups, E175 task force.

• MIKE CZERNIAK, Environmental Solutions Business Development Manager at Edwardsm Co-Chair of SEMI International Standards E167 & E175, and campaigner for energy saving

• GINO CRISPIERI, Applied Materials – Past Co-chair of E175 (originally SEMATECH/ISMI, then independent consultant, prior to Applied Materials)

• MARTIN ROSTAN, Executive Director, EtherCAT Technology Group

Q: Please explain what drove the standards work on energy saving and the achievements to date.

SHELLEY: There is increased pressure on the industry to reduce energy and utility saving from both a cost and environmental standpoint. Subfab equipment is a major consumer of utilities, which is wasted when a tool is not in use. Different manufacturers have implemented energy saving solutions, with minimal direct connection to the tool. However, direct tool connection has emerged as the best way to maximize saving without any risk to wafer processing.

CZERNIAK: This work originated in the ISMI part of SEMATECH as a follow-on to generic work aimed at reducing the overall utilities footprint of modern fabs. In response to this and requests from customers, Edwards developed vacuum pumps and gas abatement systems that had energy-saving functionality. However, it soon became clear that the limitation to implementing such savings was the absence of standardised signalling between the process tool and sub-fab equipment.

CRISPIERI: A SEMATECH project around 2009 started to look into opportunities for saving energy in the semiconductor factories. At that time, suppliers of pumps and abatement systems already had started initiatives to provide their own solutions to the initiative. Since that time, the industry has adopted two new standards: SEMI E167 Specification for Equipment Energy Saving Mode Communication (between factory and semicon- ductor equipment) and SEMI E175 Specification for Subsystem Energy Saving Mode Communication (between semiconductor equipment and subsystems).

Q: Please describe how the energy saving task force was born and why you decided to get involved.

CRISPIERI: Back in 2009 while working for SEMATECH in Austin, Texas, prior to SEMATECH’s move the New York, Thomas Huang an assignee for GlobalFoundries to the EHS Program approached and asked me if I would be interested in helping him drive a standard for equipment suppliers to enable their equipment to save energy during idle times. Because of my previous experience working with equipment suppliers and developing standards for equipment and factory communication, I accepted to chair a task force to drive the equipment supplier’s new capability requirement into a standard. At first, we thought it would be an easy task and that everyone would jump to help create and approve the standard in a short amount of time because of its benefits. A two phase approach was defined to drive the standardization process and engage semiconductor and sub-fab equipment suppliers accordingly. It took almost three years to complete the Phase I (2013) and another three to complete the Phase II (2016) standards.

SHELLEY: The task force was an extension of E167 which previously defined the communication into the tool from the supervisory systems, however to achieve maximum benefit signalling to tool subsystems was key and the E175 task force was the result.

CZERNIAK: Following-on from the above, the ISMI working group became a SEMI Standards Task Force and began work at developing a standard, initially for Host to process tool (E167) and then from tool to sub-fab (E175), which I was co-chair for to ensure continuity and clear the signalling “roadblock”.

Q: How have suppliers collaborated on E175?

CRISPIERI: Compared with the suppliers who partic- ipated in SEMI E167 development, the suppliers involved in the development and approval of SEMI E175 were more committed to make it happen and helped drive the standardization process to conclusion much more efficiently. Edwards, AMAT, TEL, Hitachi- Kokusai and DAS-Europe regularly participated and provided inputs to standardize behavior and require- ments for their own equipment. We run into some difficulty getting aligned with other standard activities that were driven by SEMI’s EHS Committee because their changes affected our standardization process. I must note that the overall participation was excellent in particular from Edwards Vacuum and AMAT.

ROSTAN: Within the ETG Semiconductor Technical Working Group individual task groups already had multiple suppliers collaborating on the detail of the EtherCAT profiles for all devices, with technical support from the EtherCAT Technical Group. We were fortunate to have a delegate from Edwards in both the Semi E175 Task Force and key EtherCAT Task Groups to informally broker agreement between the teams.

SHELLEY: The suppliers were able to use their collective experience to work through a number of options to find the optimum way of controlling subfab equipment, tackling variability in wakeup time and control architec- tures between device types and equipment technology.

CZERNIAK: Suppliers, automation providers, tool OEMs and end-users have all collaborated to help develop a standard that works for everyone and aligns with earlier standards like S23.

Q: How was the EtherCAT collaboration beneficial to E175?

SHELLEY: By sharing information and understanding in real time we demonstrated the E175 concept is achievable using the favored protocol for new tool platforms and defined how it would be implemented. We co-operated to take both these standards to alignment in one simul- taneous step, saving considerable committee time on both sides that would have been necessary to resolve any divergence of the detail.

ROSTAN: By devising the implementation of E175 in parallel the EtherCAT Task Groups involved were able to feedback detailed technical proposals and show the E175 standard could be implemented relatively easily within the existing EtherCAT standards.

CRISPIERI: Participation and collaboration from the EtherCAT Working Group was critical to accelerate the implementation and adoption of the standard. Dry Contacts and EtherCAT communication protocol messages were added to two Related Information sections and included in the SEMI E175 standard at the time of its publication.

CZERNIAK: This enables a “richer” signalling environment than simple dry contacts (which are also supported) that enables even greater utility savings to be made.

Q: How has EtherCAT been able to support the require- ments of the tool and Semi E175?

CZERNIACK: By providing timing information; the longer the time the tool is inactive, the greater the savings possible.

ROSTAN: As the control network of choice for the latest semiconductor tools, EtherCAT has been ideally placed to support enhancements, such as the energy saving connectivity increasingly being requested by the fabs. In particular, it was good to see the Pump and Abatement Task Groups of the existing Semiconductor Technical Working Group formulate an E175 compliant solution within the timescales of the second release of the EtherCAT semiconductor device profiles. The EtherCAT Technology Group was also more than happy to support the publication of extracts of the EtherCAT standards being used as protocol examples in the Imple- mentation guidelines of the Semi E175 document.

SHELLEY: EtherCAT has the fast / deterministic connec- tivity and proven integration with tool controllers that allows E175 functionality to be easily added without any loss of performance. By including the requirements of Semi E175 in the EtherCAT standards, both equipment suppliers and tool vendors can establish energy saving communication quickly and easily.

CRISPIERI: The coordination between EtherCAT Working Group and the SEMI ESEC task force group was conducted by Mr. Gerald Shelley from Edwards Vacuum. With his help and leadership, we reached effortlessly agreement and acceptance for the required messages, parameters and values into the EtherCAT respective Pump and Abatement Profile documents. Havingworking usage scenarios and support from the EtherCAT Working Group has been invaluable.

Q: Why is energy saving important to the industry?

ROSTAN: In the industrial world, EtherCAT users are increasingly using our communication and control technologies to drive down energy consumption. The semiconductor industry operates in parts of the world where energy is a limited and expensive resource, whilst the latest wafer processing requires more power. The manufacturers are therefore in great need for energy saving opportunities, such as when the tool subsystems are not in use.

SHELLEY: The fabs are being squeezed by an increase in the complexity and number of processes involved in manufacturing a wafer, driving consumption up and increasing scarcity of energy supply. This is further compli- cated with associated cost and government pressure to “keep the lights on”.

CRISPIERI: It is not hard to see why is so important for device makers or the semiconductor manufacturing industry to adopt and require energy conservation capabilities in their factories. Energy consumed by many equipment components and support systems, such as pumps and abatement systems, never stop from running even when the equipment is idle and waiting for product to be delivered for processing. These components and support systems can save millions of dollars each year if their power consumption is reduced. This energy consumption reduction extends their life cycle thus reducing costs of maintenance and parts replacement. Any effort to reduce energy consumption helps lower costs and adds gains to not only the manufacturer but to those who have to generate the energy for consumption.

CZERNIACK: Cost reduction is always important, but electrical supply is limited in some areas.

TechInsights analysts share their view on where technology is going, how it’s changing, and what new developments are emerging.

BY STACEY WEGNER, JEONGDONG CHOE and RAY FONTAINE, TechInsights, Ottawa, ON

In 2016, wearables were extremely interesting mainly because there was so much uncertainty around whether or not the market will be viable. The year saw some truly low-cost smart and fitness devices, and some market surprises like Fitbit buying Pebble. The Apple Watch 2 was an improvement over the Watch 1. However, the Huawei watch is remarkably designed with a nice round face, and functional, making the decision on which smart- watch to buy difficult.

While wearables will remain intriguing, even more interesting to watch is the wearables market. Hearables can be as simple as ear buds and basic hearing aids or as complex as devices that correct and amplify sound, sync with wireless devices for virtually any application, and even measure biometric outputs. That’s just the beginning. New sensors being packed into small devices are bringing us devices with nearly 30 sensors per device.

Our recent AirPod teardown (FIGURES 1 and 2) sheds even more light on what’s happening in this area. The W1 chip found in the Beats Studio wireless headphone has the package mark 343S00131. Meanwhile, the W1 chip torn down from the Apple AirPods has the package mark 343S00130. They have a slight difference in the last digit in the package marks. TechInsights has confirmed that both 343S00131 and 343S00130 have the same die. This die measures 4.42 mm x 3.23 mm = 14.3 mm2 . TechInsights has been tracking Internet of Things (IoT) SoCs for over a year and our observations indicate that this new W1 SoC is very competitively placed when comparing its die size and connectivity specification of Bluetooth 4.2 or greater.

Screen Shot 2017-06-19 at 12.59.17 PM

Another extremely interesting technology to watch is the rise of intelligent personal or family assistants. This market started with the introduction of the popular Alexa and Echo. Sony may release their assistant this year with more sure to follow. As far as timing, we will have to wait and see. One issue that needs to be addressed is data collection and usage vs. persona privacy in a manner similar to Vizio’s issues with the FTC. In addition, more changes are coming for artificial intelligence or assistants on mobile devices with Samsung announcing Bixby ahead of its G8 launch.
Of course there are a slew of IoT technologies to watch like the acceptance of Zigbee, Z-Wave, LoRa, and Bluetooth 5.0, all of which seem to be vying aggressively for consumer IoT/connected home market. Rumors are gaining strength around how the Samsung S8 will have Bluetooth 5, which could mean a new WiFi modem, from whom we are not certain. Samsung and Wisol have been aligned for a while, but it would be a big statement to see a Samsung/Wisol WiFi/ Bluetooth modem design supporting a new technology like Bluetooth 5.0 in a flagship phone. Based on our knowledge of the Bluetooth Special Interest Group, we don’t believe that Bluetooth 5.0 has to be declared for a product. If fact, it would almost seem as if the SiG is asking OEMs to not make a declaration of the Bluetooth 5 in the device.

Image sensors

2016 was an exciting year for smartphone cameras, which should be considered as one of the biggest hardware differentiators between mobile handset platforms. Dual camera systems have reached the mainstream and are forecasted to drive growth for CMOS image sensor IDMs and foundries. Samsung introduced full chip Dual Pixels implemented in chips from its team and from Sony. Each Dual Pixel photosite is available as an autofocus (AF) point, and this complements traditional contrast AF methods and the emerging laser + time-of-flight (ToF) systems.

In 2017, ToF is expected to be a key differentiator in mobile platforms, both for AF and for new 3D/ranging functionality. Sony has introduced first generation direct bond interconnect (DBI) as a through silicon via (TSV) replacement and we expect tighter pitch DBI and eventually full chip active DBI going forward. On the image signal processor (ISP) side we are seeing a big push to lower nodes (28 nm ISPs are the state-of-the-art for high end stacked CIS chips). The flexibility offered by chip stacking should lead to new and disruptive partnerships between CMOS image sensor specialists and mixed signal advanced CMOS specialists. Finally, we expect new entrants to the digital imaging and sensing landscape. Machine vision, robotics, ranging, surveillance/security, and automotive vision and sensing applications are all positioned for growth due to enabling functionality and continued performance gains. It’s certainly an exciting time for all involved in designing and fabricating imaging and sensing pixel arrays and camera systems!

Memory devices

Last year virtually every vendor, device manufacturers, R&D engineer and market analyst we talked to was focused on DRAM and NAND technology roadmaps. We still talk to clients today who are focused on the future of these technologies. Today, 32L and 48L 3D NAND products are common and all the NAND players are eager to develop the next generation 3D NAND products such as 64L and 128L or even more (FIGURE 3). TechInsights has been analyzing and comparing these devices regularly. We found that 3D NAND is a kind of revolution for memory devices, and because of it, big data or data center, SSD/SD and related technologies like controller, interface and board/package, are moving forward. In addition, they may be able to keep pace for more than the next five years until any new emerging memory devices are commercialized.

Screen Shot 2017-06-19 at 12.59.25 PM

The memory products/technologies we are anticipating this year are 3D NAND technology with 64L, 72L and 128L and 1x and 1y nm DRAM technology. As always, 3D NAND technology is competitive with emerging memory including X-point memory regarding on the performance, reliability, retention, process integration and cost since X-point memory and crossbar devices such as ReRAM, CBRAM, MRAM and PCRAM are likely not cost effective (bit cost).

While Samsung has already revealed 1x nm DRAM, in 2017, we believe there will be another big area of competition in DRAM technology (FIGURE 4). DRAM cell has 1T1C architecture with a cylindrical capacitor, however, nowadays, the cell capacitance cannot meet the capacitance spec (20fF/ cell). Commercial DRAM products such as Samsung’s 18nm DRAM have just about 12fF/cell. With smaller cell nodes, it is absolutely harder to get the sufficient cell capacitance. Nevertheless, Samsung and SK-hynix are confident in developing n+1 (1y nm) and n+2 (1z nm). We anticipate that in 2017, every DRAM maker will be developing 1x and 1y nm commercial DRAM products. How these rollout and perform remains to be seen.

Screen Shot 2017-06-19 at 12.59.35 PM Screen Shot 2017-06-19 at 12.59.42 PM

Finally, we are anticipating a commercial product using X-point memory from Micron and Intel.

Conclusion

These represent some of the major technologies we have our eye on this year, although we fully anticipate seeing new technologies we can only imagine today emerge. After all, change is truly the only constant in our world. As our analysts continue to examine and reveal the innovations other can’t inside advanced technology, we will continue to share our findings on the technologies noted above, how they are used, and how they will be changed by the next discovery or invention.

Yole Développement (Yole) confirms the consolidation of the advanced packaging industry, that is showing a steady growth between 2016 and 2022: +7% in revenue.

“Advanced packaging is showing a total revenue CAGR higher than the total packaging industry (3-4%), semiconductor industry (4-5%) and generally the global electronics industry (3-4%)”, comments Andrej Ivankovic, Technology & Market Analyst at Yole. “Companies are today managing production costs and enlarging their portfolio. In parallel, advanced packaging players are expanding their activities toward the emerging markets thanks to mergers & acquisitions,” he adds. Therefore, the advanced packaging industry is showing drivers including IoT, automotive industry, 5G connectivity, AR/VR, AI.

advanced packaging revenue

What are the advanced packaging market drivers and latest market dynamics? What are the emerging market segments targeted by the leaders to diversify their activities? What are the technology moves? How will the advanced packaging market affect the semiconductor industry evolution? Advanced packaging solutions could enable the development of future semiconductor products and so boost the global semiconductor industry.

Yole’s advanced packaging team releases this month its Status of the Advanced Packaging Industry report. Under this 2017 edition, analysts propose an overview the industry, its disruptions and opportunities. They analyze the latest technology trends and forecasts. Yole’s team also reviews the supply chain and offers a detailed description and analysis of leading company strategies, especially the shifting business models. Yole’s report includes a technical roadmap, showing an analysis per advanced packaging platform along with an analysis of future production and developments in the timeframe 2017-2022.

Andrej Ivankovic from Yole, author of this technology & market report, will present a closer look at the ASE Tech Forum @ Nijmegen. ASE’s conference takes place on June 28, in Van der Valk Hotel, Nijmegen, The Netherlands. During one day, ASE invites you to explore key areas of its IC , SiP and MEMS packaging portfolio, developed in alignment with emerging applications. Innovative technologies, such as FO , FC and 3D, will be detailed as well as opportunities of collaboration: Full program & registration.

“We are very pleased to welcome our network at the ASE Tech Forum @ Nijmegen on June 28”, asserts Jean-Marc Yannou, Technical Director at ASE Europe. ASE is developing a unique one-day program to present our innovative portfolio and including networking times and technology demonstrations. We are looking forward to welcome the advanced packaging companies and get relevant discussions and debates”.

“The fastest growing advanced packaging platform is FO with 36% followed by 2.5D/3D TSV with 28%”,announces Andrej Ivankovic from Yole. “Therefore FO platforms and 2.5D/3D TSV solutions are expected to exceed respectively US$3 billion and US$ 1.3 billion by 2022.”

The FC platform is by far the largest, accounting for 81% of advanced packaging revenue with US$19.6 billion in 2017, however a lower 5% revenue growth indicates that penetration of primarily FO packages will decrease FC market share to 74% by 2022. The revenue forecast translates to an advanced packaging wafer forecast of 8% and a 9% unit count, CAGR during the period 2016-2022. Advanced packages will continue to dominantly address high-end logic and memory in computing and telecom, with further penetration in analog and RF in high-end consumer/mobile segments, while eyeing opportunities in growing automotive and industrial segments.

The shifts in the semiconductor supply chain are results of preparations for future uncertainty, and search for other value flows. Several mergers and acquisitions have been made in attempt to offer a more complete and diversified portfolio, while keeping control of costs and potential losses. Furthermore, in search of additional revenue, new business models are appearing or expanding.

IC Insights recently released its Update to its 2017 IC Market Drivers Report.  The Update includes IC Insights’ latest outlooks on the smartphone, automotive, PC/tablet and Internet of Things markets.

In the Update, IC Insights scaled back its total semiconductor sales forecast for system functions related to the Internet of Things in 2020 by about $920 million, mostly because of lower revenue projections for connected cities applications (such as smart electric meters and infrastructure supported by government budgets).  The updated forecast still shows total 2017 sales of IoT semiconductors rising about 16.2% to $21.3 billion (with final revenues in 2016 being slightly lowered to $18.3 billion from the previous estimate of $18.4 billion), but the expected compound annual growth rate between 2015 and 2020 has been reduced to 14.9% versus the CAGR of 15.6% in IC Insights’ original projection from December 2016. Total semiconductor sales for IoT system functions are now expected to reach $31.1 billion in 2020 (Figure 1) versus the previous projection of $32.0 billion in the final year of the forecast.

Figure 1

Figure 1

IC Insights’ revised outlook for IoT semiconductor sales by end-use market categories shows that semiconductor revenues for connected cities applications are projected to grow by a CAGR of 8.9% between 2015 and 2020 (down from 9.7% in IC Insights’ original forecast).  Meanwhile, the IoT semiconductor market for wearable systems is expected to show a CAGR of 17.1% (versus 18.8% in the previous projection).  The lower growth projection in chip sales for connected cities systems is a result of anticipated belt tightening in government spending around the world and the slowing of smart meter installations now that the initial wave of deployments has ended in many countries.  Slower growth in semiconductor sales for wearable systems is primarily related to IC Insights’ reduced forecast for smartwatch shipments through 2020.

The updated outlook nudges up semiconductor growth in the industrial Internet category to a CAGR of 24.1% (compared to 24.0% in the December 2016 forecast) and slightly lowers the annual rate of increase in connected homes and connected vehicles to CAGRs of 21.3% and 32.9%, respectively (from 22.7% and 33.1% in the original 2017 report).

The latest update to the World Fab Forecast report, published on May 31, 2017 by SEMI, reveals record spending for fab construction and fab equipment. Korea, Taiwan, and China all see large investments, and spending in Europe will also increase significantly. In 2017, over US$49 billion will be spent on equipment alone, a record for the semiconductor industry.  Spending on new fab construction is projected to reach over $8 billion, the second largest year on record.  Records will shatter again in 2018, when equipment spending will pass $54 billion, and new fab construction spending is forecast at an all-time high of $10 billion. See Figure.

Figure 1

Figure 1

SEMI reports that these unprecedented high numbers are not only driven by a handful of well-known, established companies, but also by several new Chinese companies entering the scene with large budgets. An increase in overall fab spending (construction and equipment together) of 54 percent year-over-year (YoY) in China is expected.  Total spending rises from $3.5 billion in 2016 to $5.4 billion in 2017, and then to $8.6 billion in 2018, another 60 percent year-over-year (YoY).

Some of these China-based companies are well known, such as Hua Li Microelectronics or SMIC (top investors in 2017 and 2018), though newcomers in the arena, including Yangtze Memory Technology, Fujian Jin Hua Semiconductor, Tsinghua Unigroup, Tacoma Semiconductor, and Hefei Chang Xin Memory, add to the spending surge.

The SEMI World Fab Forecast breaks down fab equipment spending by region. Korea leads both years of our forecast period, with spending of $14.6 billion in 2017 and $15.1 billion in 2018.  In 2017, Taiwan is projected to be the second largest spending region on equipment, but China will take over second place in 2018 as it equips the many new fabs being built in 2016 and 2017.  Americas is in fourth place, projected to spend $5.2 billion in 2017 and $5.5 billion in 2018.  Japan will come in fifth, spending $5.1 billion in 2017 and $5.3 billion in 2018.  Although the Europe/Mideast region is in sixth place with relatively modest investments of $3.8 billion in 2017, this represents remarkable growth for the region, 71 percent more than in 2016; and the region will bump spending another 20 percent in 2018 (to $4.6 billion).

This exciting growth cycle could continue well beyond 2018.  Record fab construction spending of $10 billion for 2018 means new fabs will need to be equipped at least a year down the road, leading to high expectations for good business beyond the current two-year forecast period.

Since the last publication on February 28, the SEMI Industry Research & Statistics team has made 279 changes on 244 facilities/lines. In that time frame, 24 new facilities were added and 4 fab projects were closed.

For insight into semiconductor manufacturing in 2017 and 2018 with details about capex for construction projects, fab equipping, technology levels, and products, visit the SEMI Fab Database webpage and order the SEMI World Fab Forecast Report. The report, in Excel format, tracks spending and capacities for over 1,100 facilities including over 60 future facilities, across industry segments from Analog, Power, Logic, MPU, Memory, and Foundry to MEMS and LEDs facilities.

Electronic systems that improve vehicle performance; that add comfort and convenience; and that warn, detect, and take corrective measures to keep drivers safe and alert are being added to new cars each year. Consumer demand and government mandates for many of these new systems, along with rising prices for many IC components within them, are expected to raise the automotive IC market 22% this year to a new record high of $28.0 billion (Figure 1).

Over the past several years, the global automotive IC market has experienced some extraordinary swings in growth.  After increasing 11.5% in 2014, the automotive IC market declined 2.5% in 2015, but then rebounded with solid 10.8% growth in 2016.  It is worth noting that the sales decline experienced in 2015 was primarily the result of falling ASPs across all the key automotive IC product categories—microcontrollers, analog ICs, DRAM, flash, and general- and special-purpose logic ICs, which offset steady unit growth for automotive ICs that year.

Figure 1

Figure 1

However, in the second half of 2016, steadily rising ASPs (along with demand for the new automotive systems) helped return the automotive IC market to double-digit growth. In 2017, exceptionally strongincreases in DRAM and flash memory prices are expected to help drive the total automotive IC market to an extraordinary increase of 22.4%.

IC Insights recently revised its IC market outlook for 2017 and now shows DRAM average selling prices rising 50% in 2017, NAND flash ASPs increasing 28%, and the average selling price for automotive special-purpose logic devices increasing 34%. these strong ASPs gains, coupled with ongoing system demand, are driving the strong automotive IC market growth this year (Figure 2).

Figure 2

Figure 2

Collectively, microcontrollers, analog, standard logic, and memory ICs used in automotive applications accounted for only about 8% of total IC marketshare by system type in 2016, but that share is forecast to increase to more than 10% in 2020, when automotive is expected to become the third-largest end-use category for ICs, trailing only the communications and computer segments.   Through 2020, IC Insights anticipates that advanced driver-assistance systems (ADAS) will be the biggest user of automotive ICs.  Various ADAS systems are currently helping cars and drivers remain safe on the road and they are proving to be essential building blocks to semi autonomous and autonomous vehicles that are being proposed for the next decade.

Worldwide semiconductor revenue totaled $343.5 billion in 2016, a 2.6 percent increase from 2015 revenue of $334.9 billion, according to final results by Gartner, Inc. The top 25 semiconductor vendors’ combined revenue increased 10.5 percent, a significantly better performance than the overall industry’s growth; however, most of this growth resulted from merger and acquisition (M&A) activity.

“The semiconductor industry rebounded in 2016, with a weak start to the year, characterized by inventory correction, giving way to strengthening demand and an improving pricing environment in the second half,” said James Hines research director at Gartner. “Worldwide semiconductor revenue growth was supported by increasing production in many electronic equipment segments, improving NAND flash memory pricing and relatively benign currency movements.”

Intel retained its No. 1 position as the largest semiconductor manufacturer and grew its semiconductor revenue 4.6 percent in 2016 (see Table 1). Samsung Electronics continued to maintain the No. 2 spot with 11.7 percent market share.

Table 1. Top 10 Semiconductor Vendors by Revenue, Worldwide, 2016 (Millions of Dollars)

2015 Rank

2016 Rank

Vendor

2016 Revenue

2016
Market Share (%)

2015 Revenue

2015-2016 Growth (%)

1

1

Intel

54,091

15.7

51,690

4.6

2

2

Samsung Electronics

40,104

11.7

37,852

5.9

4

3

Qualcomm

15,415

4.5

16,079

-4.1

3

4

SK hynix

14,700

4.3

16,374

-10.2

17

5

Broadcom Ltd. (formerly Avago)

13,223

3.8

4,543

191.1

5

6

Micron Technology

12,950

3.8

13,816

-6.3

6

7

Texas Instruments

11,901

3.5

11,635

2.3

7

8

Toshiba

9,918

2.9

9,162

8.3

12

9

NXP Semiconductors

9,306

2.7

6,517

42.8

10

10

Media Tek

8,725

2.5

6,704

30.1

Others

153,181

44.6

160,562

-4.6

Total Market

343,514

100.0

334,934

2.6

Source: Gartner (May 2017)

Consolidation continued to play a major role in the market share rankings, with several large companies growing through acquisitions. Merger and acquisition activity among the major vendors in 2016 included Avago Technologies’ acquisition of Broadcom Corp. to become Broadcom Ltd., On Semiconductor’s acquisition of Fairchild Semiconductor, and Western Digital’s acquisition of SanDisk. The largest mover in the top 25 was Broadcom Ltd., which moved up 12 places in the market share ranking.

“The combined revenue of the top 25 semiconductor vendors increased by 10.5 percent during 2016 and accounted for a 74.9 percent share, outperforming the rest of the market, which saw a 15.6 percent revenue decline,” said Mr. Hines. “However, these results are skewed by the large amount of M&A activity during 2015 and 2016. If we adjust for this M&A activity by adding the revenue of each acquired company to the revenue of the acquirer for both 2015 and 2016 where necessary, then the top 25 vendors would have experienced a 1.9 percent revenue increase, and the rest of the market would have increased by 4.6 percent.”

IC Insights will release its May Update to the 2017 McClean Report later this month.  This Update includes a discussion of the 1Q17 semiconductor industry market results, an update of the capital spending forecast by company, a review of the IC market by electronic system type, and a look at the top-25 1Q17 semiconductor suppliers (the top-10 1Q17 semiconductor suppliers are covered in this research bulletin).

The top-10 worldwide semiconductor (IC and O S D—optoelectronic, sensor, and discrete) sales ranking for 1Q17 is shown in Figure 1.  It includes four suppliers headquartered in the U.S., two in Europe, two in South Korea, and one each in Singapore and Japan.  In total, the top-10 semiconductor suppliers represented 56% of the 1Q17 worldwide semiconductor market of $99.6 billion (2Q17 is forecast to be the first ever quarterly semiconductor market to exceed $100 billion).

Figure 1

Figure 1

Intel held a slim 4% lead over Samsung for the number one position in 1Q17.  However, as reported in an earlier IC Insights’ Research Bulletin, Samsung is on pace to displace Intel as the world’s largest semiconductor supplier in 2Q17. Memory giants SK Hynix and Micron made the biggest moves in the 1Q17 ranking as compared to the full-year 2016 ranking.  Spurred by the recent surge in the DRAM and NAND flash markets, each company moved up two spots in the top-10 ranking with SK Hynix now occupying the third position and Micron moving up to fourth.

There was one new entrant into the top-10 ranking in 1Q17—Germany-headquartered Infineon.  The company’s 1Q17/1Q16 sales increase was 6%.  Infineon replaced fabless supplier MediaTek, whose 1Q17/1Q16 sales were up by 7% to $1.8 billion but the company suffered a sequential 1Q17/4Q16 sales decline of 17%.  Half of the top-10 companies had sales of at least $4.0 billion in 1Q17.  As shown, it took $1.9 billion in quarterly sales just to make it into the 1Q17 top-10 semiconductor supplier list.

As would be expected, given the possible acquisitions and mergers that could/will occur this year (e.g., Qualcomm/NXP), as well as any new ones that may develop, the top-10 semiconductor ranking is likely to undergo some significant changes over the next few years as the semiconductor industry continues along its path to maturity.

Strong growth in MCUs for IoT applications and suppliers jockeying for marketshare in this IC segment have resulted in several major acquisitions that changed the pecking order of MCU leaders in 2016, according to data released in IC Insights’ April Update to The McClean Report, which was released earlier this month. Figure 1 ranks the largest MCU suppliers in 2016 by dollar-sales volume.  Among the top MCU suppliers shown, NXP, Microchip, and Cypress Semiconductor moved up in the sales ranking during 2016 with strong increases in revenues, which were driven by acquisitions of IC companies that sold microcontrollers. Meanwhile, those suppliers not making significant acquisitions in microcontrollers posted low-single digit percentage increases or declines in MCU sales in 2016.

Figure 1

Figure 1

Although overall growth in microcontrollers has wobbled and stalled in the past couple years, MCUs remain at the epicenter of tremendous growth in the Internet of Things, automotive, robotics, embedded applications and other emerging systems.   Major MCU suppliers have been improving their portfolios to address many of these key markets.  Part of that improvement process has included merging and acquiring competitors in order to gain a quick foothold into these developing markets.

In 2016, NXP in the Netherlands overtook Renesas Electronics in Japan as the world’s largest microcontroller supplier with MCU revenues climbing 116% following its $11.6 billion purchase of U.S.-based Freescale Semiconductor in December 2015.  Prior to its acquisition, Freescale was ranked second in MCUs and was catching up with Renesas in microcontroller sales with only $210 million separating the two companies in 2015 versus about a $1 billion gap in 2014.  Renesas suffered a 19% drop in MCU dollar sales in 2015 (largely due to the weak yen exchange rate in that year but also because of the continued fallout from Japan’s troubled economy).  In 2016, Renesas’ fall in MCU sales eased, dropping 4% to nearly $2.5 billion, or about 16% of the total microcontroller market.  In 2011, Renesas’ MCU marketshare was 33% of worldwide microcontroller sales.

The Freescale acquisition moved NXP from sixth in the 2015 MCU ranking to the top spot in 2016 with a marketshare of 19% ($2.9 billion).  About three-quarters of NXP’s 2015 microcontroller sales were 8-bit and 16-bit MCUs used in smartcards.  After Freescale’s business was merged into NXP, smartcard MCUs accounted for a little over one-quarter of the company’s total microcontroller sales in 2016. MCUs developed and introduced by Freescale are aimed at a wide range of embedded control applications, including significant amounts in automotive systems.  NXP and Freescale both have developed extensive 32-bit MCUs with Cortex-M CPU design cores licensed from ARM in the U.K.

U.S.-based Microchip Technology climbed from fifth in the 2015 MCU ranking to third in 2016 with sales increasing 50% to $2.0 billion following its $3.4 billion acquisition of Atmel in 2Q16.  U.S.-based Atmel was ranked ninth in MCU sales in 2015 ($808 million).  Prior to buying Atmel, Microchip had been the only major MCU supplier not licensing ARM CPU technology.  For about 10-years, Microchip has developed and sold 32-bit MCUs, based on a RISC-processor architecture developed by MIPS Technologies (which is now owned by Imagination Technology in the U.K.,  a rival of ARM).  Six months after completing the Atmel acquisition, Microchip said it would expand both its MIPS-based PIC32 MCU product line and Atmel’s ARM-based SAM series.  Microchip has promised to “remain core agnostic, fitting the best solution with the right customer and for the right application.”

Meanwhile, Cypress in Silicon Valley moved into eighth place in the MCU ranking with sales increasing 15% in 2016 to about $622 million.  Cypress boosted its presence in MCUs when it acquired Spansion for about $5.0 billion in stock in March 2015.  Originally spun out of Advanced Micro Devices as a NOR flash memory supplier, Spansion had purchased Fujitsu Semiconductor’s Microcontroller and Analog Business in 2013 for $110 million as part of its efforts to expand beyond nonvolatile storage ICs. Spansion also licensed ARM’s 32-bit CPU cores for microcontrollers in 2013.  Cypress’ increase in microcontroller sales was partly a result of having a full year of revenue from Spansion’s MCU business but also growth in the company’s programmable system-on-chip (PSoC) products, which combine microcontroller functionality with user-configurable peripherals of mixed-signal and digital functions that are targeted at end-use applications.

The biggest decline in the MCU leader list was posted by Samsung, which saw its sales drop 14% in 2016, primarily because of weakness in the smartcard microcontroller market.  Samsung sells MCUs to OEMs but also serves in-house needs for its own brands of consumer electronics, computers, and communications systems (i.e., smartphones).

By Douglas G. Sutherland and David W. Price

Author’s Note: The Process Watch series explores key concepts about process control—defect inspection and metrology—for the semiconductor industry. Following the previous installments, which examined the 10 fundamental truths of process control, this new series of articles highlights additional trends in process control, including successful implementation strategies and the benefits for IC manufacturing.

While working at the Guinness® brewing company in Dublin, Ireland in the early-1900s, William Sealy Gosset developed a statistical algorithm called the T-test1. Gosset used this algorithm to determine the best-yielding varieties of barley to minimize costs for his employer, but to help protect Guinness’ intellectual property he published his work under the pen name “Student.” The version of the T-test that we use today is a refinement made by Sir Ronald Fisher, a colleague of Gosset’s at Oxford University, but it is still commonly referred to as Student’s T-test. This paper does not address the mathematical nature of the T-test itself but rather looks at the amount of data required to consistently achieve the ninety-five percent confidence level in the T-test result.

A T-test is a statistical algorithm used to determine if two samples are part of the same parent population. It does not resolve the question unequivocally but rather calculates the probability that the two samples are part of the same parent population. As an example, if we developed a new methodology for cleaning an etch chamber, we would want to show that it resulted in fewer fall-on particles. Using a wafer inspection system, we could measure the particle count on wafers in the chamber following the old cleaning process and then measure the particle count again following the new cleaning process. We could then use a T-test to tell if the difference was statistically significant or just the result of random fluctuations. The T-test answers the question: what is the probability that two samples are part of the same population?

However, as shown in Figure 1, there are two ways that a T-Test can give a false result: a false positive or a false negative. To confirm that the experimental data is actually different from the baseline, the T-test usually has to score less than 5% (i.e. less than 5% probability of a false positive). However, if the T-test scores greater than 5% (a negative result), it doesn’t tell you anything about the probability of that result being false. The probability of false negatives is governed by the number of measurements. So there are always two criteria: (1) Did my experiment pass or fail the T-test? (2) Did I take enough measurements to be confident in the result? It is that last question that we try to address in this paper.

Figure 1. A “Truth Table” highlights the two ways that a T-Test can give the wrong result.

Figure 1. A “Truth Table” highlights the two ways that a T-Test can give the wrong result.

Changes to the semiconductor manufacturing process are expensive propositions. Implementing a change that doesn’t do anything (false positive) is not only a waste of time but potentially harmful. Not implementing a change that could have been beneficial (false negative) could cost tens of millions of dollars in lost opportunity. It is important to have the appropriate degree of confidence in your results and to do so requires that you use a sample size that is appropriate for the size of the change you are trying to affect. In the example of the etch cleaning procedure, this means that inspection data from a sufficient number of wafers needs to be collected in order to determine whether or not the new clean procedure truly reduces particle count.

In general, the bigger the difference between two things, the easier it is to tell them apart. It is easier to tell red from blue than it is to distinguish between two different shades of red or between two different shades of blue. Similarly, the less variability there is in a sample, the easier it is to see a change2. In statistics the variability (sometimes referred to as noise) is usually measured in units of standard deviation (σ). It is often convenient to also express the difference in the means of two samples in units of σ (e.g., the mean of the experimental results was 1σ below the mean of the baseline). The advantage of this is that it normalizes the results to a common unit of measure (σ). Simply stating that two means are separated by some absolute value is not very informative (e.g., the average of A is greater than the average of B by 42). However, if we can express that absolute number in units of standard deviations, then it immediately puts the problem in context and instantly provides an understanding of how far apart these two values are in relative terms (e.g., the average of A is greater than the average of B by 1 standard deviation).

Figure 2 shows two examples of data sets, before and after a change. These can be thought of in terms of the etch chamber cleaning experiment we discussed earlier. The baseline data is the particle count per wafer before the new clean process and the results data is the particle count per wafer after the new clean procedure. Figure 2A shows the results of a small change in the mean of a data set with high standard deviation and figure 2B shows the results of the same sized change in the mean but with less noisy data (lower standard deviation). You will require more data (e.g., more wafers inspected) to confirm the change in figure 2A than in figure 2B simply because the signal-to-noise ratio is lower in 2A even though the absolute change is the same in both cases.

Figure 2. Both charts show the same absolute change, before and after, but 2B (right) has much lower standard deviation. When the change is small relative to the standard deviation as in 2A (left) it will require more data to confirm it.

Figure 2. Both charts show the same absolute change, before and after, but 2B (right) has much lower standard deviation. When the change is small relative to the standard deviation as in 2A (left) it will require more data to confirm it.

The question is: how much data do we need to confidently tell the difference? Visually, we can see this when we plot the data in terms of the Standard Error (SE). The SE can be thought of as the error in calculating the average (e.g., the average was X +/- SE). The SE is proportional to σ/√n where n is the sample size. Figure 3 shows the SE for two different samples as a function of the number of measurements, n.

Figure 3. The Standard Error (SE) in the average of two samples with different means. In this case the standard deviation is the same in both data sets but that need not be the case. With greater than x measurements the error bars no longer overlap and one can state with 95% confidence that the two populations are distinct.

Figure 3. The Standard Error (SE) in the average of two samples with different means. In this case the standard deviation is the same in both data sets but that need not be the case. With greater than x measurements the error bars no longer overlap and one can state with 95% confidence that the two populations are distinct.

For a given difference in the means and a given standard deviation we can calculate the number of measurements, x, required to eliminate the overlap in the Standard Errors of these two measurements (at a given confidence level).

The actual equation to determine the correct sample size in the T-test is given by,

Equation 1

Equation 1

where n is the required sample size, “Delta” is the difference between the two means measured in units of standard deviation (σ) and Zx is the area under the T distribution at probability x. For α=0.05 (5% chance of a false positive) and β=0.95 (5% chance of a false negative), Z1-α/2 and Zβ are equal to 1.960 and 1.645 respectively (Z values for other values of α and β are available in most statistics textbooks, Microsoft® Excel® or on the web). As seen in Figure 3 and shown mathematically in Eq 1, as the difference between the two populations (Delta) becomes smaller, the number of measurements required to tell them apart will become exponentially larger. Figure 4 shows the required sample size as a function of the Delta between the means expressed in units of σ. As expected, for large changes, greater than 3σ, one can confirm the T-test 95% of the time with very little data. As Delta gets smaller, more measurements are required to consistently confirm the change. A change of only one standard deviation requires 26 measurements before and after, but a change of 0.5σ requires over 100 measurements.

Figure 4. Sample size required to confirm a given change in the mean of two populations with 5% false positives and 5% false negatives

Figure 4. Sample size required to confirm a given change in the mean of two populations with 5% false positives and 5% false negatives

The relationship between the size of the change and the minimum number of measurements required to detect it has ramifications for the type of metrology or inspection tool that can be employed to confirm a given change. Figure 5 uses the results from figure 4 to show the time it would take to confirm a given change with different tool types. In this example the sample size is measured in number of wafers. For fast tools (high throughput, such as laser scanning wafer inspection systems) it is feasible to confirm relatively small improvements (<0.5σ) in the process because they can make the 200 required measurements (100 before and 100 after) in a relatively short time. Slower tools such as e-beam inspection systems are limited to detecting only gross changes in the process, where the improvement is greater than 2σ. Even here the measurement time alone means that it can be weeks before one can confirm a positive result. For the etch chamber cleaning example, it would be necessary to quickly determine the results of the change in clean procedure so that the etch tool could be put back into production. Thus, the best inspection system to determine the change in particle counts would be a high throughput system that can detect the particles of interest with low wafer-to-wafer variability.

Figure 5. The measurement time required to determine a given change for process control tools with four different throughputs (e-Beam, Broadband Plasma, Laser Scattering and Metrology)

Figure 5. The measurement time required to determine a given change for process control tools with four different throughputs (e-Beam, Broadband Plasma, Laser Scattering and Metrology)

Experiments are expensive to run. They can be a waste of time and resources if they result in a false positive and can result in millions of dollars of unrealized opportunity if they result in a false negative. To have the appropriate degree of confidence in your results you must use the correct sample size (and thus the appropriate tools) that correspond to the size of the change you are trying to affect.

References:

  1. https://en.wikipedia.org/wiki/William_Sealy_Gosset
  2. Process Watch: Know Your Enemy, Solid State Technology, March 2015

About the Authors:

Dr. David W. Price is a Senior Director at KLA-Tencor Corp. Dr. Douglas Sutherland is a Principal Scientist at KLA-Tencor Corp. Over the last 10 years, Dr. Price and Dr. Sutherland have worked directly with more than 50 semiconductor IC manufacturers to help them optimize their overall inspection strategy to achieve the lowest total cost. This series of articles attempts to summarize some of the universal lessons they have observed through these engagements.