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By Douglas G. Sutherland and David W. Price

Author’s Note: This is the last in a series of 10 installments that explore certain fundamental truths about process control—defect inspection and metrology—for the semiconductor industry. Each article introduces one of the 10 fundamental truths and highlights its implications. Within this article we will use the term inspection to imply either defect inspection or a parametric measurement such as film thickness or critical dimension (CD).

In the eighth installment1 in this series, “The Tyranny of Numbers,” we discussed the trend of increasing process steps—the number of steps is expected to double between the 20nm and 10nm nodes—and the impact that those additional steps will have on final yield. In addition to impacting yield, the increased complexity of the process flow will also increase production costs and cycle time. As these trends unfold, managing costs and cycle time will become increasingly important to fab operations.

The tenth fundamental truth of process control for the semiconductor IC industry is:

Adding Process Control Reduces Production Costs and Cycle Time

Instrumental to having an efficient, low-cost fab is the ability to collect meaningful information about the process in a timely fashion. Process control tools (metrology and inspection) are the eyes and ears of the fab in that they provide insight into what’s working and what’s not: they are an investment in “process information.” In a 2007 paper2 the National Institute of Standards and Technology (NIST) estimated that the average return on investment for metrology alone was 300 percent.

Previous articles in this series have illustrated how process control can reduce costs by reducing the scrap and raw material costs associated with lost yield and reliability3 failures. Similarly, improving yield reduces the environmental footprint of fab operations per good die out.4 In this article, we will examine two other elements of cost reduction and factory efficiency enabled by process control:

  1. Process equipment re-use from node-to-node
  2. Improved net cycle time

Equipment Re-Use

The single biggest component of cost in a modern fab is capital depreciation. It can vary from company to company, but typically wafer fab capital equipment is depreciated at 20 percent per year over the course of five years. If you can extend the life of a piece of equipment beyond the point where it is fully depreciated you are essentially getting that tool for free. If you can find a way to re-use an entire group of process tools (scanners, etchers, etc.) the savings could easily be measured in tens or even hundreds of millions of dollars.

Ultimately, a process tool must meet the technical specifications that are demanded by the manufacturing process in which it is used. However, in cases where the tool’s capability is marginal, its lifetime can be extended by closer monitoring—using existing metrology or inspection tools to keep the tool operating within the required process specifications. Performing more frequent process tool qualifications can help improve matching and ensure that a tool does not drift out of spec. For stable feed-back and feed-forward schemes, having more in-line inspections provides better averaging and allows for better control of the actual process. In these situations, process control is helping to extend the life of existing process tools—adding process control in this context can actually save money.

The Process Capability Index (Cpk) is a metric that measures how well the natural variation of a process fits within the spec limits. For a centered process with a symmetric distribution the Cpk is given by equation 1,

Cpk = (USL – LSL) / 6σ                             Eq. 1

where USL and LSL are the upper and lower spec limits respectively and s is the standard deviation of the process. If the Cpk value is greater than one, the process is considered capable. Cpk values less than one indicate that the process is not capable.

Consider an etch process step where the Cpk of the CD measurement is exactly equal to one (i.e., the step is marginally capable in that the upper and lower spec limits are both three standard deviations from the mean). The marginal capability could be the fault of the previous photo step, the etch step or both. Either way it is an expensive proposition to upgrade either tool set to improve the Cpk—the capability —of the process.

Often the capability of the process can be improved by implementing a data feed-forward scheme—using additional metrology to fully characterize the process at one step (e.g., photo) and then feeding that information forward to adjust parameters at etch to effectively customize the process conditions for each lot or wafer. Figure 1 below shows an example Statistical Process Control (SPC) chart of the after-etch CD with and without feed-forward.

Figure 1. Left: SPC Chart of etch CD without feed forward (Cpk=1.0). Right: SPC Chart of etch CD with feed forward (Cpk=1.3)

Figure 1. Left: SPC Chart of etch CD without feed forward (Cpk=1.0). Right: SPC Chart of etch CD with feed forward (Cpk=1.3)

Feed-back and feed-forward schemes can be used to extend the useful lifetime of process tools by effectively increasing the process window in which they operate. CD measurements that are slightly off target at photo can be brought back on target by using that information to adjust the etch bias at the etch process step. 

Cycle Time

Cycle time is another very important production metric. We will give a more detailed account of cycle time in an upcoming paper but would like to touch briefly on the counter-intuitive relationship between cycle time and process control.

Any source of variability that prevents lots from moving through the fab in lock-step fashion will increase the cycle time. Adding inspection steps will add cycle time to those lots that get inspected but due to sampling (not every lot gets inspected) it will have a much smaller impact on the average. When an excursion does occur, comparatively few process tools will have to be put down (because the inspection points are closer together) and the module owner will be able to isolate the problem much sooner. The total disruption to the fab (the variability) will be reduced and the cycle time of all lots will be improved. This counter-intuitive concept has been demonstrated by several fabs that have both added inspection steps and reduced cycle time simultaneously.

To summarize, adding process control steps contribute to fab efficiency on several levels (figure 2): increasing baseline yield, extending the useful life of existing process tools, limiting the duration of excursions, and reducing cycle time.

Figure 2. The cascading benefits of process control.

Figure 2. The cascading benefits of process control.

As we conclude this series on the 10 fundamental truths of process control1,3,5-11, we thank you for reading. We hope that these articles have provided deeper insight into the value of process control and the base knowledge for successful implementation of process control in IC fabrication. We look forward to exploring additional aspects of process control in future Process Watch articles throughout the coming months.

References:

About the authors:

Dr. David W. Price is a Senior Director at KLA-Tencor Corp. Dr. Douglas Sutherland is a Principal Scientist at KLA-Tencor Corp. Over the last 10 years, Drs. Price and Sutherland have worked directly with more than 50 semiconductor IC manufacturers to help them optimize their overall inspection strategy to achieve the lowest total cost. This series of articles attempts to summarize some of the universal lessons they have observed through these engagements.

Front-end fab equipment spending (including new, used, and in-house) is projected to increase 3.7 percent in 2016 (to US$ 37.2 billion) and another 13 percent in 2017 (to $42.1 billion) according to most recent edition of the SEMI World Fab Forecast.  Fab equipment spending for 2015 ended almost flat ($35.9 billion), with a slight decrease of -0.4 percent year-over-year.

The SEMI World Fab Forecast report presents details of fab-related spending through the industry and extends the outlook through the end of 2017.  Fab equipment spending is expected to pick up slowly in the first half of 2016, and accelerate into the second half when momentum starts to build for 2017, with a return to double-digit growth rates (see Figure 1).

Figure 1

Figure 1

The biggest contributors to the growth are foundries, 3D NAND fabs, and companies beginning to equip and prepare for the 10nm ramp-up in 2017. Dedicated foundries continue to represent the largest spending segment. Spending for 2015 dropped slightly from $10.7 billion to $9.8 billion (-8 percent YoY), but is expected to increase by 5 percent in 2016 and almost 10 percent in 2017.

DRAM spending ranks second place after foundries. After a strong 2015, DRAM spending is expected to slow in 2016 (-23 percent) and increase again in 2017 by 10 percent.

In terms of spending growth rates, the big momentum comes from 3D NAND (including 3D XPoint). Spending doubled from about $1.8 billion in 2014 to $3.6 billion in 2015, 101 percent growth. In 2016, it will again rise to more than $5.6 billion (50 percent growth).

The increase in equipment spending is also supported by six companies, which are among the top 10 spenders globally. The six have announced plans to increase their respective capital expenditures in 2016, while the assumption for the largest spender, Samsung, is that capital expenditure will be less than in 2015.

Equipment spending growth for 2017 is also buoyed by new 24 facilities (excluding R&D) which began construction in 2015 or will begin construction this year. These projects are located around the world, including eight planned in China alone.

The industry has recently set records for mergers and acquisitions, and more are expected in 2016.  The combined flat growth for semiconductor equipment spending in 2015 and slow growth in 2016 confirm a more mature industry.  New technologies — new nodes and newer memory devices — will drive the increase in spending currently forecasted for 2017.

Learn more about SEMI fab databases at: www.semi.org/en/MarketInfo/FabDatabase and www.youtube.com/user/SEMImktstats

Total yearly semiconductor unit shipments (integrated circuits and opto-sensor-discrete, or O-S-D, devices) are forecast to continue their upward march and are now expected to top one trillion units for the first time in 2018, according to data presented in IC Insights’ recently released 2016 edition of The McClean Report—A Complete Analysis and Forecast of the Integrated Circuit Industry, and its soon to be released 2016 O-S-D Report—A Market Analysis and Forecast for the Optoelectronics, Sensors/Actuators, and Discretes. Semiconductor shipments in excess of one trillion units are forecast to be the new normal beginning in 2018. Figure 1 shows that semiconductor unit shipments are forecast to climb to 1,022.5 billion devices in 2018 from 32.6 billion in 1978, which amounts to average annual growth of 9.0% over the 40 year period and demonstrates how increasingly dependent on semiconductors the world has become.

The largest annual increase in semiconductor unit growth during the timespan shown was 34% in 1984; the biggest decline was 19% in 2001 following the dot-com bust. The global financial meltdown and ensuing recession caused semiconductor shipments to fall in both 2008 and 2009, the only time the industry has experienced consecutive years in which unit shipments declined. Semiconductor unit growth then surged 25% in 2010, the second-highest growth rate since 1978.

Figure 1

Figure 1

The percentage split of IC and O-S-D devices within total semiconductor units has remained fairly steady despite advances in integrated circuit technology and the blending of functions to reduce chip count within systems. In 1980, O-S-D devices accounted for 78% of semiconductor units and ICs represented 22%. Thirty-five years later in 2015, O-S-D devices accounted for 72% of total semiconductor units, compared to 28% for ICs (Figure 2).

Figure 2

Figure 2

From one year to the next year—and usually depending on the must-have electronic system or product in the market at the time—different semiconductor products emerge to experience the strongest unit shipment growth. Figure 3 shows IC Insights’ forecast of the O-S-D and IC product categories with largest unit growth rates forecast for 2016. Semiconductors showing the strongest unit growth are essential building-block components in smartphones, new automotive electronics systems, and within systems that are helping to build out of Internet of Things. More about these semiconductor products and end-use applications are included in IC Insights’ McClean Report and O-S-D Report.

According to IC Insights’ new 2016 edition of The McClean Report, total worldwide semiconductor industry capital spending is forecast to show low single-digit growth in 2016 after registering a 1% decline in 2015.  As discussed below, last year’s drop in semiconductor industry capital spending was a significant departure from historical patterns that go back more than 30 years.

Figure 1 shows the annual worldwide semiconductor industry capital spending changes from 1983-2015.  Over the past 33 years, there have been six periods when semiconductor industry capital spending declined by double-digits rates for one or two years (1985-1986, 1992, 1997-1998, 2001-2002, 2008-2009, and 2012-2013).  It is interesting to note that in every case except the 2012-2013 spending downturn, within two years after the period of decline in capital spending, a surge in spending of at least 45% occurred.  The second year increases in spending after the cutbacks were typically stronger than the first year after a downturn with the lone exception to this being the 2010 spending rebound after the 2008-2009 downturn.  This was because most semiconductor producers tend to act very conservatively coming out of a market slowdown and wait until they have logged about 4-6 quarters of good operating results before significantly increasing their capital spending again.

As shown in Figure 1, the streak of strong capital spending growth within two years after a spending cutback timeperiod ended in 2015, with capital spending registering a 1% decline.  IC Insights believes that this is yet another indication of a maturing semiconductor industry.

Figure 1

Figure 1

More detailed information on semiconductor industry capital spending, including 2016 capital spending forecasts by company, can be found in IC Insights’ flagship market research report, The McClean Report—A Complete Analysis and Forecast of the Integrated Circuit Industry. The new 478-page McClean Report provides IC market and technology trend forecasts from 2016 through 2020.

Fairchild Semiconductor International, Inc. announced this week that its board of directors, after consultation with its legal and financial advisors, has determined that the unsolicited proposal received on December 28, 2015, from China Resources Microelectronics Ltd and Hua Capital Management Co., Ltd.  to acquire Fairchild does not constitute a “Superior Proposal” as defined in the Company’s Agreement and Plan of Merger with ON Semiconductor Corporation.

On January 5, 2016, Fairchild announced that the Board determined that the Acquisition Proposal would reasonably be expected to result in a Superior Proposal. The Fairchild management team, along with Fairchild’s legal and financial advisors, engaged in extensive discussions with China Resources and Hua Capital. After conducting a thorough review, and after consultation with Fairchild’s legal and financial advisors, the Board concluded that the Acquisition Proposal is not superior to Fairchild’s existing agreement with ON Semiconductor.

As previously announced on November 18, 2015, Fairchild entered into an Agreement and Plan of Merger with ON Semiconductor, under which a wholly owned subsidiary of ON Semiconductor agreed to acquire all of the outstanding shares of Fairchild common stock for $20.00 per share in cash.

Fairchild remains subject to the Agreement and Plan of Merger with ON Semiconductor, and the Board has not changed its recommendation in support of that agreement.

Goldman, Sachs & Co. is acting as financial advisor to Fairchild, and Wachtell, Lipton, Rosen & Katz is serving as its legal counsel.

Ever smaller, ever faster, ever cheaper – since the start of the computer age the performance of processors has doubled on average every 18 months. 50 years ago already, Intel co-founder Gordon E. Moore prognosticated this astonishing growth in performance. And Moore’s law seems to hold true to this day.

But the miniaturization of electronics is now reaching its physical limits. “Today already, transistors are merely a few nanometers in size. Further reductions are horrendously expensive,” says Professor Jonathan Finley, Director of the Walter Schottky Institute at TUM. “Improving performance is achievable only by replacing electrons with photons, i.e. particles of light.”

Photonics – the silver bullet of miniaturization

Data transmission and processing with light has the potential of breaking the barriers of current electronics. In fact, the first silicon-based photonics chips already exist. However, the sources of light for the transmission of data must be attached to the silicon in complicated and elaborate manufacturing processes. Researchers around the world are thus searching for alternative approaches.

Scientists at the TU Munich have now succeeded in this endeavor: Dr. Gregor Koblmüller at the Department of Semiconductor Quantum-Nanosystems has, in collaboration with Jonathan Finley, developed a process to deposit nanolasers directly onto silicon chips. A patent for the technology is pending.

The candidate Benedikt Mayer and Masters student Lisa Janker in an experiment at the molecular beam epitaxy in the Walter Schottky Institute of the Technische Universitaet Muenchen am teaching Suhl for semiconductor nanostructures and quantum devices, with Prof. Dr. Jonathan Finley; persons depicted (from left): Benedikt Mayer, Lisa Janker; Location: Walter Schottky Institute, Am Coulombwall 4, 85748 Garching, Germany; Date: 02/10/2016; CREDIT: Uli Benz / TU Muenchen

The candidate Benedikt Mayer and Masters student Lisa Janker in an experiment at the molecular beam epitaxy in the Walter Schottky Institute of the Technische Universitaet Muenchen am teaching Suhl for semiconductor nanostructures and quantum devices, with Prof. Dr. Jonathan Finley; persons depicted (from left): Benedikt Mayer, Lisa Janker; Location: Walter Schottky Institute, Am Coulombwall 4, 85748 Garching, Germany; Date: 02/10/2016; CREDIT: Uli Benz / TU Muenchen

Growing a III-V semiconductor onto silicon requires tenacious experimentation. “The two materials have different lattice parameters and different coefficients of thermal expansion. This leads to strain,” explains Koblmüller. “For example, conventional planar growth of gallium arsenide onto a silicon surface results therefore in a large number of defects.”

The TUM team solved this problem in an ingenious way: By depositing nanowires that are freestanding on silicon their footprints are merely a few square nanometers. The scientists could thus preclude the emerging of defects in the GaAs material.

Atom by atom to a nanowire

But how do you turn a nanowire into a vertical-cavity laser? To generate coherent light, photons must be reflected at the top and bottom ends of the wire, thereby amplifying the light until it reaches the desired threshold for lasing.

To fulfil these conditions, the researchers had to develop a simple, yet sophisticated solution: “The interface between gallium arsenide and silicon does not reflect light sufficiently. We thus built in an additional mirror – a 200 nanometer thick silicon oxide layer that we evaporated onto the silicon,” explains Benedikt Mayer, doctoral candidate in the team led by Koblmüller and Finley. “Tiny holes can then be etched into the mirror layer. Using epitaxy, the semiconductor nanowires can then be grown atom for atom out of these holes.”

Only once the wires protrude beyond the mirror surface they may grow laterally – until the semiconductor is thick enough to allow photons to jet back and forth to allow stimulated emission and lasing. “This process is very elegant because it allows us to position the nanowire lasers directly also onto waveguides in the silicon chip,” says Koblmüller.

GaAs nanowires on a silicon surface - Picture: Thomas Stettner / Philipp Zimmermann / TUM

GaAs nanowires on a silicon surface – CREDIT: Thomas Stettner / Philipp Zimmermann / TUM

Basic research on the path to applications

Currently, the new gallium arsenide nanowire lasers produce infrared light at a predefined wavelength and under pulsed excitation. “In the future we want to modify the emission wavelength and other laser parameters to better control temperature stability and light propagation under continuous excitation within the silicon chips,” adds Finley.

The team has just published its first successes in this direction. And they have set their sights firmly on their next goal: “We want to create an electric interface so that we can operate the nanowires under electrical injection instead of relying on external lasers,” explains Koblmüller.

“The work is an important prerequisite for the development of high-performance optical components in future computers,” sums up Finley. “We were able to demonstrate that manufacturing silicon chips with integrated nanowire lasers is possible.”

The research was funded by the German Research Foundation (DFG) through the TUM Institute for Advanced Study, the Excellence Cluster Nanosystems Initiative Munich (NIM) and the International Graduate School of Science and Engineering (IGSSE) of the TUM, as well as by IBM through an international postgraduate program.

SUNY Polytechnic Institute (SUNY Poly) and GLOBALFOUNDRIES today announced the establishment of a new Advanced Patterning and Productivity Center (APPC), which will be located at the Colleges of Nanoscale Science and Engineering (CNSE) in Albany, N.Y.

The $500 million, 5-year program will accelerate the introduction of Extreme Ultraviolet (EUV) lithography technologies into manufacturing. The center is anchored by a network of international chipmakers and material and equipment suppliers, including IBM and Tokyo Electron, and will generate 100 jobs.

“This advanced new partnership between SUNY Poly and GLOBALFOUNDRIES demonstrates how Governor Cuomo’s strategic investments in SUNY are bolstering the system’s research capacity, leveraging private dollars, and creating exciting new opportunities at our campuses for students and faculty,” said SUNY Chancellor Nancy L. Zimpher. “SUNY Poly’s nanotechnology expertise coupled with the governor’s innovative public-private partnership model has positioned New York as a global leader in computer chip research, development, and manufacturing. SUNY System Administration strongly applauds Dr. Kaloyeros for his leadership in bringing the Advanced Patterning and Productivity Center to Albany.”

“Today’s announcement is a direct result of Governor Cuomo’s innovation driven economic development model. His strategic investments supporting the state’s world class nanotechnology infrastructure and workforce have made us uniquely suited to host the new APPC, which will enable the continuation of Moore’s Law and unlock new capabilities and opportunities for the entire semiconductor industry,” said Dr. Alain Kaloyeros, President and CEO of SUNY Polytechnic Institute. “In partnership with GLOBALFOUNDRIES, IBM and Tokyo Electron, we will leverage our combined expertise and technological capabilities to meet the critical needs of the industry and advance the introduction of this complex technology.”

“GLOBALFOUNDRIES is committed to an aggressive research roadmap that continually pushes the limits of semiconductor technology. With the recent acquisition of IBM Microelectronics, GLOBALFOUNDRIES has gained direct access to IBM’s continued investment in world-class semiconductor research and has significantly enhanced its ability to develop leading-edge technologies,” said Dr. Gary Patton, CTO and Senior Vice President of R&D at GLOBALFOUNDRIES. “Together with SUNY Poly, the new center will improve our capabilities and position us to advance our process geometries at 7nm and beyond.”

EUV lithography is a next-generation semiconductor manufacturing technique that produces short wavelengths (14-nanometers and below) of light to create minuscule patterns on integrated circuits. The technology is critical to achieve the cost, performance, and power improvements needed to meet the industry’s anticipated demands in cloud computing, Big Data, mobile devices, and other emerging technologies.

The APPC will tackle the challenges associated with commercializing EUV lithography technology. A key component of the center will be the installation of the ASML NXE:3300 EUV scanner, a state-of-the-art tool for the development and manufacturing of semiconductor process technologies at 7nm and beyond. This installation follows the installation of the IBM supported ASML NXE:3300B EUV scanner already in place at SUNY Poly.

The center aims to bring mask and materials suppliers together to extend the capabilities of EUV lithography through exploring fundamental aspects of the patterning process. Other projects will be focused on enhancing productivity, in preparation for implementing EUV lithography in the manufacturing of leading-edge products in GLOBALFOUNDRIES’ production facility in Malta, NY.

Through the APPC, members will have access to SUNY Poly’s patterning infrastructure, which includes state-of-the-art film deposition and etch capability, leading-edge patterning systems, EUV mask infrastructure, and world-class EUV imaging capabilities.

“IBM is committed to providing high-performance computing solutions for the cloud and cognitive era through continued leadership and collaboration in semiconductor technology research,” said Mukesh Khare, Vice President at IBM Research. “SUNY Poly CNSE’s investment in the APPC and new ASML tool will accelerate maturity of EUV technology towards manufacturing, which will allow us to build on the innovations that enabled an IBM Research-led alliance to deliver the industry’s first 7nm test chip demonstration earlier this year. Through the vision and leadership of the Governor and CSNE, leading-edge partnerships such as this one are possible.”

“EUV technology has emerged from R&D and the new center will meet the rising demand to commercialize this technology and put it in the hands of end users,” said Gishi Chung, SVP & GM, Head of SPE Development Division from TEL. “TEL is proud to be partnering with SUNY Poly at its Albany NanoTech Complex as we continue our work with fellow industry leaders to advance cutting edge innovations in semiconductor process technology.”

The health of the IC industry is increasingly tied to the health of the worldwide economy. Rarely can there be strong IC market growth without at least a “good” worldwide economy to support it. Consequently, IC Insights expects annual global IC market growth rates to closely track the performance of worldwide GDP growth. In the recently released The McClean Report 2016, IC Insights forecasts 2.7% global GDP growth for 2016, only marginally ahead of what is considered to be the recession threshold of 2.5% growth.

Figure 1 puts the worldwide electronics and semiconductor industries into perspective. The top figure, worldwide GDP, represents all global economic activity. Essentially, the worldwide total available market (TAM) for business (i.e., GDP) was $78.4 trillion in 2015.

In many areas of the world, local economies have slowed. For example, economic growth in China slipped below 7% in 2015. China, which is the leading market for personal computers, digital TVs, smartphones, new commercial aircraft, and automobiles, is forecast to lose more economic momentum in 2016. Its GDP is forecast to increase 6.3% in 2016, which continues a slide in that country’s annual GDP growth rate that started in 2010.

While the U.S. economy is far from perfect, it is currently one of the most significant positive driving forces in the worldwide economy. The U.S. accounted for 22% of worldwide GDP in 2015. U.S. GDP is forecast to grow 2.5% in 2016. Given its size and strength, the U.S. economy greatly influences overall global GDP growth. An improving employment picture and the low price of oil are factors that should positively impact the U.S. economy in 2016.

Other noteworthy industry highlights from the 2016 edition of The McClean Report include the following:

• Global semiconductor sales decreased 1% in 2015 but are forecast to grow 4% in 2016. IC Insights expects the worldwide IC market to increase 4% in 2016, and sales of optoelectronics, sensors, and discrete (OSD) devices collectively to register 5% growth.

Figure 1

Figure 1

• Total semiconductor unit shipments (including IC and OSD devices) reached almost 840-billion units in 2015 and are expected to exceed one trillion units in 2018. After increasing 4% in 2015, IC unit shipments are forecast to grow 5% in 2016. Analog devices are forecast to account for 53% of total IC unit shipments in 2016.

• A stable IC pricing environment is expected through 2020 due in part to fewer suppliers in various IC markets (i.e., DRAM, MPU, etc.), lower capital spending as a percent of sales, and no significant new IC manufacturers entering the market in the future (the surge of Chinese IC companies that entered the market in the early 2000’s is assumed to be the last large group of newcomers.

• Semiconductor industry capital spending grew to $65.9 billion in 2015. IC Insights forecasts semiconductor capital spending will decrease 1% in 2016. Spending on flash memory and within the foundry segment is forecast to increase in 2016 but spending for all other market segments, including DRAM, is expected to decline. Semiconductor capital spending as a percent of sales is forecast to remain in the mid- to high-teens range through 2020. IC Insights believes spending at this level will not lead to an industry-wide overcapacity during the forecast period.

• Semiconductor R&D spending increased 1% in 2015 to new record high of $56.4 billion. Intel dedicated $12.1 billion to R&D in 2015 (24.0% of sales) to remain the largest semiconductor R&D spender in 2015. R&D spending at TSMC, the industry’s biggest pure-play foundry rose 10% in 2015, ranking it 5th among top R&D spenders. TSMC joined the group of top-10 R&D spenders for the first time in 2010, giving an indication of just how important TSMC and other pure-play foundries have become to the IC industry with continuing technological progress.

Further trends and analysis relating to the IC market are covered in the main 400-plus page 2016 edition of The McClean Report.

By Christian G. Dieseldorff, Industry Research & Statistics Group, SEMI (January 25, 2016)

The industry’s first and only ‘Global 200mm Fab Outlook report to 2018’ reveals a change in the landscape for 200mm fab capacity.

Figure 1

In comparing 2006 versus 2018, memory capacity share of 200mm has declined to just about 2% as most memory production has migrated to 300mm fabs . A similar transition to 300mm has occurred in Logic/MPU device production.

On the other hand, we see strong 200mm capacity growth from Discrete/Power, MEMS, and Analog segments in part to the transition from 150mm production to 200mm production. Foundry has also been gaining share, driven by strong demand for PMIC, display driver IC, CMOS image sensor, MCU, MEMS, and other devices requiring >90nm process technology. These device technologies are cited as key components for many IoT applications.

Based on these observations, the IoT wave appears to be breathing new life into 200mm fabs. Before the advent of the IoT movement began, 2012 data suggested a decline in 200mm fabs. However, comparing the worldwide installed capacity for 200mm in 6 year intervals, we expect capacity to return to 2006 levels by 2018.

Figure 2

A number of 200mm fab projects globally are being expanded or built through the end of 2018, resulting in capacity growth through the end of that year.

The 200mm Fab Outlook report to 2018 is the industry’s first and one-of-a kind 200mm fab outlook report. It features analysis and forecasts (tables, graphs and text) in over 80 pages in Adobe Acrobat, accompanied by detailed data in an Excel spreadsheet.

This report is of critical interest to anyone who participates in the 200mm device manufacturing supply chain. The Global 200mm Fab Outlook report analyzes past trends and explores future trends out to 2018, extending the forecast period of our existing Fab Database reports.

In this new report, SEMI tracks over 200 facilities manufacturing devices on 200mm wafers, including those that are planned, under construction, installing new equipment, active, closing, or closed.  Over 110 individual companies or institutions are covered. Fab information detailed in the report includes geographic location, amount of equipment spending, capacity trends, and product type changes.

Here are some of the key highlights from the report:

  • Trend of 200mm fab count and capacity out to 2018 (compared to 150mm and 300mm)
  • 200mm Silicon wafer shipment trends
  • Capacity addition by existing and new fabs out to 2018
  • Fabs changing from smaller wafer sizes to 200mm
  • Fabs changing from 200mm to other wafer sizes (like 300mm)
  • Fabs closed (and still closed), will be closed and may be closed by region and product type
  • Fabs/lines starting operation
  • Fabs/lines losing capacity
  • Change of landscape 2006 vs 2018: capacity by region, product type and technology node
  • Top 20 companies adding capacity 2015 to 2018
  • Capacity by region 2015 to 2018
  • Capacity by product type 2015 to 2018
  • Top 20 companies for equipment spending 2015 to 2018
  • Change of landscape equipment spending 2006 vs 2018

For more information on SEMI market research and reports, visit: www.semi.org/en/MarketInfo

Samsung Electronics and Apple remained the top semiconductor buyers in 2015, representing 17.7 percent of the market, according to Gartner, Inc. Samsung Electronics and Apple together consumed $59.0 billion of semiconductors in 2015, an increase of $0.8 billion from 2014 (see Table 1).

“Samsung Electronics and Apple have topped the semiconductor consumption table for five consecutive years, but the growth of Samsung’s design total available market (TAM) was lower than the total semiconductor market in 2014 and 2015,” said Masatsune Yamaji, principal research analyst at Gartner. “Samsung and Lenovo, the fastest-growing companies over the last five years, decreased their design TAM in 2015 and the risk of revenue declines from the strongest customers for semiconductor chip vendors is increasing.”

The top 10 companies bought $123 billion of semiconductors, to account for 36.9 percent of semiconductor chip vendors’ worldwide revenue in 2015. This was down from 37.9 percent in 2014, which was worse than the semiconductor industry’s global total decrease of 1.9 percent.

Table 1. Preliminary Ranking of Top 10 Companies by Semiconductor Design TAM, Worldwide, 2015 (Millions of Dollars)

 

 

2014 Ranking

 

 

2015 Ranking

 

 

 

Company

 

 

 

2014

 

 

 

2015

 

 

Growth (%) 2014-2015

 

 

 2015 Market

Share (%) 

1

1

Samsung Electronics

30,989

29,867

-3.6

8.9

2

2

Apple

27,177

29,116

7.1

8.7

4

3

Lenovo

13,743

13,329

-3.0

4.0

5

4

Dell

10,880

10,686

-1.8

3.2

3

5

HP Inc.

15,616

8,634

-44.7

2.6

7

6

Huawei

6,040

7,020

16.2

2.1

6

7

Sony

7,631

6,947

-9.0

2.1

–

8

Hewlett Packard Enterprise

0

6,473

–

1.9

9

9

LG Electronics

5,743

5,533

-3.7

1.7

8

10

Cisco Systems

5,817

5,430

-6.7

1.6

Others

216,695

210,684

-2.8

63.1

Total

340,331

333,718

-1.9

100.0

Note: Some columns do not add to totals shown because of rounding.

Source: Gartner (January 2016)

The market decline happened partly because HP spun off its enterprise business, which bumped Toshiba from the top 10. Toshiba’s design TAM in 2015 was $4.6 billion, so the top 10 companies in 2014 (including HP Inc., Hewlett Packard Enterprise and Toshiba) represented $127.6 billion of semiconductors in 2015 on a design TAM basis, to account for 38.2 percent of semiconductor chip vendors’ worldwide revenue.

As the growth of the personal electronic device market continues to slow, the risk of revenue declines from the strongest customers for semiconductor chip vendors is increasing. Many semiconductor chip vendors, especially general-purpose chip vendors, are trying to reduce the dependency on a limited number of extremely large customers, such as Samsung Electronics, Apple and Lenovo, and are making an effort to diversify their sales targets to the fragmented long-tail small customers, so as to stabilize their business growth with a mass-marketing approach.

“Nine of the top 10 companies in the design TAM ranking for 2014 remained in the top 10 in 2015, but seven of the top 10 decreased their semiconductor demand in 2015,” said Mr. Yamaji. “The slowing of Samsung’s design TAM since 2014 should be considered a big trend change. The cycle of an inflated boom and the obsolescence of electronic equipment are becoming faster, and it is also much more difficult for leading companies to maintain their position for a long time. Current winners may not always be the winners in the future.”

More detailed analysis is available in the report “Market Insight: Top 10 Semiconductor Chip Buyers, Worldwide, 2015 (Preliminary).”