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The Obama Administration today announced the selection of North Carolina State University to lead a public-private manufacturing innovation institute for next generation power electronics. Called the Next Generation Power Electronics Institute, the new consortium will provide shared facilities, equipment and testing to companies from the power electronics industry, focusing on small and medium-sized companies. The 18 companies already committed to the consortium include: ABB, APEI, Avogy, Cree, Delphi, Delta Products, DfR Solutions, Gridbridge, Hesse Mechantronics, II-VI, IQE, John Deere, Monolith Semiconductor, RF Micro Devices, Toshiba International, Transphorm, USCi and Vacon.

The institute, backed by a $70 million investment from the Department of Energy, will focus on power electronics using wide bandgap (WBG) semiconductors, bringing together over 25 companies, universities and state and federal organizations.

wide-bandgap-infographic

“This $140 million manufacturing hub in Raleigh has the potential to fast-forward development of some products by at least a decade,” said Greg Scheu, president and CEO of ABB Inc., a Raleigh-based power electronics manufacturer. “We expect that consumers will start to see some low-voltage products, like residential solar, coming out the quickest and within five years.  The high-power products like industrial motors and drives and hog-voltage gear will take a few more years to come to market, mainly due to the rigorous reliability testing requirements of the electric utility industry.”

Power electronics – such as inverters, transformers and transistors – help control and convert electricity and are playing a growing role in electricity generation, distribution and transmission. According to a study by the Oak Ridge National Laboratory, approximately 30 percent of all power generation today utilizes power electronics between the point of generation and its end use. By 2030, this is expected to jump to 80 percent of generated electricity – supporting greater renewable energy integration and increased grid reliability. WBG semiconductor-based power electronics will be able to better withstand the power loads and switching frequencies required by next generation utility technologies.

Power electronics that use WBG semiconductors will also be smaller, more efficient and cost less. A WBG semiconductor-based inverter, which switches electricity from direct current to alternating current, could be four times more powerful, half the cost and one-fourth the size and weight of a traditional inverter. At a larger-scale, WBG semiconductors could help reduce the size of an 8,000 lbs. substation to 100 lbs. and the size of a suitcase – ultimately helping to lower the cost of electricity and build a stronger, more reliable grid.

WBG semiconductors such as silicon carbide and gallium nitride can operate at higher temperatures and have greater durability and reliability at higher voltages and frequencies.

The state of North Carolina is expected to contribute at least $10 million to the new consortium, which is expected to help bolster employment in North Carolina, as well as to help focus on manufacturing as a potential source of economic growth.

According to the official statement from the Obama administration, The Next Generation Power Electronics Institute supports President Obama’s vision for a full national network of up to 45 manufacturing innovation institutes that help make America a magnet for jobs and manufacturing and ensure that U.S. workers have the training they need to lead in the global economy.

“I see it this way,” said Mr. Scheu, “the president asked the industry to work together and see where we can replace silicon with other semiconductor materials to reduce energy loss — meaning huge energy efficiency — for equipment that can handle higher voltages, higher temperatures and higher frequencies.  To me, this is the goal.  And this is where the imagination takes off.”

Apple and Samsung remained the world’s largest buyers of semiconductor chips in 2013, but the intensifying battle between the two for the hearts and minds of consumers in their product offerings could presage another mighty showdown this year for the top ranking, according to a new report from IHS Technology.

“As in 2012, Apple and Samsung were the top semiconductor spenders in 2013 among original equipment manufacturers (OEM) making more than $1 billion in revenue,” said Myson Robles-Bruce,  senior analyst for semiconductor spend and design analysis at IHS. “Apple was in first place with chip spending in 2013 of $30.3 billion, outspending runner-up Samsung’s $22.2 billion by more than $8 billion. However, the South Korean electronics titan attained the largest spending increase on chips of any Top 10 OEM last year, up almost 30 percent from 2012 levels, compared to a smaller expansion of 17 percent on the part of Apple.”

Combined, the two claimed about 14 percent of total spending in 2013, well ahead of other prominent chip buyers. Rounding out the Top 5 are Hewlett-Packard in third place, with $10.1 billion in spending; Lenovo in fourth, with $9.2 billion; and Dell in fifth, with $7.7 billion. The rest of the Top 10 includes Cisco Systems, Sony, Huawei Technologies, Panasonic and Toshiba, as shown in the table below.

Screen Shot 2014-01-27 at 3.23.35 PM

All told, the served available market (SAM) for semiconductor spending reached $237.2 billion in 2013, up nearly 5 percent after spending dipped from $231.7 billion in 2011 to $226.7 billion in 2012.

The SAM metric counts only expenditures that an OEM made as an external agent, which gives a truer picture of the state of chip spending in the electronics industry. This is because SAM does not factor in spending by manufacturers for chip buying done at their own internal divisions—as can happen with entities like Samsung, whose internal  customers within the vast Samsung family of companies compete with external clients in sourcing Samsung-made semiconductors.

The findings are contained in the report, “Wireless and Industrial Boost Semiconductor Spending,” which tracks the semiconductor procurement of more than 200 electronics companies.

Apple and Samsung: no end seen to fierce rivalry

In the consumer market Apple and Samsung continue to face off in their smartphones and tablet offerings, where the two are locked in fierce combat. Apple remains the leader on both fronts, with its iPhone and iPad selling in greater numbers than Samsung’s Galaxy line of handsets and tablets.

Increasingly, however, Apple is finding it hard to hold ground against an onslaught of competitors—including a well-armed Samsung, Robles-Bruce noted. In smartphones, for instance, Samsung’s strategy includes an effort to sell models even in areas of the world with already high smartphone penetration. The high cost of the iPhone, in contrast, has prevented the handset from being widely adopted in developing countries where markets remain ripe for penetration—despite a recent iPhone victory in China for broad distribution and huge sales for its new Apple iPhone 5s.

Samsung’s unmistakable intention to use flexible active-matrix organic light-emitting diode (AMOLED) display technology on its product offerings could also be a future differentiator from products made by Apple, which has clearly indicated it wants nothing to do with OLED technology. If OLED technology catches on with consumers, Apple could start to suffer, which would be reflected in the California maker’s prodigious chip-buying powers.

Meanwhile in tablets, Samsung has likewise made great strides. Its share in the global tablet market has climbed to about 22 percent, closing in on Apple’s 30 percent market share, in a space that Apple virtually owned and was once thought to be impregnable.

Such volatile dynamics between the two contenders could make for another lively tug of war when figures are calculated at the end of the year for the semiconductor spending crown, with results likely to be watched closely by all quarters.

Wireless spending is still king

Spending last year on semiconductors was strongest in the wireless segment among seven different application categories.

Wireless accounted for nearly one-third of total OEM chip spending at 31 percent, followed by chip spending on computer platforms at a distant second with 22 percent. In third place was chip spending on consumer devices, at 16 percent.

The remaining four categories claimed single-digit share in total OEM chip spending. These segments include industrial, automotive, wired communications and computer peripherals.

The top OEM buyers in the wireless segment were Apple, Samsung, Huawei, ZTE and LG. And for the first time, spending on tablets overtook that on wireless infrastructure. Both were still well behind handsets, which remained far and away the top category for OEM chip spending in the wireless segment.

Wireless was also the fastest-growing application segment this year, up 20 percent; with industrial electronics in second place, up 7 percent.

Intel vs. TSMC: An Update


January 21, 2014

By Zvi Or-Bach, President and CEO of MonolithIC 3D

On January 14, 2014 we read on the Investors.com headlines page – Intel Seen Gaining Huge Pricing Advantage Over TSMC. Just three days later comes the responding headline: TSMC: We’re “Far Superior” to Intel and Samsung as a Partner Fab.

These kinds of headlines are not seen too often in the semiconductor business domain and it is not clear what the objectives are for such. It will be hard to believe that this is an attempt to manipulate the investor community, yet there are only a handful of super high volume design wins that are driving the leading edge devices, and for those wins the fight should be taking place in the ‘board’ room. So, let’s dive a bit into the details behind these headlines.

The first headline relates to Jefferies analyst Mark Lipaci releasing an analysis report stating: “Intel will have a die size and transistor cost advantage over Taiwan Semiconductor (TSM) for the first time by fourth-quarter 2014, which could lead to a 50% pricing advantage in processors in 12 months, and a 66% pricing advantage in 36 months.” We can find more information in the blog titled: Intel: Primed for Major Phone, Tablet Share on Cheaper Transistors, Says Jefferies. Quoting Lipaci: “At the same time that Intel has started focusing on computing devices in mobile form factors, it appears that TSMC is hitting a wall on the transistor cost curve. The chart below was presented by TSMC’s CTO. We believe that due to Intel’s larger R&D budget, its recent focus on the mobile/tablet market, and its higher R&D spend relative to TSMC, that it will produce a lower cost transistor than TSMC for the first time ever in 4Q14. We believe Intel extends that cost lead 24 months after than in 2016.”

Lipaci then used the following chart to illustrate the build up of Intel advantage vs. TSMC.

Chart 1

The Jefferies report goes further and provides the following charts for 14nm and 10nm.

Chart 2 Chart 3

Clearly, the primary advantage that the report is pointing out is the lack of the double margin associated with the foundry model vs. the IDM model. It seems that this argument has clearly been disproven by now. In the early days of the foundry industry most IDMs would argue that the foundry model would not work because of the double margin aspect – the foundry would need about 50% gross margin and then the fables company would need an additional 50% gross margin – which would make it completely uncompetitive vs. the IDM. Twenty years later it was proven, again, that there is no “free lunch.” The chip fabrication business needs a margin to be sustainable and the design business needs a margin to be sustainable. And the better business model is to have those managed by different companies as each could build excellence in its own value proposition. Intel did enjoy for many years effective exclusivity in the Windows based processors. Intel has not been able so far to show much success in mobile or any other non-Windows market. Since Intel is now trying to position themselves as a better foundry than TSMC, then clearly for their potential foundry customers this double margin argument is moot.

The charts above also compare Intel’s cost advantage vs. TSMC older nodes (Intel’s 14nm vs. TSMC’s 20 nm and Intel’s 10nm vs. TSMC’s 16nm). It is not clear that Intel is so far ahead. Intel 14nm had been delayed to the first quarter of 2014 and TSMC has committed to be in volume production in the later part of 2014. But the real competition is on the ability to bring fabless companies to volume using one’s advanced process node. Key to this is the availability of libraries, EDA full tool set support, and major IP such as ARM processors. It is far from being clear that Intel is really far ahead of TSMC in this critical area. And then, these days it is not so clear that using a more advanced process node buys one an end-device cost advantage. In fact, the foundries have already made it clear that beyond the 28nm node they do not see cost reduction, due to the extra cost associated with advanced node lithography and other issues. Even Intel admitted at their latest analyst day that advanced nodes are associated with escalating depreciation and other costs, as illustrated by the following Intel chart – see the left most graph.

Chart 4

We should note that the Y axes of these graphs are logarithmic which indicate a significant increase of deprecation costs. However, Intel claims it will more than neutralize this increase of costs by accelerating the dimensional scaling when going to 14nm and 10nm, as is presented with the middle graph above. This would lead to an overall sustaining of the historical cost per transistor reduction as is illustrated by the rightmost graph above. Note: the asterisk (*) on those graphs indicates that numbers relating to 14nm and 10nm are forecasts only. Since Intel is committed to be in volume production at the 14nm node any day now, the number associated with 14nm should not be a forecast anymore and we hope to see them released soon.

The simple indication of technology node effective transistor density these days would be the bit cell size. As we have presented many times before, modern SoC device area is dominated by the embedded 6T SRAM. At IEDM 2013, TSMC made public their 6T SRAM bit cell area for 16nm: 0.07 sq. micron. We could not find any Intel public release for their 14nm 6T SRAM bit cell size. We did find an Intel chart for older nodes. This 6T bit cell size chart was presented at IDF2012:

Chart 5

Accordingly, the 14nm node 6T SRAM size for conventional dimensional scaling should be 0.092 * (14/22)² = 0.037 sq. micron. And if Intel can really scale more aggressively to compensate for the extra capital costs then their 6T SRAM at 14nm should be about 0.03 sq. micron or even smaller. As we don’t have any official number we could wait until their early production devices of the 14nm node get analyzed or to the eventual release of their number. But short of an official number, we did find a 2013 presentation from the TRAMS project, of which Intel is a partner, as illustrated in the following charts:

Chart 6 Chart 7

It is now clear that EUV will not be available for the 14nm node, and accordingly the bit cell size from the chart above is 0.062 sq. micron. This is a bit better than that of TSMC but a far cry from 0.03 sq. micron.

If Intel does have a really good number, it would be reasonable to expect that they will make it public soon, to entice the high volume fabless companies such as Qualcomm and Apple to explore Intel’s foundry option.

As for the Jefferies analyst assertion “We believe that due to Intel’s larger R&D budget, its recent focus on the mobile/tablet market, and its higher R&D spend relative to TSMC, that it will produce a lower cost transistor than TSMC”, it is not clear if Intel’s R&D budget is truly larger. TSMC’s R&D budget is dedicated to the foundry side of the business while Qualcomm, Apple, ARM and many other fabless vendors R&D budgets support the design part of any new product release. The total ecosystem behind TSMC and ARM is clearly not smaller than that of Intel. In this month’s SEMI ISS Conference, IC Insights provided very interesting numbers regarding the record of 2013 as was reported in a blog titled: Is Intel the Concorde of Semiconductor Companies?

Top 10 CAPEX Spenders in 2013:

  1. Samsung $12B
  2. TSMC $11.2B
  3. Intel $10.5B
  4. GF $5.5B
  5. SK Hynix $3.7B
  6. Micron $3B
  7. Toshiba $2.9B
  8. UMC $1.5B
  9. Infineon $880M
  10. 10.ASE (OSAT) $770M

Yes, Samsung and TSMC both outspent Intel. Just wait until you see the capacity numbers and you will know why.

Top 10 IC Wafer Capacity Leaders in 2013:

  1. Samsung 12.6%
  2. TSMC 10%
  3. Micron 9.3%
  4. Toshiba 8%
  5. SK Hynix 7%
  6. Intel 6.5%
  7. ST 3.5%
  8. UMC 3.5%
  9. GF 3.3%

10.TI 3.0%

Clearly, Intel is not larger than TSMC as a foundry and it is not clear why would it have a sustainable per transistor cost advantage.

Cost is important but it is far from being the only parameter when choosing a foundry partner. Selecting a foundry partner is truly selecting a partner. The design of leading edge devices is a very costly and lengthy effort, and has a pivotal effect on the business success for the fabless customer. TSMC had built trustful relationships for many years with its fabless customers. It is not clear how easy it is going to be for Intel to become a trustful foundry partner. So far it seems that Intel is still a proud IDM that insists that its customer will support its branding like the “Intel Inside” campaign or the recent announcement of Branding the cloud: Intel puts its stamp on cloud services across the globe. Intel’s repeating emphasis of their transistor cost advantage vs. that of TSMC suggests that Intel considers TSMC as their main competition for the mobile and tablet business. But then their consistent offering of SoC products for the space, as illustrated by the recent Intel chart below, and the Jefferies’ cost analysis above, suggests that Intel is actually an IDM competing with the likes of Qualcomm in this space. It may create concerns in the minds of potential fables customers.

Chart 8

And as a final note, we don’t know how much better the Intel process at 14nm and 10nm is vs. that of TSMC. We do know that when we ask someone for directions, if he says ‘make a right turn’ but with his hand he is pointing left, we should go ahead and turn left. So along with all of these confusing statements we learned just this week that Intel Cancels Fab 42, which was supposed to be the most advanced large capacity fab effort of Intel. I wonder if it should be considered as the hand pointing….

The market for semiconductor packaging materials, including thermal interface materials, is expected to maintain its $20 billion value through 2017, despite shifts away from the use of precious metals such as gold in wire bonding, according to a new study by SEMI and TechSearch International.  Despite continued price pressure, organic substrates remain the largest segment of the market, worth an estimated $7.4 billion globally in 2013 growing to more than $8.7 billion by 2017. Most packaging material segments are encountering low revenue growth as end users seek lower cost solutions for packaging and downward pricing pressures are severe. In addition, the transition to copper and silver bonding wire has significantly reduced impact of gold metal pricing in wire bond packages.

The SEMI report, titled “Global Semiconductor Packaging Materials Outlook—2013/2014 Edition,” covers laminate substrates, flex circuit/tape substrates, leadframes, bonding wire, mold compounds, underfill materials, liquid encapsulants, die attach materials, solder balls, wafer level package dielectrics and thermal interface materials.

Several areas are experiencing stronger growth. The expansion of CSPs with laminate substrates is driven by explosive growth in mobile computing and communications devices such as smartphones and tablets.  The same products are driving growth in wafer level packages (WLPs), which are in turn driving use of dielectric materials used for redistribution.  The growth in flip chip adoption continues to expand the market for underfill materials.  A number of key segments are seeing a consolidation of the supplier base, though new entrants in Asia are entering some segments.

Semiconductor Packaging Materials Segment Estimate of 2013Global Market

($M)
Organic Substrates

$7,408
Leadframes

$3,342
Bonding Wire

$4,455
Mold Compounds

$1,394
Underfill Materials

$208
Liquid Encapsulants

$849
Die Attach Materials

$665
Solder Balls

$280
Wafer Level Package Dielectrics

$94
Thermal Interface Materials

$620

 

The findings in the report are based on more than 150 in-depth interviews conducted with packaging subcontractors, semiconductor manufacturers and materials suppliers.  It includes previously unpublished data on revenue, unit shipments and market shares for each packaging material segment; a five-year forecast of revenue and units (2012-2017); supplier rankings (for key segments) and listing (including new players); and an analysis of regional market trends and size.

The report also identifies important technology and business trends affecting the packaging materials market, as well as opportunities for suppliers. Some of the key opportunities include:

  • Thinner substrates for packages in mobile products and leading-edge CSP substrates to handle fine bump pitch of ≤110 µm
  • Alternatives to the typical epoxy or acrylic resin for thermal interface materials, including filler technologies such as carbon nanotubes or new approaches using graphene
  • Softer Pd-coated copper wire for circuit under pad applications
  • Low moisture level sensitivity mold compounds and encapsulants for bare copper and silver alloy wire
  • Die attach film materials with thickness 10 µm and under
  • No-flow underfill materials
  • Continued trend of Pb-free solder balls for BGAs and CSPs, smaller diameter balls for WLP
  • Wafer-level package dielectrics with low temperature cure, lower dielectric constant, and lower cost

This information was derived from the SEMI Global Semiconductor Packaging Materials Outlook—2013-2014 Edition (www.semi.org/en/node/45446).

Compiled by Shannon Davis, Web Editor

main page

This week in Las Vegas, the 2014 International Consumer Electronics Show focused on the Internet of Things, displaying many connected gadgets and services. This year’s show featured more than 3,200 exhibitors, many of which were excited to show off new Internet-enable devices.

Click through our slideshow of highlights for an overview of the show.

CLICK HERE TO LAUNCH SLIDESHOW

As of December 2013, Samsung had the most installed wafer capacity with nearly 1.9 million 200mm-equivalent wafers per month.  That represented 12.6 percent of the world’s total capacity and most of it used for the fabrication of DRAM and flash memory devices.  Next in line was the largest pure-play foundry in the world TSMC with about 1.5 million wafers per month capacity, or 10.0% of total worldwide capacity.  Following TSMC were memory IC suppliers Micron, Toshiba/SanDisk, and SK Hynix.

In January 2013, Micron and Nanya amended their Inotera partnership such that Micron now takes 95 percent of Inotera’s wafer output.  Previously, Micron and Nanya evenly split Inotera’s capacity.  Then, in July 2013, Micron finally closed the deal on its acquisition of Elpida Memory and the Rexchip business in Taiwan that Elpida operated in partnership with Powerchip.  It took Micron a full year to complete the purchase after several delays with getting approvals from bondholders and governments.  With the addition of the Elpida and Rexchip fabs as well as the extra Inotera capacity, Micron became the third-largest wafer capacity holder in the world in 2013 with nearly 1.4 million 200mm-equivalent wafers per month (9.3 percent of total worldwide capacity).  At the end of 2012, Micron had the sixth-largest amount of wafer capacity.

The fourth-largest capacity holder at the end of 2013 was Toshiba with a little under 1.2 million in monthly wafer capacity (8.0 percent of total worldwide capacity), including a substantial amount of flash memory capacity for joint-investor/partner SanDisk.  After Toshiba came another memory IC supplier SK Hynix with a little more than one million wafers/month (7.0 percent of total worldwide capacity). Rounding out the top six companies was Intel with 961K 200mm-equivalent wafers per month capacity, or 6.5 percent of total worldwide capacity.  Just two years ago in 2011, Intel was the third-largest capacity leader, but in early 2012 the company reduced its ownership position in IM Flash as well as its wafer output share from its joint venture with Micron.

bulletin20140108Fig01

The three largest pure-play foundries—TSMC, GlobalFoundries, and UMC—are ranked in the top 10 listing of capacity leaders.  In total, these three companies have held about 80 percent of the worldwide pure-play foundry market since 2010.  Moreover, these three foundries had a combined capacity of about 2.5 million wafers per month as of December 2013, representing about 17 percent of the total fab capacity in the world.

The combined capacity of the top-5 leaders accounted for 47 percent of total worldwide capacity in Dec-2013.  At the same time, just over two-thirds (67 percent) of the world’s capacity was represented by the combined capacity of the top-10 leaders, while the top 15 accounted for 76 percent and the top 25, 85 percent, of worldwide installed IC capacity in Dec-2013.  It should be noted that the shares of these groups have each increased significantly since 2009.  The top-5 group gained 11 percentage points; the top-10 group, 13 points; the top-15 group, 12 points; and the top-25 group, seven points.  Those are big gains over the course of just four years!

IC manufacturing is increasingly becoming a high stakes poker game with enormous up-front costs. Today, it costs $4.0-$5.0 billion for a high-volume state-of-the-art 300mm wafer fab and the cost to build tomorrow’s 450mm wafer fab will probably be double that.  Despite the cost-per-unit area advantage that larger wafers provide, there are fewer and fewer companies willing and able to continue investing that kind of money.

IC Insights believes that the capacity shares of the top 5, 10, 15, and 25 leaders will continue to increase over the next several years as the big get bigger, middle-tier manufacturers merge to consolidate resources and improve competitiveness, and a greater number of mid- to small-size companies move away from in-house IC fabrication and move toward using third-party foundries.

Rankings of IC manufacturers by installed capacity for each of the wafer sizes are shown in Figure 2. Looking at the ranking for 300mm wafer capacity, it is not surprising that the list includes only DRAM and flash memory suppliers like Samsung, Toshiba, Micron, SK Hynix, and Nanya; the industry’s biggest IC manufacturer and dominant MPU supplier Intel; and the world’s three largest pure-play foundries TSMC, GlobalFoundries, and UMC.  These companies offer the types of ICs that benefit most from using the largest wafer size available to best amortize the manufacturing cost per die.  The ranking for the smaller wafer sizes (i.e., ≤150mm) includes a more diversified group of companies.

bulletin20140108Fig02

A significant trend with regard to the industry’s IC manufacturing base, and a worrisome one from the perspective of companies that supply equipment and materials to chip makers, is that as the industry moves IC fabrication onto larger wafers in bigger fabs, the group of IC manufacturers continues to shrink in number.  There are just 36% the number of companies that own and operate 300mm wafer fabs than 200mm fabs and the distribution of worldwide 300mm wafer capacity among those manufacturers is very top-heavy.  Essentially, there are only about 15 companies that comprise the entire future total available market (TAM) for leading-edge IC fabrication equipment and materials. When 450mm wafer fabrication technology comes into production, this manufacturer group is predicted to shrink even further to a maximum of just 10 companies.

Intel ends 2013 with a bang


December 18, 2013

ABI Research verified that Intel has a leading position in the mobile processor technology race; launching the first 22nm mobile application processor. The 22nm quad-core application processor (Intel Z3740D) was found in a Dell tablet that was recently launched for the Christmas season.

Core transistor

Core transistor

“2013 saw a number of new processor launches with 32nm and 28nm technology (most from fabless companies) but Intel has used one of its core advantages [process technology] to pass them all,” Jim Mielke, VP of engineering at ABI Research, commented. “The 22nm process node used for the Z3740D is not just the smallest geometry in a mobile device today; it also introduces a new transistor. The core transistor structure used in the 22nm Z3740D is quite different than structures used in previous generations. The core transistor found in the device ABI Research analyzed (picture attached) has a gate that surrounds source/drain diffusion fins on three sides giving it the name tri-gate or 3D transistor.

The introduction of the 1.86GHz processor in a Dell product also hints to Dell renewing its commitment to the tablet market. Being first to introduce products with leading edge technology, like the Z3740D 22nm processor, is a good start for the company. Key sensors and interface devices found in the tablet included Knowles MEMS microphones, STM sensors and sensor hub, and Synaptics touch screen controller.

These findings are part of ABI Research’s Teardown Services (https://devices.abiresearch.com/). A complete teardown of the Dell Tablet with the Intel Z3740D and accompanying chips is available from ABI Research.

Compiled by Shannon Davis, Web Editor

This week, industry leaders and experts have gathered in Washington D.C. at the 59th annual IEEE International Electron Device Meeting (IEDM) conference. The IEDM presents more leading work in more areas of the field than any other technical conference, encompassing silicon and non-silicon device technology, molecular electronics, nanotechnology, optoelectronics, MEM/NEMS, energy-related devices and bioelectronics. The 59th annual IEDM conference includes a strong overall emphasis on circuit-device interaction, advanced semiconductor manufacturing, and biomedical devices.

Solid State Technology‘s Pete Singer is on site all week, and we will be getting insight from bloggers and industry partners. Browse our slideshow of highlights from abstracts being presented this week.

Click here to start slideshow

Related blogs and articles:

Challenges of 10nm and 7nm CMOS at IEDM

IEDM’s special focus session highlights diverse challenge

Chipworks: IEDM 2013 Preview

Worldwide semiconductor revenue totaled $315.4 billion in 2013, a 5.2 percent increase from 2012 revenue of $299.9 billion, according to preliminary results by Gartner, Inc. The top 25 semiconductor vendors’ combined revenue increased 6.2 percent, a significantly better performance than the rest of the market, whose revenue growth was 2.9 percent. This was, in part, due to the concentration of memory vendors, which saw significant growth in the top ranking.

Read more: Will 2014 be the next Golden Year?

“After a weak start to 2013 due to excess inventory, revenue growth strengthened in the second and third quarters before leveling off in the fourth quarter. Memory, in particular DRAM, led this growth, not due to strong demand, but rather weak supply growth,” said Andrew Norwood, research vice president at Gartner. “In fact, the overall market faced a number of demand headwinds with PC production declining 9 percent and the premium smartphone market showing signs of saturation, with growth tilting toward lower-priced, entry-level and midrange smartphone models. These demand headwinds become very visible when looking at revenue growth outside of memory, where the rest of the semiconductor market could only muster 0.4 percent growth.”

Intel recorded a 2.2 percent revenue decline (see Table 1) as strong performance in its data center and embedded systems group was not enough to offset a declining PC market, and limited traction and declining prices for its tablet and smartphone solutions. However, the company maintained the No. 1 market share position for the 22nd consecutive year, capturing 15.2 percent of the 2013 semiconductor market, down slightly from its peak of 16.5 percent in 2011.

Table 1. Top 10 Semiconductor Vendors by Revenue, Worldwide, 2013 (Millions of Dollars)

Rank 2012 Rank 2013 Vendor

2012 Revenue

2013 Estimated Revenue

2012-2013 Growth (%)

2013 Market Share (%)

1

1

 Intel

49,089

48,030

-2.2

15.2

2

2

 Samsung Electronics

28,622

29,644

3.6

9.4

3

3

 Qualcomm

13,177

17,276

31.1

5.5

7

4

 SK Hynix

8,965

12,836

43.2

4.1

10

5

 Micron Technology

6,917

11,814

70.8

3.7

5

6

 Toshiba

10,610

11,467

8.1

3.6

4

7

 Texas Instruments

11,111

10,561

-5.0

3.3

8

8

 STMicroelectronics

8,415

8,060

-4.2

2.6

9

9

 Broadcom

7,846

8,011

2.1

2.5

6

10

 Renesas Electronics

9,152

7,761

-15.2

2.5
    Others

146,008

149,930

2.7

47.5
    Total

299,912

315,390

5.2

100

Source: Gartner (December 2013)

As a group, memory vendors outperformed the rest of the semiconductor industry.

“Within the memory market DRAM was in the midst of a strong rebound following two years of revenue decline; the recovery started at the end of 2012 when the market was moving back into an undersupply due to lack of new capacity resulting in commodity DRAM pricing more than doubling during the year,” said Mr. Norwood.

Read more: Expect big changes to the 2013 Top 20 Semi Supplier ranking

SK Hynix and Micron Technology benefited the most from the strong memory market, propelling them both into the top five for the first time. SK Hynix’s revenue increased 43.2 percent, the strongest organic growth in the top 25. The revenue growth was due to its exposure to the booming commodity DRAM market as the industry entered an undersupply and pricing surged. Revenue could have been higher had it not been for a major fire at the company’s DRAM fab in Wuxi, China, which accounted for 50 percent of the company’s DRAM production.

Micron Technology saw the biggest revenue growth among the top 25 due to its midyear acquisition of Elpida Memory. The company benefited from the recovery in commodity DRAM pricing and strong growth for low-power DRAM where Elpida is strong. In NAND flash, Micron was able to aggressively push its NAND into the computing segment, which is projected to represent roughly 60 percent of its demand this year. Had all of Elpida’s revenue been included in the Micron number — rather than just the second half — then the U.S. company would have jumped ahead of rival SK Hynix in the rankings.

Vendor Relative Industry Performance

Market share tables by themselves give a good indication of which vendors did well or badly during a year, but they do not tell the whole story. More often than not, a strong or weak performance by a vendor is a result of the overall market growth of the device areas that the vendor participates in. Gartner’s Relative Industry Performance (RIP) index measures the difference between industry-specific growth for a company and actual growth, showing which are transforming their businesses by growing share or moving into new markets.

Market leaders in Gartner’s RIP index were MediaTek and Qualcomm, two mobile handset suppliers, which grew 35 percent and 28 percent better than their respective markets. MediaTek accomplished this by focusing on the low- and mid-tier handset segments in China and other emerging markets, a segment of the handset market that is still booming, while Qualcomm dominated the Tier 1 OEMs and high-end segments and wrestled share away from its competitors.

On the other hand, four companies underperformed expectations by more than 10 percent — Rohm, Renesas Electronics, Samsung Electronics and Sony. The three Japanese vendors were hit hard by the rapid devaluation of Japanese currency. While depreciation of a currency is generally considered as a positive factor for companies to be more competitive when exporting their products, the reality is that the main customers of Japanese semiconductor vendors are typically domestic, and pricing is mostly based in Japanese yen. As the result, yen-based revenue suffers when converted to dollars.

Samsung Electronics maintained the No. 2 position for the 12th year in a row but its overall growth was below the market and its performance in the RIP index was poor. Three reasons are behind this. First, Gartner excludes revenue generated from the fabrication of the latest chips for Apple as this is foundry revenue and not merchant sales, so they are captured separately. Secondly, DRAM revenue growth was less than the market due to Samsung’s low exposure to commodity DRAM, which saw a strong price rebound, and the fact that it faced increased competition in low-power DRAM where it is strong. Thirdly, the company’s own handset business reduced its reliance on the Exynos processor and baseband processor from Samsung’s semiconductor operation in favor of competitor Qualcomm.

Additional information is provided in the Gartner report “Market Share Analysis: Preliminary Total Semiconductor Revenue, Worldwide, 2013.” The report provides the worldwide market share rankings for the top 25 semiconductor vendors in 2013. The report is available on Gartner’s website.

Can Intel beat TSMC?


November 25, 2013

By Zvi Or-Bach, president and CEO of MonolithIC 3D

Intel CEO Brian Krzanich, in the company Investor Meeting, presented company expansion focused on a foundry plan on Nov. 21, 2013. “You will see us focusing on a broader set of customers,” said Krzanich. “If somebody can use our silicon, and make computing better, than we want it to run better on Intel. It’s inclusive, it’s all-inclusive,” Krzanich added, as covered by Barron’s blog  Intel: Competitors Have Given Up ‘Scaling’ Advantage in Moore’s Law

Intel clearly believes that it can beat the pure play foundries by an ongoing reduction of transistor cost while improving performance and power with dimensional scaling – essentially maintaining the trend of Moore’s law just as in the past. Intel will “not take our foot off the pedal” of process technology, Krzanich explained, and he expects the company to be making parts as small as 10 nanometers in transistor size by 2015, versus today’s 22 nanometer parts. He was followed by Bill Holt, Intel’s EVP and head of semiconductor manufacturing, showing the following slide describing Intel expectations to drive down the cost per transistor.

Fig 1

Maintaining dimensional scaling is in-line with Holt’s previous slide presented at the Jefferies May 2013 Analyst Meeting:

Fig 2

Here we observe the first discrepancy where Intel says they are “continuing to scale while others are pausing to do FinFETS,” while the other foundries say that their transistor cost will not be reduced for nodes below 28nm. This was made very clear by GlobalFoundries in it recent seminars and is nicely illustrated in this ASML Semicon West 2013 slide:

Fig 3

This has also been generally accepted by analysts. Below is a slide from IBS’s Handel Jones presentation at the CEA-LETI day in June of this year:

Fig 4

Some may argue that Intel will have a hard time competing as a foundry due to potential customer concern of Intel as a competitor. This is a valid point, but it did not stop Apple to buy cell phone devices from Samsung.

Some may argue that Intel will have hard time competing due to the lack of broad EDA and IP support. This is also a valid point but Intel does not need to win all fabless designs. If Intel wins just the few super high volume designs, it may well win the war.

Some may argue that “Intel announced their high volume mobile SoFIA chips are mask fabricated at external foundry and do not use Intel internal manufacturing for at least next 2 years (2014-15). ALL of Intel’s production for standalone modem chips today is outside Intel. Conclusion being Intel still does not have the right silicon technology for mobile computing which is why X86 less than 0.1% of Smartphone market,” as one commenter at Intel Nears Foundry Inflection Point blog. This might be why Holt presented Intel’s plan to develop foundry-type processes.

“Those products were optimized primarily for performance, and so Intel had avoided the problem that can crop up when transistors are packed more densely, namely that performance of the wires connecting transistors, the interconnects, can degrade. We didn’t scale the wires as much as we could have, because the products we were building didn’t demand that.” Now, he said, “the company’s technology would be focused more on those interconnects as Intel takes the scaling lead. The result would be the ability to more nimbly move between transistors optimized for performance, on the one hand, as in server and desktop chips, and transistors optimized for low-power mobile devices.” as illustrated below:

Fig 5

It would seem that if Intel could scale transistor cost as they have done in the last 40 years then they could win these super high volume consumer-oriented designs where cost is extremely important. And TSMC is clearly taking this seriously. As was made public after they lost Altera to Intel, TSMC aligned itself to face head-on Intel’s challenge by expediting the development of FinFet technology.

As TSMC’s P/E is 14.42 while Intel’s P/E is only 12.87 the market should have responded very well to these presentations but apparently it did not — and in reverse to NASDAQ trend, Intel stock fell more than 5% the day after:

(Click to view full screen.)

(Click to view full screen.)

Nor did Altera’s stock perform well since announcing the move to Intel as a foundry, especially when compared to Xilinx who choose to stay with TSMC, as the stock price chart below illustrates:

(Click to view full screen.)

(Click to view full screen.)

The Stock market might be wrong, as it been wrong many times before, but then there are other concerns:

Why did Intel feel the need to put so much money in the ASML EUV program if they can do just as well without EUV? Does Intel reduced cost per transistor account for its escalating cost of R&D, which in 2013 averaged more than 20% of revenue vs. less than 14% in 2005? Does Intel reduced cost per transistor account for its escalating cost of capital, which, per their balance sheet on Depreciation/Depletion, averaged in 2013 more than 26% of revenue vs. less than 10% in 2011?

It is not clear what the Intel proprietary technology is that allows it to do so much better than the foundries to produce a per transistor cost reduction. It does seem that their fab equipment and especially lithography is the same. And it also unclear why the Intel per transistor costs are not impacted by the much higher cost of lithography with the double and quadruple litho steps needed in manufacturing these advanced process nodes and the extra development and process steps required.

There is one more important issue that seems to be ignored. For SoC applications, the embedded SRAM is a key factor because it dominates the die area, as we recently presented in our blog Are we using Moore’s name in vain? If Intel’s embedded SRAM is scaling each node as before, then it would represent an important advantage over the foundries. Yet Intel recently announced integration of DRAM into Haswell and promised future Xeon and Xeon Phi models that integrate memory atop processors in 3D packages instead. Will these be aggressive enough to keep the on-system memory costs scaling?

Fig 9

In short, if Intel could keep the traditional 30% cost reduction per node from 28nm to 10nm, and the foundry’s cost per transistor is staying flat, then Intel would be able to provide their foundry customers SoC products at a third of ther other foundries cost, and accordingly Intel should be able to do very well in its foundry business.