Tag Archives: Top Story Left

By Jay Chittooran, SEMI Public Policy

Following through on his 2016 campaign promise, President Trump is implementing trade policies that buck conventional wisdom in Washington, D.C. and among U.S. businesses. Stiff tariffs and the dismantling of longstanding trade agreements – cornerstones of these new actions – will ripple through the semiconductor industry with particularly damaging effect. China, a chief target of criticism from President Trump, has again found itself in the crosshairs of the administration, with trade tensions rising to a fever pitch.

The Trump Administration has long criticized China for what it considers unfair trade practices, often zeroing in on intellectual property. In August 2017, the Office of the U.S. Trade Representative (USTR), charged with developing and recommending U.S trade policy to the president, launched a Section 301 investigation into whether China’s practice of forced technology transfer has discriminated against U.S. firms. As the probe continues, it is becoming increasingly clear that the United States will impose tariffs on China based on its current findings. Reports suggest that the tariffs could come soon, hitting a range of products from consumer electronics to toys. Other measures could include tightening restrictions on the trade of dual-use goods – those with both commercial and military applications – curbing Chinese investment in the United States, and imposing strict limits on the number of visas issued to Chinese citizens.

With China a major and intensifying force in the semiconductor supply chain, raising tariffs hangs like the Sword of Damocles over the U.S. and global economies. A tariff-ignited trade war with China could stifle innovation, undermine the long-term health of the semiconductor industry, and lead to unintended consequences such as higher consumer prices, lower productivity, job losses and, on a global scale, a brake on economic growth.

Other recently announced U.S. trade actions could also cloud the future for semiconductor companies. The Trump administration, based on two separate Section 232 investigations claiming that overproduction of both steel and aluminum are a threat to U.S. national security, recently levied a series of tariffs and quotas on every country except Canada and Mexico. While these tariffs have yet to take effect, the mere prospect has angered U.S. trading partners – most notably Korea, the European Union and China. Several countries have threatened retaliatory action and others have taken their case to the World Trade Organization.

Trade is oxygen to the semiconductor industry, which grew by nearly 30 percent last year and is expected to be valued at an estimated $1 trillion by 2030. Make no mistake: SEMI fully supports efforts to buttress intellectual property protections. However, the Trump administration’s unfolding trade policy could antagonize U.S. trade partners.

For its part, SEMI is weighing in with USTR on these issues, underscoring the critical importance of trade to the semiconductor industry as we educate policymakers on trade barriers to industry growth and encourage unobstructed cross-border commerce to advance semiconductors and the emerging technologies they enable. On behalf of our members, we continue our work to increase global market access and lessen the regulatory burden on global trade. If you are interested in more information on trade, or how to be involved in SEMI’s public policy program, please contact Jay Chittooran, Public Policy Manager, at [email protected].

Originally published on the SEMI blog.

Qualcomm Incorporated (NASDAQ: QCOM) received a Presidential Order to immediately and permanently abandon the proposed takeover of Qualcomm by Broadcom Limited (NASDAQ: AVGO). Under the terms of the Presidential Order, all of Broadcom’s director nominees are also disqualified from standing for election as directors of Qualcomm.

Qualcomm was also ordered to reconvene its 2018 Annual Meeting of Stockholders on the earliest possible date, which based on the required 10-day notice period, is March 23, 2018. Stockholders of record on January 8, 2018 will be entitled to vote at the meeting.

Broadcom’s official statement after receiving the order was to strongly disagree that its proposed acquisition of Qualcomm raises any national security concerns.

“This should be viewed as a very positive event not only for Qualcomm but also for the market as a whole,” said Stuart Carlaw, Chief Research Officer at ABI Research. “The combined entity would have had dangerously dominant positions in some core markets such as location technologies, Wi-Fi, Bluetooth, RF hardware and automotive semiconductors. A diverse supplier ecosystem will be key to supporting the IoT as well as vertical market developments such as smart mobility and smart manufacturing.”

The Presidential Order is available at: https://www.whitehouse.gov/presidential-actions/presidential-order-regarding-proposed-takeover-qualcomm-incorporated-broadcom-limited/.

 

Historically, the DRAM market has been the most volatile of the major IC product segments.  A good example of this was displayed over the past two years when the DRAM market declined 8% in 2016 only to surge by 77% in 2017! The March Update to the 2018 McClean Report (to be released later this month) will fully detail IC Insights’ latest forecast for the 2018 DRAM and total IC markets.

In the 34-year period from 1978-2012, the DRAM price-per-bit declined by an average annual rate of 33%. However, from 2012 through 2017, the average DRAM price-per-bit decline was only 3% per year! Moreover, the 47% full-year 2017 jump in the price-per-bit of DRAM was the largest annual increase since 1978, surpassing the previous high of 45% registered 30 years ago in 1988!

In 2017, DRAM bit volume growth was 20%, half the 40% rate of increase registered in 2016.  For 2018, each of the three major DRAM producers (e.g., Samsung, SK Hynix, and Micron) have stated that they expect DRAM bit volume growth to once again be about 20%.  However, as shown in Figure 1, monthly year-over-year DRAM bit volume growth averaged only 13% over the nine-month period of May 2017 through January 2018.

Figure 1 also plots the monthly price-per-Gb of DRAM from January of 2017 through January of 2018.  As shown, the DRAM price-per-Gb has been on a steep rise, with prices being 47% higher in January 2018 as compared to one year earlier in January 2017.  There is little doubt that electronic system manufacturers are currently scrambling to adjust and adapt to the skyrocketing cost of memory.

DRAM is usually considered a commodity like oil.  Like most commodities, there is elasticity of demand associated with the product.  For example, when oil prices are low, many consumers purchase big SUVs, with little concern for the vehicle’s miles-per-gallon efficiency.  However, when oil prices are high, consumers typically look toward smaller or alternative energy (e.g., hybrid or fully electric) options.

Figure 1

Figure 1

While difficult to precisely measure, it is IC Insights’ opinion that DRAM bit volume usage is also affected by elasticity, whereby increased costs inhibit demand and lower costs expand usage and open up new applications.  As shown in Figure 1, the correlation coefficient between the DRAM price-per-bit and the year-over-year bit volume increase from January 2017 through January 2018 was a strong -0.88 (a perfect correlation between two factors moving in the opposite direction would be -1.0).  Thus, while system manufacturers are not scaling back DRAM usage in systems currently shipping, there have been numerous rumors of some smartphone producers scaling back DRAM in next-generation models (i.e., incorporating 4GB of DRAM per smartphone instead of 5GB).

In 2018, IC Insights believes that the major DRAM suppliers will be walking a fine line between making their shareholders even happier than they are right now and further alienating their customer base.  If, and it is a BIG if, the startup Chinese DRAM producers can field a competitive product over the next couple of years, DRAM users could flock to these new suppliers in an attempt to get out from under the crushing price increases now being thrust upon them—with the “payback” to the current major DRAM suppliers being severe.

Each year, Solid State Technology turns to industry leaders to hear viewpoints on the technological and economic outlook for the upcoming year. Read through these expert opinions on what to expect in 2018.

Enabling the AI Era with Materials Engineering

Screen Shot 2018-03-05 at 12.24.49 PMPrabu Raja, Senior Vice President, Semiconductor Products Group, Applied Materials

A broad set of emerging market trends such as IoT, Big Data, Industry 4.0, VR/AR/MR, and autonomous vehicles is accelerating the transformative era of Artificial Intelligence (AI). AI, when employed in the cloud and in the edge, will usher in the age of “Smart Everything” from automobiles, to planes, factories, buildings, and our homes, bringing fundamental changes to the way we live

Semiconductors and semiconductor processing technol- ogies will play a key enabling role in the AI revolution. The increasing need for greater computing perfor- mance to handle Deep Learning/Machine Learning workloads requires new processor architectures beyond traditional CPUs, such as GPUs, FPGAs and TPUs, along with new packaging solutions that employ high-density DRAM for higher memory bandwidth and reduced latency. Edge AI computing will require processors that balance the performance and power equation given their dependency on battery life. The exploding demand for data storage is driving adoption of 3D NAND SSDs in cloud servers with the roadmap for continued storage density increase every year.

In 2018, we will see the volume ramp of 10nm/7nm devices in Logic/Foundry to address the higher performance needs. Interconnect and patterning areas present a myriad of challenges best addressed by new materials and materials engineering technologies. In Inter- connect, cobalt is being used as a copper replacement metal in the lower level wiring layers to address the ever growing resistance problem. The introduction of Cobalt constitutes the biggest material change in the back-end-of-line in the past 15 years. In addition to its role as the conductor metal, cobalt serves two other critical functions – as a metal capping film for electro- migration control and as a seed layer for enhancing gapfill inside the narrow vias and trenches.

In patterning, spacer-based double patterning and quad patterning approaches are enabling the continued shrink of device features. These schemes require advanced precision deposition and etch technologies for reduced variability and greater pattern fidelity. Besides conventional Etch, new selective materials removal technologies are being increasingly adopted for their unique capabilities to deliver damage- and residue-free extreme selective processing. New e-beam inspection and metrology capabilities are also needed to analyze the fine pitch patterned structures. Looking ahead to the 5nm and 3nm nodes, placement or layer-to-layer vertical alignment of features will become a major industry challenge that can be primarily solved through materials engineering and self-aligned structures. EUV lithography is on the horizon for industry adoption in 2019 and beyond, and we expect 20 percent of layers to make the migration to EUV while the remaining 80 percent will use spacer multi- patterning approaches. EUV patterning also requires new materials in hardmasks/underlayer films and new etch solutions for line-edge-roughness problems.

Packaging is a key enabler for AI performance and is poised for strong growth in the coming years. Stacking DRAM chips together in a 3D TSV scheme helps bring High Bandwidth Memory (HBM) to market; these chips are further packaged with the GPU in a 2.5D interposer design to bring compute and memory together for a big increase in performance.

In 2018, we expect DRAM chipmakers to continue their device scaling to the 1Xnm node for volume production. We also see adoption of higher perfor- mance logic technologies on the horizon for the periphery transistors to enable advanced perfor- mance at lower power.

3D NAND manufacturers continue to pursue multiple approaches for vertical scaling, including more pairs, multi-tiers or new schemes such as CMOS under array for increased storage density. The industry migration from 64 pairs to 96 pairs is expected in 2018. Etch (high aspect ratio), dielectric films (for gate stacks and hardmasks) along with integrated etch and CVD solutions (for high aspect ratio processing) will be critical enabling technologies.

In summary, we see incredible inflections in new processor architectures, next-generation devices, and packaging schemes to enable the AI era. New materials and materials engineering solutions are at the very heart of it and will play a critical role across all device segments.

Pages: 1 2 3 4 5 6 7

Samsung Electronics today announced that it broke ground on a new EUV (extreme ultraviolet) line in Hwaseong, Korea.

With this new EUV line, Samsung will be able to strengthen its leadership in single nanometer process technology by responding to market demand from various applications, including mobile, server, network, and HPC (high performance computing), for which high performance and power efficiency are critical.

The new facility is expected to be completed within the second half of 2019 and start production ramp-up in 2020. The initial investment in the new EUV line is projected to reach USD 6 billion by 2020 and additional investment will be determined depending on market circumstances.

“With the addition of the new EUV line, Hwaseong will become the center of the company’s semiconductor cluster spanning Giheung, Hwaseong and Pyeongtaek in Korea,” said Kinam Kim, President & CEO of Device Solutions at Samsung Electronics. “The line will play a pivotal role as Samsung seeks to maintain a competitive edge as an industry leader in the coming age of the Fourth Industrial Revolution.”

Samsung has decided to utilize cutting-edge EUV technology starting with its 7-nanometer (nm) LPP (Low Power Plus) process. This new line will be set up with EUV lithography equipment to overcome nano-level technology limitations. Samsung has continued to invest in EUV R&D to support its global customers for developing next-generation chips based on this leading-edge technology.

Samsung Electronics Hwaseong Campus EUV line bird’s eye view

Samsung Electronics Hwaseong Campus EUV line bird’s eye view

The top five semiconductor metrology/inspection equipment vendors grew 17.7% in 2017 according to the report “Metrology, Inspection, and Process Control in VLSI Manufacturing”, recently published by The Information Network, (www.theinformationnet.com) a New Tripoli, PA-based market research company.

The top three metrology/inspection suppliers were KLA-Tencor, Applied Materials Hitachi High Tech, Nanometrics, and Rudolph Technologies. These five companiesincreased their collective share of the overall global market to 87.0% in 2017, up from 82.4% in 2016.

metrology market

The report covers 27 different sectors and subsectors. With its large market share, KLA-Tencor led most of the sectors and subsectors. Applied Materials led the Defect Review Sector, Hitachi High Tech led the CD Inspection sector, Nanometrics held a large share of the Thin Film Metrology Sector, and Rudolph Technology led the Back-End Inspection market.

China and memory (DRAM and 3D NAND) are currently driving demand for the global wafer fab equipment market.

Orders for KLA-Tencor equipment from native Chinese customers nearly tripled in 2017 and this strong momentum is expected to continue into 2018.

China continues to be a strong focus for Rudolph Technologies. Revenue from China has more than doubled in the last two years. Rudolph’s revenue from advanced memory applications in both three DRAM and 3D NAND grew by 80% year-over-year as customers in Korea increased capacity to meet growing global demand for advanced memory used in cloud computing and mobile applications.

The success and proliferation of integrated circuits has largely hinged on the ability of IC manufacturers to continue offering more performance and functionality for the money.  Driving down the cost of ICs (on a per-function or per-performance basis) is inescapably tied to a growing arsenal of technologies and wafer-fab manufacturing disciplines as mainstream CMOS processes reach their theoretical, practical, and economic limits. Among the many levers being pulled by IC designers and manufacturers are: feature-size reductions, introduction of new materials and transistor structures, migration to larger-diameter silicon wafers, higher throughput in fab equipment, increased factory automation, three-dimensional integration of circuitry and chips, and advanced IC packaging and holistic system-driven design approaches.

For logic-oriented processes, companies are fabricating leading-edge devices such as high-performance microprocessors, low-power application processors, and other advanced logic devices using the 14nm and 10nm generations (Figure 1).  There is more variety than ever among the processes companies offer, making it challenging to compare them in a fair and useful way.  Moreover, “plus” or derivative versions of each process generation and half steps between major nodes have become regular occurrences.

For five decades, the industry has enjoyed exponential improvements in the productivity and performance of integrated circuit technology.  While the industry has continued to surmount obstacles put in front of it, the barriers are getting bigger.  Feature size reduction, wafer diameter increases, and yield improvement all have physical or statistical limits, or more commonly…economic limits.  Therefore, IC companies continue to wring every bit of productivity out of existing processes before looking to major technological advances to solve problems.

The growing design and manufacturing challenges and costs have divided the integrated circuit world into the haves and have-nots.  In the June 1999 Update to The McClean Report, IC Insights first described its “Inverted Pyramid” theory, where it was stated that the IC industry was in the early stages of a new era characterized by dramatic restructuring and change.  It was stated that the marketshare makeup in various IC product segments was becoming “top heavy,” with the shares held by top producers leaving very little room for remaining competitors. Although the Update described the emerging inverted pyramid phenomenon from a marketshare perspective, an analogous trend can be seen regarding IC process development and fabrication capabilities. The industry has evolved to the point where only a very small group of companies can develop leading-edge process technologies and fabricate leading-edge ICs.

Figure 1

Figure 1

By Emmy Yi, SEMI Taiwan

 

Since Apple unveiled iPhone X with face-recognition functionality in early November 2017, interest in 3D sensing technology has reached fever pitch and attracted huge investments across the related supply chains. The global market for 3D depth sensing is estimated at US$1.5 billion in 2017 and will grow at a CAGR of 209 percent to US$14 billion in 2020, Trendforce estimates. This trend pushes up demand for Vertical Cavity Surface Emitting Laser (VCSEL), a key component for 3D depth sensing technology. SEMI estimates that the global VCSEL market will grow at a CAGR of 17.3 percent between 2016 and 2022, and the total value of the market is expected to reach US$1 billion by 2022.

This SEMI 3D Depth Sensing & VCSEL Technology Seminar attracted more than 600 industry experts.

This SEMI 3D Depth Sensing & VCSEL Technology Seminar attracted more than 600 industry experts.

In light of the significant market growth potential and business opportunities, SEMI Taiwan recently organized the 3D Depth Sensing & VCSEL Technology Seminar, where industry experts from Qualcomm, Lumentum, Himax, Vertilite and IQE gathered to explore the technology trends and potentials from different perspectives. Following are the key takeaways from the Forum:

Not just iPhoneX! Expect a boom in 3D depth sensing

The real-time and depth cue feature of the 3D sensor is essential to enable the next-generation computer vision (CV) applications. Improvements in 3D recognition, machine learning, and 3D image segmentation promise to stoke significant growth across a wide range of applications including long-range automotive LiDAR, short-distance AR/VR devices, facial recognition in the low-light environment inside a car and more.

SEMI_Member_Forum_2_450px

Improvements in component R&D, algorithm writing, and supply chain integration will further expand the 3D sensing market.

Why VCSELs?

Structured light and time of flight (TOF) are currently the two key approaches to 3D sensing, and VCSEL is the core light source for both technologies. VCSEL’s advantages of small footprint, low cost, low power consumption, circular beam shape, optical efficiency, wavelength stability over temperature and high modulating rate are all indispensable for 3D sensing to flourish. In the longer term, improvements in component R&D, algorithm writing, and supply chain integration will further expand the 3D sensing market.

Optimistic about the proliferation of 3D sensing applications, The SEMI Taiwan Power and Compound Semiconductor Committee plans to organize a special interest group to better respond to technology evolution and rising applications of the emerging optoelectronic semiconductor and to drive innovations and development of the industry. SEMICON Taiwan 2018 will also include a theme pavilion and a series of events to enable more communications and collaborations. To learn more, please contact Emmy Yi, SEMI Taiwan, at [email protected] or +886.3.560.1777 #205.

IC industry wafer capacity, specifically in the memory segment, was inadequate to meet demand throughout 2017. However, with Samsung, SK Hynix, Micron, Intel, Toshiba/WD, and XMC/Yangtze River Storage Technology planning to significantly ramp up 3D NAND flash capacity over the next few years, and Samsung and SK Hynix boosting DRAM capacity this year and next, what does this mean for total industry capacity growth?  In its 2018-2022 Global Wafer Capacity report, IC Insights shows that new manufacturing lines are expected to boost industry capacity 8% in both 2018 and 2019 (Figure 1). From 2017-2022, annual growth in IC industry capacity is forecast to average 6.0% compared to 4.8% average growth from 2012-2017.

annual wafer trends

Figure 1

Large swings in the addition or contraction of wafer capacity by the industry, as a whole, appear to be moderating. Since 2010, annual changes in wafer capacity volume have been in the relatively narrow range of 2-8%, with the largest year-to-year difference being just three percentage points.  This suggests that IC manufacturers are better today than in years past about trying to match supply with demand.  It’s still an incredibly difficult task for companies to gauge how much capacity will be needed to meet demand from customers, especially given the time it takes a company to move from the decision to build a new fab to that fab being ready for mass production.

Many companies, DRAM and NAND flash suppliers in particular, have become much more active with new fab construction and expansion projects at existing fabs.  This surge in activity comes after four years (2014-2017) when capacity growth lagged wafer start volume increases.  During the past few years, IC producers have worked to increase utilization rates from the low levels in 2012-2013.

If all the new fab capacity expected to be brought on-line in 2019 happens as planned, the volume of capacity added that year will approach the record set in 2007.  Figure 2 shows more that 18 million wafers per year of new capacity is expected to be added in 2019, and this number even assumes some of the massive DRAM and NAND fabs being built by Chinese companies will not be carried out quite as aggressively as has been advertised.  IC Insights believes that construction of these China-owned fabs is progressing slower than planned.

Figure 2

Figure 2

Market shares of top semiconductor equipment manufacturers for the full year 2017 indicate large gains by Tokyo Electron and Lam Research while top supplier Applied Materials dropped, according to the report “Global Semiconductor Equipment: Markets, Market Shares, Market Forecasts,” recently published by The Information Network, a New Tripoli-based market research company.

The chart below shows shares for the entire years of 2016 and 2017. Market shares are for equipment only, excluding service and spare parts, and have been converted for revenues of foreign companies to U.S. dollars on a quarterly exchange rate.

market shares

Market leader Applied Materials lost 1.8 share points among the top seven companies, dropping from 28.8% in 2016 to 27.0% in 2017. Gaining share are Tokyo Electron Ltd., which gained 2.1 share points while rising from 17.4% in 2016 to 19.1% in 2017, and Lam Research, which gained 1.5 share points and grew from a 19.4% share in 2016 to a 20.9% share in 2017.

In third place ASML gained 0.6 share points, growing from an 18.8% share in 2016 to a 19.4% share in 2017.

Fifth place KLA-Tencor is the dominant supplier in the process control sector (inspection and metrology) and competes against Applied Materials and Hitachi High-Technologies, as well as several other companies including Nanometrics, Nova Measuring Instruments, and Rudolph Technologies. KLA-Tencor gained market share against each of its competitors in this sector in 2017.

Much of the equipment revenue growth was attributed to strong growth in the DRAM and NAND sectors, as equipment was installed in memory manufacturers Intel, Micron Technology, Samsung Electronics, SK Hynix, Toshiba, and Western Digital. The memory sector is expected to have grown 60.1% in 2017 and another 9.3% in 2018 according to industry consortium WSTS (World Semiconductor Trade Statistics).

Following the strong growth in the semiconductor equipment market, The Information Network projects another 11% growth in 2018. for semiconductor equipment.