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February 10, 2012 — Day 3 of the 2012 Strategies in Light conference continued the LED Manufacturing session. Presenters covered lithography for light emitting diode (LED) manufacture, advanced packaging, metrology and testing, high-performance materials, and other topics, such as the value of dimming.

First up, Thomas Uhrmann of EV Group with a review of the lithography and wafer bonding tools that they provide for HV manufacturing of LEDs. Nano-imprint is one of the applicable technologies identified on one chart, but only optical litho was discussed. Several different device structures are being scaled up in production, no longer limited to the original planar device. A variety of bonding schemes were shown, many driven by emerging 3D integration process flows. It remains to be seen whether there will be a process and materials convergence in our future.

Figure 1. Chip designs for GaN LEDs.

The subject switched to metrology and yield management with Mike Plisinski of Rudolph Technologies, focusing on epitaxial process metrology and feedback in LED production. MOCVD Epi process defects and variation are the largest LED cost drivers, impacting both yield and brightness directly.

Figure 2. Epi process defects and LED yield/brightness.

Dan Scharpf of Labsphere talked about optical testing of LEDs. Drive current, junction temperature, stray light and appropriate selection of sphere size are all important parameters for accurate testing that does places all products into the correct bin.

Ilkan Cokgor of Everlight Electronics led us into the LED Packaging session, speaking on packaging trends intended to drive down the cost per lumen. Specifically, he focused on performance and reliability improvements for PLCC packages because they are low cost but have not developed a reputation for reliability before now.

Figure 3. Advanced package — reliability improvement.

Ravi Bhatkal of Cookson took the packaging reliability story up a level to luminaire fabrication, including the introduction of SMT manufacturing methods to LED packaging. Issues in lead-free solder printing and reflowing were discussed. The talk provided some good guidance for engineers just starting to implement such processes.

Geoff Gardner, Lighting Marketing Manager for Dow Corning, talked about innovations in silicone technology as applied to LEDs. As the material most commonly used for the LED primary lens, thermal stability is critical for both transmittance and reflectance over the lifetime of the device. Silicones used in injection molding and screen printing have recently been brought to the market. The chemical physical and mechanical properties make silicones suitable if not preferred for a range of applications within LED modules and luminaries.

Figure 4. Material needs in lamps and luminaires.
Figure 5. Silicone technologies for LEDs.

Marc McClear of Cree, still well-known to those of us from the semiconductor materials business, opened the final session of the LEDs in Lighting track with The Next Big Thing. Among the discarded candidates discussed were LED droop, the green gap, remote phosphors and OLEDs. Rather, the correct answer is 3rd generation direct attach LED chip architecture as the vehicle that will deliver 200 lumens/watt for the industry. The payback time for installed fixtures will drop from 4.5 years to less than 1 year.

Figure 6. DOE LED roadmap.

Nadarajah Narendran, Director of the Lighting Research Center at RPI, gave a program overview of ASSIST, the Alliance for Solid-State Illumination Systems and Technology. In a philosophical observation worthy of “if a tree falls in the forest and no one hears it…” he opined that without a human eye to observe it, light is just another wavelength of radiation. “ASSIST recommends” is a series of publications that the organization has produced over the past decade to disseminate the research to its member companies and throughout the industry. Developing test methods, standards and educational curricula are among the ongoing activities that comprise its mission.

Figure 7. ASSIST publications.

Next on the agenda was Amy Olay (no relation) of the San Jose Department of Transportation talking about the energy savings programs associated with the city’s 62,000 streetlights with an annual operating budget of $6M. Implementation of a wireless control system in which each streetlight was its own node was chosen over hard wired designs for controlling power to and receiving operational data from the lamps. The longitude and latitude of each streetlight is known to itself, and it turns on and off based on its unique sunrise & sunset times, rather than using photocells. Warm white LEDs with a color temperature of 4500°K were found to be preferred by the public. The units could be reduced to 50% power without an adverse effect on safety or public perception. In a nod to scientific collaboration, the city can further dim these lights from midnight to 5am, which are the hours in which the James Lick Observatory above San Jose on Mount Hamilton conducts its astronomical research. The current deployment is for 2,000 streetlights, funded by federal stimulus money. An additional $30M in grants will be needed to complete the conversion to LED streetlights in San Jose.

Sam Klepper of Redwood Systems wrapped up the conference by introducing us to the digital age of lighting. Being dimmable turns out to be a significant feature of LEDs that is not fully exploited. Dimming an LED by 30% reduces power consumption by 50% with no adverse effect. Dimming a CFL by 30% reduces power consumption by only 20%, and reduces the lifetime of the lamp. The digital control system that takes advantage of all of the features of LED lighting brings with it the capability to add a number of other functions of interest to building managers with little additional effort. For example, motion sensors used to turn off lights in unoccupied rooms can also indicate room occupancy for spontaneous roving team meetings searching for an available conference room. The same sensors can provide security warnings for restricted areas or after-hours tresspassers.

Figure 8. Key challenges in facilities.
Figure 9. Commercial electricity use by building type.

Observation from the exhibition floor: I’m accustomed to walking up and down the aisles and wondering how I might use the product being exhibited to build my own product. At this show, the dominant thought was “I wonder how that would look in my living room.” In that sense, it was a bit more like Home Depot than the technology conference that it was. On the other hand, it is so much more interesting to see all of the ready-to-install luminaire designs than it is to see bin after bin of bare and packaged chips and assembly components.

Next year is going to be a tough one for the LED industry, since the 2013 Strategies in Light conference will be held on February 12-14. I think it’s safe to say that not everyone will be able to get home in time for Valentine’s Day to keep peace in the family.

Michael A. Fury, Ph.D., is director & senior technology analyst, Techcet Group in North Plains, OR.

Read Fury’s other reports from Strategies in Light:

Visit the new LEDs Manufacturing Channel on ElectroIQ.com!

In this three-part series, SEMATECH’s authors cover metrology for FinFETs and 3D memory devices, and defect detection capabilities at 22nm. Read Part 2 on 3D memory metrology here. Part 3, sharing new defect detection technologies, can be found here.The series appears in the upcoming March 2012 issue of Solid State Technology, along with other metrology-focused pieces from KLA-Tencor and Entegris. Subscribe to Solid State Technology magazine here.

February 9, 2012 — The 22nm node marks the beginning of a major transition from conventional scaling-driven planar semiconductor devices to complex 3D transistor architectures, redefining future needs for lithographic, defect, and films metrology technologies for high-volume chip manufacturing.

FinFETs raise new metrology complexities, as the entire 3D structure becomes critical for process control, including fin and gate dimensions, profiles and roughness, and metal gate undercuts. Similarly, future 3D memory devices (Part 2 of this series) will include multiple gate-level structures defined by high aspect ratio (HAR) trenches and holes in multilayer stacks, which are major gaps in current metrology technology. No in-line non-destructive metrologies have achieved the sensitivity and resolution to image or measure CD, depth, profile, or contamination of such HAR features [1]. In addition, defect metrology inspection and review (Part 3) suffer from low sensitivity and inadequate throughput even for current 22nm defects of interest. To address these challenges, a robust metrology strategy should encompass the extendibility of conventional techniques that are approaching their fundamental limits, as well as development of new technologies.

Planar transistors are reaching their critical performance limitations due to undesirable short channel effects imposed by physical scaling. In 3-D FinFET or Trigate devices, the gate surrounds the channel on multiple sides, resulting in higher drive current [1], better electrostatic control (lower off-state leakage), and lower supply voltage requirements than planar devices. To continue to scale with Moore’s law, devices having 3D architectures will enter manufacturing in 2012 at the 22nm node.

Metrology demands for 3D structures and their more complex integration steps are considerably greater than for 2D devices. The ability to measure fin and gate dimensions accurately with good precision, and to detect subtle process changes for feedback or feed-forward control is essential to assure good device performance and high yield in high volume manufacturing (HVM). For example, variations in FinFET height (more of a concern on bulk Si substrates) can likewise lead to drive current variability. Sharp fin corners can affect threshold voltage [1], and gate dielectric undercutting can cause shorts between the gate and channel regions or Ion/Ioff variation. Fin line edge and width roughness, sidewall angle (SWA), profile, corner rounding, and gate dielectric undercutting are also critical process control variables. Some of the critical metrology steps entail critical dimension-scanning electron microscope (CD-SEM) measurements (resist and etch fin and gate CD and pitch; spacer width at the bottom; pre- and post-etch Hi-k/metal gate sidewall thickness on the fin; and sidewall line edge roughness). Additionally, scatterometry is required for fin height and gate profile, CD, and pitch (lithography and etch), buried oxide (BOX) recess under fin, gate height over fin after chemical mechanical polishing (CMP), high-k/metal gate (HKMG) thickness and taper on the fin and recess after gate etch, and spacer profile (Fig. 1a).

Figure 1a) Cross-sectional diagram perpendicular to the fin showing the gate on the fin with spacer. b) Diagram of a basic unit cell of a FinFET, demonstrating twelve important process control parameters.

Conventional metrology methods used in HVM, such as CD-SEM and optical scatterometry, may be challenged by the increased complexity of FinFETs. While CD-SEM demonstrates superior imaging capability, it has no sensitivity to fin height, layer recess, or SWA. Scatterometry is useful for FinFET metrology, but greater parameter correlation increases the measurement uncertainty, similar to increasing the number of variables in an equation. In Figure 1b, showing a diagram depicting a gate-on-fin structure, twelve parameters must be solved by the scatterometry software rather than only the five or six parameters typical for 2-D devices. One possible approach to improve the performance of metrology on complex structures is hybrid metrology, which combines the strengths of two or more metrology toolsets to provide a more comprehensive measurement of the same parameter than the individual techniques. Data obtained from one tool must be shared with another tool and used in a complementary or synergistic way to enhance the resolving power of both tools, thereby improving measurement uncertainty [2].

Several new metrology techniques are being explored at SEMATECH to improve measurement performance on FinFETs, including new technologies such as critical dimension small angle x-ray spectroscopy (CD-SAXS) [3]. The shorter wavelength (1.54Å for Cu Ka) for CD-SAXS and the lack of material dependence (no n and k sensitivities) allow measurements on smaller devices with less parameter correlation. Pitch and pitch variation can be obtained from major reflections and intensity decay with increasing order. The CD-SAXS envelope functions correlate to geometric form factors, and line width roughness (LWR)/line edge roughness (LER) information can be obtained from peak-broadening. Mueller matrix scatterometry [4] provides additional structural information associated with up to 16 spectral components compared to conventional scatterometry, which is important in measuring anisotropic 3D structures.

Dopant and carrier metrology for conventional planar devices has been performed primarily using secondary ion mass spectrometry (SIMS) and sheet resistance metrology on test pads. However, FinFET structures require novel ultra-shallow junction implant strategies because of shadowing effects on densely packed fins from conventional tilt implants. Metrology capable of measuring dopant and active carrier concentrations on vertical structures is needed, but currently poses a significant challenge. Three-dimensional atomic probe tomography (3D-APT) [5] combines field evaporation with time-of-flight mass spectrometry and a position-sensitive detector to provide atomic resolution imaging of the semiconductor device, including dopants. Similarly, scanning spreading resistance metrology (SSRM) is a candidate for active carrier metrology at nanometer spatial resolution. SSRM has demonstrated excellent performance in conjunction with 3D-APT and SIMS [6]. Transmission electron microscopy (TEM) techniques such as energy-dispersive X-ray (EDX) and electron energy-loss spectroscopy (EELS) are valuable in determining dopant concentration and distributions. As these implant metrology techniques are destructive, in some cases, it may be possible to create sacrificial test structures on selected die without affecting subsequent processing. Optically based implant metrology will also be more difficult on sidewalls and on structures having optically opaque layers.

Conclusion, Part 1

As device technology transitions from traditional scaling to new architectures, new application needs are driving metrology towards evolutionary and revolutionary shifts in technologies and methodologies.

Part 2 of this series covers metrology for 3D memory device architectures. Read it here.

Part 3 covers new defect detection technologies for these architectures. Read it here.

References

[1] Doyle, B. et al., “Tri-Gate Fully-Depleted CMOS Transistors: Fabrication, Design and Layout,” Symposium on VLSl Technology Digest of Technical Papers, pp. 133-134 (2003).

[2] Vaid, A., et al. “A holistic metrology approach: hybrid metrology utilizing scatterometry, CD-AFM, and CD-SEM.” Metrology, Inspection, and Process Control for Microlithography XXV. Proceedings of the SPIE, Volume 7971, pp. 797103-797103-20 (2011).

[3] Wang, C., Choi, K., Chen, Y. Price, J., Ho, D., Jones, R., Soles, C., Lin, E., Wu, W.L., Bunday, B. “Nonplanar high-k dielectric thickness measurements using CD-SAXS.” Proc. SPIE, v. 7272, pp 72722M (2009).

[4] De Martino, A., et al., “Comparison of Spectroscopic Mueller Polarimetry, Standard Scatterometry and Real Space Imaging Techniques (SEM and 3D-AFM) for Dimensional Characterization of Periodic Structures,” Proc. of SPIE Vol. 6922, 69221P (2008).

[5] Larson, D.J., and Kelly, T. F., “Nanoscale Analysis of Materials using a Local-Electrode Atom Probe,” Microscopy and Microanalysis Volume: 20, Issue: 3, pp: 59-62 (2006).

[6] Mody, J. et al., “Dopant and Carrier Profiling in FinFET-Based Devices with Sub-Nanometer Resolution,” 2010 Symposium on VLSI Technology, pp. 155-156

Abraham Arceo is a metrology development engineer at SEMATECH Advanced Metrology group. For the past three years he has been involved in film and defect inspection metrology development.

Benjamin Bunday is the project manager of CD Metrology and a Senior Member Technical Staff at SEMATECH (Albany, NY, USA). For ten years he has led SEMATECH/ISMI’s CD-SEM and OCD benchmarking, advanced CD technology evaluation and development efforts, and SEMATECH’s Advanced CD Metrology Advisory Group (AMAG).

Aaron Cordes is a research engineer for Sematech in Albany doing work on AFM, TEM, and focused ion beam metrology. He is also a PhD student with SUNY Albany’s College of Nanoscale Science and Engineering.

Victor Vartanian is a metrology engineer at SEMATECH in Albany, New York. Before coming to SEMATECH, he worked at Freescale Semiconductor in Austin, Texas, where he worked on applications of strained silicon to advanced transistor design and analytical applications of FTIR and mass spectrometry to environmental issues in semiconductor manufacturing and in process optimization.

February 9, 2012 — Day 2 of the 2012 Strategies in Light conference, and the first day of technical sessions, began with an adrenaline rush. The challenge posed to the audience was to identify the first ever Super Bowl TV commercial to feature a light emitting diode (LED) light. The first respondent would win $100, and it took only a few mental CPU cycles for someone to correctly shout out “Audi.” The conference has over 4,000 advance registrations, with a total of 5,000 attendees expected for conferences and to view the record 170 exhibitors.

Read Fury’s report from Day 1: Strategies in Light: Day 1, LED Lighting Report, New Start-ups

and from Day 3: Lithography, direct-attach LED architectures, packaging trends

The session was opened by Ella Shum, LED practice director at Strategies Unlimited. One prognosis is that China will soon be taking over the global sign market; it commanded 87% of the W/W market in 2011. Many smart phones are going to OLED displays. It was suggested that the iPhone will not go OLED until someone other than Samsung commands the majority of OLED manufacturing capacity. Even though the LED lighting market is growing at a 20% CAGR to 2016, the LED chip market is flat (CAGR -0.2%) because of price pressure even as unit growth is strongly positive.

Ling Wu, Secretary General of the Chinese Solid State Lighting Alliance, provided an overview of their strategy as captured in the next Five Year Plan. Energy savings is the dominant driver, with a target of 100B kWh saved. The 20M rural families still without electricity are driving a market for off-grid LED lighting.

Eric Kim of Soraa, Inc. took a holistic approach to LED lighting for space illumination. Readers are referred to an article in today’s (Feb 08, 2012) Wall Street Journal on the company. Unlike most LEDs that use blue emission to pump phosphors for their range of colors, the Soraa products use violet light to pump a different set of phosphors, giving characteristics distinct from others in the market.

Editor of LEDs Magazine Tim Whitaker provided his observations on the European LED lighting industry. General lighting LED market share is just shy of 10% in 2011, in spite of being two years into a mandated conversion roadmap away from incandescents. This transition is expected to inject €20B into the European economy.

Ned Tozun of d.light Design is turning to LED solutions for off-grid household lighting in third world rural areas. There is still a surprisingly large population that has no access to electricity, or unreliable limited access. The primary means for night lighting are kerosene lanterns and electric bulbs powered by lead acid batteries that must be carried to a local diesel generator  for daily recharging. In India, the government subsidy to keep kerosene prices affordable is ~$6B, approximately the same as the national budget for education. The sociological benefits from relatively low-tech implementations of solar chargers and LED lighting at night extend to increased study time and improved health for children due to the elimination of kerosene (which is typically several grades below what is available in the US in terms of adulterated effluents).

Figure 1. Population without electricity.

Overheard mid-morning: “I’m surrounded by a bunch of technical propeller-heads talking about LED chip manufacturing and I’m not sure I can keep up.” Funny, I felt like I was surrounded by marketeers who were excited about upside market potential but had no idea what the inside of a fab looks like, at least through the morning plenary session. Fortunately, I was able to take refuge all afternoon in the LED Manufacturing track, where my propeller spun freely.

Seth Coe-Sullivan of QD Vision opened the session on phosphors with his overview of the only company focused on quantum dots exclusively for the lighting industry. Their quantum dots can operate in both photoluminescent and electroluminescent (for QLEDs) modes. The underlying physics is said to provide greater efficiency and spectral purity than phosphor technology.

Iain Black of Philips Lumileds Lighting talked about the challenges of LED manufacturing from the perspective of rapidly delivering products to market that are responsive to rather fast changes in consumer mood. One important element is to move the product customization point as late in the production process as possible, allowing many products to draw from a common substock. Lumileds manufactures on 150mm wafers; most LED fabs still run smaller wafers.

Karen Savala, President of SEMI Americas gave the supplier-side perspective on consolidation, expansion and long-term planning for LED manufacturing. Global manufacturing is normalized to 4” wafer equivalents; capacity is expected to reach 2M wafers/month this year. Sapphire LED substrates are expected to reach 50% 6” wafers in 2014, and this wafer size is where the SEMI Standards activity is focused for LED.

Figure 2. LED dedicated fabs, 10-year span. SOURCE: SEMI Opto/LED Fab Forecast, November 2011.

Jacob Tam, President of TSMC Solid State Lighting Ltd., explored the question of whether a large semiconductor manufacturer can accelerate LED cost reduction. He started with a very nice spider chart comparing the state of manufacturing in the two technologies. Various manufacturing and design tools were compared between the two, but in the end he remained quite silent on the details of what TSMC had in mind for its own LED manufacturing future. One expectation is that binning control will be much tighter when leveraging TSMC’s process control experience.

Figure 3. The fundamental differences between semiconductors and LEDs.

James Broderick of US DOE talked about the government-industry roadmap for improving solid-state lighting manufacturing in the US. The underlying motivator is the creation of sustainable US manufacturing jobs. The metrics call for OEM lamps priced at $5 by 2020, compared to $23 today. There are ~$45M in projects funded today, with a planned pathway to $114M. A funded KLA inspection tool tested at Philips Lumileds reduced production costs by 10%.

Figure 4. DOE funding by program pathway.

Raja Parvez, CEO of Rubicon Technology spoke about the move to larger diameter sapphire wafers. Solid state lighting is the largest consumer of their products, followed by silicon on sapphire and optical windows (aerospace). Rubicon expects 6” wafer share to be 70% by 2020, with a subsequent trend to 8”, following the semiconductor trend.

Figure 5. Sapphire wafer diameter trends. SOURCE: Yole Developpement.
LED chip manufacturers transitioning to larger-diameter substrates to reduce cost
 –Several chip manufacturers announced plans to move into volume production on 6" substrates in 2011
 –We have been supplying R&D volumes of 8" epi-polished wafers and are ready for high-volume production.

Abdul Lateef of Plasma-Therm talked about the advancements of front end PECVD deposition in adapting to LED manufacturing. Real time process control using optical emission interferometry is one of the innovations contributing to higher production repeatability and yield, with a control resolution of 50nm.

Michael A. Fury, Ph.D., is director & senior technology analyst, Techcet Group in North Plains, OR.

Visit the new LEDs Manufacturing Channel on ElectroIQ.com!

February 8, 2012 — The Semiconductor Industry Association (SIA), representing US semiconductor manufacturing and design, released the 2011 International Technology Roadmap for Semiconductors (ITRS), a roadmap of near-term and long-term challenges and innovations for the semiconductor design and manufacturing industry through 2026.

Also read: ITRS 2010: What happened during this off-year?

The ITRS is sponsored by five regions of the world; Europe, Japan, Korea, Taiwan, and the United States and is overseen by SIA. The 2011 ITRS was first presented at a public forum in Incheon, Korea on December 14, 2011. Through the cooperative efforts of the global chip manufacturers and equipment suppliers, research communities and consortia, the Roadmap teams identify critical challenges, technical needs and potential solutions.

2011 edition. Several key areas of advancement have been highlighted in the 2011 ITRS, specifically: DRAM and Flash memory, and micro-electro-mechanical systems (MEMS).

Dynamic random access memory (DRAM) technology development will be accelerated, allowing for new higher-performance servers and sophisticated graphics for game consoles. Flash technology, used as memory in mobile computing devices such as digital cameras, tablet PCs and cell phones, will experience accelerated development over the next 2 years. The introduction of three-dimensional (3D) flash technology, beginning in 2016, will bring greater memory capabilities to a range of popular consumer electronics.

The 2011 ITRS also explores the newest possibilities for innovative interconnects, switches, devices, and materials to advance nanotechnology. While the continued scaling down to the nanometer level occurs, innovative designs and models for new applications and products have expanded research and development of MEMS, increasingly included in smartphones, tablets, digital cameras, and numerous other consumer electronic products. Researchers are also increasing attention on RF and analog mixed-signal technologies.

Also read: NIST collaborates on MEMS roadmaps: ITRS, iNEMI

One of the primary challenges that the industry has identified is how to decrease the size of semiconductors while increasing performance standards to meet consumer demands. In addition to addressing scale and performance challenges, the ITRS presents models for enhancing the highly complex manufacturing and measurement processes required to achieve smaller, higher performance and more energy efficient semiconductors. The ITRS also focuses on cost-effective manufacturing and resource conservation to meet the rapidly changing needs of semiconductor design innovations.

Also read: Packaging, assembly changes coming in next ITRS

Each ITRS working group coordinates with related teams across disciplines to write reports indicating the state of the current technology, technology challenges, critical needs, potential solutions, and areas of innovation. When incorporated into the ITRS, the reports provide guidelines for the global industry that are intended for technology assessment only, without regard to any commercial considerations. The roadmap can serve as a guide for corporate strategic plans and business unit programs; help to assess lead times for equipment development plans, process and materials; and assess key metrics for industry productivity/profitability such as progress on Moore’s law, productivity trends, industry cycles and economic models.

Access the ITRS at www.itrs.net. 

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February 8, 2012 — The global high-brightness light-emitting diode (HB-LED) market grew from $11.3 billion in 2010 to $12.5 billion in 2011, surging 9.8%, according to Strategies Unlimited. 10 companies accounted for more than 68% of the global LED supply.

Demand for LED components in the lighting market grew 44% from 2010 to 2011, from $1.2 billion to $1.8 billion.

Table. Top 10 LED suppliers for 2011, by revenue of packaged LED components.*
1 Nichia
2 Samsung LED
3 Osram Opto Semiconductors
4 LG Innotek
5 Seoul Semiconductor
6** Cree
6** Philips Lumileds
7 Sharp
8 TG
9 Everlight
*Strategies Unlimited arrived at these figures after analyzing market demand as well as the supply-side activity of more than 54 LED component suppliers.
**Companies have the same ranking when the difference in revenue is within the margin of error. Revenue includes packaged LED sales only.

Taiwanese and Chinese suppliers gained market share at the expense of the other regions in 2011. China leapt from 2% to 6% market share on the strength of its domestic market, as well as improvements in LED quality. Korean companies lost share, despite aggressively increasing capacity during the ramp-up in 2010. Japan trended down or flat, although Nichia and TG are tapping into tablet growth.

Philips Lumileds, Cree, and Osram Optoelectronics’ expansion into 6" wafers slowed, with excess capacity available on their 4" wafer lines. Osram Optoelectronics gained a major design win, which propelled its visible LED component business to more than $1 billion.

Figure. 2011 worldwide distribution of LED supply. SOURCE: Strategies Unlimited.

The revenues for the LED packaging industry are expected to be flat in the next five years. With excess capacity in the industry there is a threat of unsustainable prices.  Consolidation, vertical, and horizontal can help improve margins. To further improve profit margin, product strategies such as LED packages tested for high temperature, narrow binning, high CRI, directional /multidirectional LEDs, and embedded controls are being tried by the market.

Mobile. This segment stayed flat, at $3.4 billion. The overall decrease in the mobile phones market was offset by a sharp rise in tablet display and flash applications. A major development in this segment is the move to organic LED (OLED) displays. Approximately 50% of smartphone displays are expected to be OLEDs by 2016.

TV/monitor backlight. The LED revenue for TV and monitor backlights was $3 billion in 2011, but it is projected to drop substantially by 2016. The key disruptive factor in this segment is the introduction of low-cost direct backlit technology, targeted at sub-42-inch LCD TVs. This new technology can result in significant savings in the BOM, reducing the gap between LED and CCFL backlit TVs. These TVs are known as “Chubby TVs” since they are thicker than the slim edge-lit design the industry has been touting for the past few years.

Lighting. The same supply conditions that reduced the price of LEDs increased the demand for packaged LED in lighting applications from $1.2 billion in 2010 to $1.8 billion in 2011. System efficacy, rather than LED efficacy, was the gating factor in 2011. The LED luminaire and replacment lmap market was $9.3 billion in 2011, an increase of 45% over 2010. The market for LEDs in lighting is expected to demonstate substantial unit growth over the next five years, but revenue growth will be much lower due to pricing pressure.

Automotive. Revenue reached $1 billion in 2011 We expect a 5-year CAGR of 34% for LED headlamps. In addition to the styling issues, this is part of the trend to convert all front lighting to LEDs, as it will provide more front-end room for the car designer and reduce the overall system cost. Revenue for interior automotive lighting will show a modest decline over the next five years as instrument panel adoption reaches saturation and the market declines with prices.

Strategies in Light Conference & Exhibition 2012 is taking place this week in Santa Clara, CA. For more information, contact Strategies Unlimited at +1 650 941-3438 (voice) or e-mail at info@strategies u.com, or visit www.strategies-u.com.

Check out more news from Strategies in Light:

Visit the new LEDs Manufacturing Channel on ElectroIQ.com!

UPDATED February 8, 2012 — The Semiconductor Industry Association (SIA), representing US semiconductor manufacturing and design, shows 2011 worldwide semiconductor sales hit $299.5 billion, a 0.4% year-on-year (YOY) increase and new record. This comes despite natural disasters in major semiconductor hubs of Japan and Thailand, and an overall weak global economy, noted Brian Toohey, president, SIA.

Semico Research’s forecast for 2012 shows a 10.11% growth in semiconductors revenues over 2011. Semico believes that the bottom of the cycle is occurring now, in Q1 2012, with pent-up PC demand and other factors carrying 2012 growth starting in Q2.

Figure. Worldwide semiconductor industry revenues. SOURCE: SIA, WSTS.

Worldwide semiconductor sales in December amounted to $23.8 billion, a decrease of 5.5% from November and down 4.5% YOY, with units steadily lower coupled with a slight increase in ASP, says SIA. Excluding memory, however, semi revenues were down just 1% YOY, Barclays Capital noted.

Q4 sales of $71.5 billion represent a 7.7% decline from Q3, and a 5.3% decrease over the same period in 2010. All monthly sales numbers represent a 3-month moving average.

The Semico IPI report indicates that semiconductor sales will jump 6.3% in Q1 2012. "We continue to look for 1Q12 to mark the inflection (average guide from semi makers is -3% at midpoint), and supported by 5-8% average Q/Q CAGR for revenues in 2Q-4Q12 (6-10% ex-Memory), we model semi revenues at Flat to +4% in CY12," commented Barclays Capital. "SIA data, coupled with 1Q outlook from chipmakers, suggest…the inventory correction [is] largely resolved." Semiconductors are expected to outpace end markets in 2Q12.

"The health of the industry is a direct reflection of the pervasiveness of semiconductor innovations and their applications in almost every aspect of modern society," Toohey said. The semiconductor industry saw strong demand for optoelectronics, sensors and actuators, as well as microprocessors in 2011. The memory segment underperformed, Barclays Capital pointed out.

What to expect in 2012? Semico points to new memory technologies, MEMS oscillator emergence, and new growth in system on chips (SoC). In 2012, the semiconductor industry will "invest billions in capital expenditures and in R&D," SIA’s Toohey added. This will pay off early, and in the long term.

Also read: Semiconductor industry revenue targets $323.2B in 2012

Lamps and image sensors drove 2011 growth in the optoelectronic market to $23.1B, a 6.4% increase over 2010. Despite generally positive results and continuing development activities in the optoelectronics industry, the LED segment appeared to slow toward the end of 2011, according to Strategy Analytics GaAs and Compound Semiconductor Technologies Service (GaAs), http://www.strategyanalytics.com/. "Mid- to long-term prospects for the LED market remain positive, but continuing economic turmoil and rapidly dropping prices have manufacturers in the LED supply chain on edge," said Eric Higham, Director of the Strategy Analytics GaAs and Compound Semiconductor Technologies Service.

"The optoelectronics market appears poised for growth. Optical device and network manufacturers are targeting 40 and 100Gbps systems, a number of new LED products have been introduced and the US Department of Energy continues to make large investments in solar energy," Asif Anwar, Director, Strategy Analytics Strategic Technologies Practice added. Optoelectronic applications bring energy efficiency and low cost in a wide range of products including mobile devices and cameras.

Sensors and actuators, currently the smallest semiconductor market segment, showed the highest YOY growth at 15.5% to $8.0B in 2011, as the technologies are adopted for consumer electronics, medical devices and automotive systems. Sensors include the growing micro electro mechanical systems (MEMS) devices, increasingly used in smartphones, tablets, digital cameras, and other consumer electronic products.

MOS Microprocessors, part of the integrated circuit category, which are predominantly used in PCs and other devices that need processing capabilities, experienced 7.5% in revenue to $65.2B YOY, making it the second largest semiconductor market segment for 2011, behind logic. Strong demand in the enterprise computing segment drove microprocessor sales.

In 2012, the industry is expected to experience further recovery due to increased demand across a broad range of end market segments combined with the delayed sales impact from the supply chain disruptions in H2 2011. Additionally, several large semiconductor companies announced plans for new facilities and new R&D projects that will serve to fuel the industry’s long-term growth expectations (see Samsung, Intel reports).

The Semiconductor Industry Association represents US leadership in semiconductor manufacturing and design. Learn more at http://www.sia-online.org/.

Semico released its expanded version of the IPI report, which now contains end market forecasts from Semico’s MAP Model database, along with semiconductor bill of materials, semiconductor total available market in dollars and units, and wafer demand reports. The IPI Report will continue to publish Semico’s semiconductor forecast every quarter while the other two months in each quarter will be bolstered with articles from Semico’s analysts providing additional topical research enhancing the information provided in the IPI report. Semico is a semiconductor marketing & consulting research company, and can be reached at www.semico.com.

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February 7, 2012 — Worldwide silicon wafer revenues improved 2% year-over-year in 2011 ($9.9 billion), shows the SEMI Silicon Manufacturers Group (SMG). Worldwide silicon wafer area shipments, however, decreased 3% (9,043 million square inches). This indicates a loss of momentum in H2 2011, said Kazuyo Heinink, chairwoman of SEMI SMG and vice president, MEMC.

Table. Annual silicon* industry trends worldwide. SOURCE: SEMI.
Silicon Data  2006 2007 2008 2009 2010 2011
Area Shipments (MSI) 7,996 8,661 8,137 6,707 9,370 9,043
Revenues ($B) 10.0 12.1 11.4 6.7 9.7 9.9
*Shipments are for semiconductor applications only and do not include solar applications.

Also read: Record semiconductor sales in 2011, says SIA and WTO says China’s export restrictions on silicon and other materials unfair

Silicon wafers are the fundamental building material for semiconductors, produced in diameters from 1" to 12". All data cited in this release is inclusive of polished silicon wafers, including virgin test wafers, epitaxial silicon wafers, and non-polished silicon wafers shipped by the wafer manufacturers to the end-users.

The Silicon Manufacturers Group acts as an independent special interest group within the SEMI structure and is open to SEMI members involved in manufacturing polycrystalline silicon, monocrystalline silicon or silicon wafers (e.g., as cut, polished, epi, etc). SEMI is a global industry association serving the nano- and microelectronic manufacturing supply chains. For more information, visit www.semi.org.

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February 7, 2012 — Veeco Instruments Inc. (Nasdaq:VECO) reported three major wins for its TurboDisc K465i gallium nitride (GaN) metal-organic chemical vapor deposition (MOCVD) tools at light emitting diode (LED) makers and electronics manufacturing materials suppliers. The same tool will be used for high-volume LED fab, GaN-on-Si research, and Si-based LED development.

The K465i achieves up to 90% yield (5nm bin) with high uniformity and run-to-run repeatability from its Uniform FlowFlange technology. It also offers full automation and shortened recovery period after maintenance.

SemiLEDs Corporation (Nasdaq:LEDS) qualified the TurboDisc K465i GaN MOCVD system for high-volume production of high brightness light emitting diodes (HB-LEDs) at its state-of-the-art manufacturing facility in Taiwan. Chuong A. Tran, Ph.D., president and COO, SemiLEDs, noted that Veeco offers "enhanced local support with their technology center in Hsinchu" for this Taiwan installation. Veeco is a new supplier for SemiLEDs.

SemiLEDs develops and manufactures LED chips and LED components primarily for general lighting applications. Internet: http://www.semileds.com/.

LG Siltron, a South Korean epi wafer manufacturer, selected the TurboDisc K465i tool to make gallium nitride on silicon (GaN-on-Si) wafers for power electronics and LED devices. GaN is an alternative to traditional silicon-based power transistors. GaN-on-Si may also offer an alternative approach to LED manufacturing. Dr. Hee Bog Kang, GM, LG Siltron R&D, noted that this is their first GaN-on-Si production system, praising the tool’s throughput, uniformity, and low particle count.

LG Siltron is a major electronics materials manufacturer providing epitaxial wafers in 150mm, 200mm and 300mm diameters and solar substrates. For more information, visit http://www.lgsiltron.co.kr.

Epistar Corporation installed the K465i TurboDisc to develop LEDs on silicon substrates. Epistar is moving to larger wafer sizes for higher-yield LED production, with the GaN-on-Si development, noted M. J. Jou, Ph.D., president of Epistar. "Large-diameter silicon wafers offer…a low-cost alternative to sapphire for volume production of lower-cost LEDs," added William J. Miller, Ph.D., Veeco EVP, process equipment.

Epistar Corporation manufactures HB-LEDs for diverse applications. Go to http://www.epistar.com.tw/about-e.htm

Veeco makes equipment to develop and manufacture LEDs, solar cells, hard disk drives (HDDs) and other devices. Watch a video of the TurboDisc K465i at http://www.veeco.com/movies/TurboDisk_01_K465GAN.swf

Visit the new LEDs Manufacturing Channel on ElectroIQ.com!

February 3, 2012 — AMD’s (NYSE:AMD) new president and CEO Rory P. Read detailed what he called an "ambidextrous" strategy for the company, building on its x86 and graphics intellectual property (IP) while incorporating other technologies and IP for differentiation in the electronics marketplace.

AMD’s "SoC-centric roadmap" targets faster time-to-market, sustained execution, and more tailored customer offerings. AMD will use system on chip (SoC) design methodology to approach processor design with a modular strategy, using best-practice tools and microprocessor design flows, and re-using IP and design blocks across a range of products, Read asserted. The company has hinted at this strategy recently, as at the Global Interposer Tech conference. CTO Byran Black stated that AMD’s "Southbridge" chip was probably the last that would be impacted by scaling, reported Dr. Phil Garrou from the meeting. In the future, chip companies will be focusing process node development on specific application functionalities, Black said. Check out the story here: 2.5D announcements at the Global Interposer Tech conference

The next era of the semiconductor industry will be defined by "the convergence of technologies and devices," said Read, naming off strengthening trends of consumerization, the Cloud, and convergence.

AMD is signaling a "willingness to not manufacture at the leading edge," said Barclays Capital’s C.J. Muse. Pros? Notebook and gaming application successes. Cons? Structural concerns continue, said Muse, with pressure from Intel at the high end and ARM at the low end. There also exists risk around execution of AMD’s move from SOI to bulk.

With the completion of the GlobalFoundries deconsolidation (2010) and the settlement with INTC (2009) to resolve all outstanding licensing disputes, AMD completed its transformation to a fabless design company, Credit Suisse analysts noted.

Strategically, AMD appears on the right track as the company has boosted ASPs, margins and cash flow in 2011 despite poor availability of 32nm products, added the analysts at Deutsche Bank, though warning that AMD will face revenue headwinds in the GPU sector specifically.

AMD updated its product roadmaps for AMD central processing units (CPU) and accelerated processing units (APU) through 2013. The devices aim for low power consumption, integration into new device form factors like tablets and ultrabooks, and connection to the Cloud. AMD is unlikely to enter the smartphone market, Deutsche Bank noted, focusing on "more traditional devices and tablets."

"AMD did not announce an ARM-based processor strategy (though it did not deny it either); did not discuss thoughts around partner manufacturing (TSM processor manufacturing at 32 nm?); and did not discuss many specifics regarding closing its performance/watt APU lag versus Intel in both mobile and server processers, other than to say it would be competitive," lamented Craig Berger at FBR Capital Markets. He noted that "AMD did talk about doubling down in mobile APUs (thin and light segment), cloud server solutions, and embedded solutions."

Read’s 1st analyst day left Credit Suisse with "some rather large open questions" as well, although the company is "clearly broadening their market focus, pursuing a more customized SoC strategy, and leaving open the possibility of a hybrid x86/ARM/MIPs architectural approach," say Credit Suisse analysts. "A broadening of market applications implies increased risk, the fruits of which are unlikely to be realized until 2013 at the earliest, as execution has been a key impediment in recent years."

AMD’s updated product roadmap features:
Second-generation mainstream (Trinity) and low-power (Brazos 2.0) APUs for notebooks and desktops. "The 2H12 release of the Trinity APU (and 2013 follow on "Kaveri," built using Steamroller cores) will help solidify the company’s mobile strategy as early design-win momentum is thus far stronger than Llano’s," said Berger. AMD’s 32nm Trinity APU offers 2x the performance/watt of Llano and improved graphics functionality for high-end notebooks, noted Credit Suisse. The 40nm Brazos 2.0 (replacing 28nm Krishna) is also a "step up."

Hondo, an ultra-low-power APU designed for ultrabooks and Windows 8 tablets that FBR Capital Markets calls "an interesting addition".

And new CPU cores in 2012 and 2013 with Piledriver, Steamroller, and Bobcat’s successor Jaguar.

In 2013, AMD expects to transition its entire portfolio to 28nm based on the Steamroller x86 core, said Credit Suisse. The Brazos and Hondo parts will be refreshed with Kabini and Temash, elaborated FBR, both built with the Bobcat core architectural update Jaguar and designed for ultra-low-power applications like ultrabooks (which AMD called ultrathins) and tablets. Both chips will be SoC, which integrate the South Bridge and other functionality to allow for greater performance and power specifications.

For datacenters, AMD will release three server parts to cater to traditional servers (Interlagos, already out), power optimized servers (Valencia), and microservers (Zurich). AMD acknowledges that it is a behind the curve in servers but realizes its importance to driving profitable growth, Credit Suisse pointed out. The three refreshes (Abu Dhabi, Seoul, and Delhi, respectively) will all be built on the improved Piledriver architecture, the refresh from the underwhelming Bulldozer architecture. In graphics, the company will release the “Southern Islands” discrete graphics products at 28 nm in 2012 and its next-generation GPUs under the “Sea Islands” architecture in 2013.

Sterne Agee analysts see AMD possibly ramping its Bulldozer shipments ahead of Intel, which could be a good sign for AMD’s market share. With the 32 nm Llano yield issues resolved, AMD should be positioned more attractively, Vijay Rakesh, Sterne Agee, reports. "AMD will deliver competitive products with Llano and Bulldozer, which should position AMD to slowly chip away at market share with competitive pricing versus peer INTC," Rakesh concludes.

In 2012, AMD plans to introduce four new AMD Opteron processors.

AMD is working to make Heterogeneous System Architecture (HSA), which enables software developers to program APUs by combining scalar processing on the CPU with parallel processing on the graphics processing unit (GPU), an open industry standard for the developer community. HSA "should allow [AMD] to embed its own or third-party IP (ARM?) into its SOC-type solutions and quickly marry this technology to its foundry partners’ processes," noted Berger. The company plans to hold its 2nd annual AMD Fusion Developer Summit in June 2012.

FBR’s final take: The new roadmap will help AMD address markets outside of the traditional PC sector. SoCs built with low power specifications will address the ultrathin mobile electronics market, as well as the Windows 8 tablet PC opportunity expected to ramp at the end of 2012. AMD is also leveraging its strength in new graphics architectures to further penetrate the gaming and game console market. Additionally, the company’s new lower-power focus will allow it to gain share in the low-power server market, an area previously unavailable to AMD. Management is also focused on new applications for APUs, particularly in the embedded processing market.

AMD has added Mark Papermaster as senior vice president and chief technology officer (CTO), Rajan Naik as senior vice president and chief strategy officer (CSO), and Lisa Su as senior vice president and general manager, Global Business Units.

AMD (NYSE: AMD) is a semiconductor design innovator leading the next era of vivid digital experiences with its groundbreaking AMD Accelerated Processing Units (APUs) that power a wide range of computing devices. AMD’s server computing products are focused on driving industry-leading cloud computing and virtualization environments. AMD’s superior graphics technologies are found in a variety of solutions ranging from game consoles, PCs to supercomputers. For more information, visit http://www.amd.com. 

January 31, 2012 — The global semiconductor chip market will see a slow 2012, reports IHS, with uncertainty in global economics and semiconductor inventory not moving quickly enough to stimulate new production. Semiconductor industry revenue in 2012 will hit $323.2 billion, up 3.3% from 2011, shows an IHS iSuppli Global Manufacturing Market Tracker report. This is better than the near-flat growth seen in 2011 (1.25%).

Expect negative growth in Q1 2012, a nascent rebound in Q2, and strong growth in Q3 2012.

  2010 2011 2012 2013 2014 2015
Billions of US Dollars $307.0 $312.8 $323.2 $348.7 $371.5 $397.7
Figure. Worldwide semiconductor industry revenue forecast. SOURCE: IHS iSuppli.

If the United States and the rest of the world recover economically in 2013, growth from 2013 to 2015 will average 6.6-7.9%, with total semiconductor revenue by 2015 rising to some $397.7 billion. The semiconductor industry has "no control" over the macro-economic forces at work on its growth, said Len Jelinek, director and chief analyst of semiconductor manufacturing research at IHS. The global economy, and in particular key markets like the US and Japan, exerts pressure on the chip industry.

Consumers did help lower semiconductor inventories during the 2011 holiday season, but not enough to trigger re-stocking demand. A deliberate decrease in manufacturing run rates by semiconductor companies in Q3 2011 could not bring inventory down far enough either. Semiconductor demand will remain depressed until Q2 2012.

Because factory utilization will not recover until the middle of 2012, the integrated device manufacturers (IDMs) that design and manufacture semiconductors in-house will experience greater stress with underperforming factories. Capital expenditures for efficiency-increasing tools will likely be pushed to 2013, as long as current manufacturing capacity meets demand.

Also read: Semiconductor fab capex forecast for 2012

Foundries dedicated to manufacturing semiconductors as their main activity will continue to outperform the industry, while IDMs will have lower growth, especially as they have abdicated manufacturing in leading-edge high-margin technology to the foundries. IDMs rish seeing fabless or foundry companies control leading-edge design or production, which could lead to IDM consolidation. This would have the unintended effect of providing rival foundries with even more opportunities for additional growth.

In the memory — mainly dynamic random access memory (DRAM) — sector, revenue will decline 16.1% in 2012, further depressing a sector that fell 26.8% in 2011. NAND Flash, despite strong performance in mobile handsets and media tablets in 2011, will not require another surge in production capacity.

The wireless communication segment, spurred by media tablets, smartphones and industrial electronics, will drive chip revenues. The core PC and peripheral markets must see significant demand increases to boost the semiconductor industry as a whole, IHS believes.

Learn more about this topic with the IHS iSuppli report, Weak Demand Pushes Manufacturing Recovery into Q2 2012 at http://www.isuppli.com/Semiconductor-Value-Chain/Pages/Weak-Demand-Pushed-Manufacturing-Recovery-into-Q2-2012.aspx?PRX

IHS (NYSE: IHS) is the leading source of information and insight in critical areas that shape today’s business landscape, including energy and power; design and supply chain; defense, risk and security; environmental, health and safety (EHS) and sustainability; country and industry forecasting; and commodities, pricing and cost. For more information, visit www.ihs.com.

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