Tag Archives: Advanced Packaging

April 11, 2012 — Agilent Technologies Inc. (NYSE: A) launched Express Test for ultra-fast, high-precision nanomechanical testing on thin films, low-k materials, composites, and more. It allows 100 indents on 100 surface sites in 100 seconds.

Express Test is used on the Agilent Nano Indenter G200 for nanoscale mechanical testing. The option allows the Nano Indenter G200 to be operated in controlled-force or controlled-displacement mode, with point-and-shoot testing. The Nano Indenter G200 must be configured with an Agilent Dynamic Contact Module II indentation head, Agilent

April 10, 2012 — Research organization CEA-Leti and passive component maker IPDiA developed an atomic layer deposition (ALD) process to apply medium-k dielectric layers on a metal-insulator-metal capacitor architecture, enabling 3D capacitors. The project took less than 2 years.

ALD enables conformal coating of high aspect ratio surfaces and exact thickness control at the atomic level. A capacitance density of 550nF/mm2 was obtained by keeping leakage current and parasitic levels as low as in the 250nF/mm2 PICS3 product.

The PICS high-density capacitors utilize vertical space to increase the capacitor surface, and therefore capacitance, without increasing the device footprint. Temperature, voltage, and aging tests revealed stability with this ALD-based process. The PICS capacitors show very low parasitic elements (ESR, ESL) and can outperform MLCCs, tantalum capacitors, or other discretes in a much smaller volume, the partners report.

Initial applications include high-reliability devices in medical, harsh environment, automotive, communication, industrial, and defense/aerospace markets. Examples include DC/DC converter and decoupling functions within limited space: IC decoupling, MEMS, sensors, memory sticks, smartcards, etc.

IPDiA unveiled its results at the Device Packaging 2012 conference in Scottdale, AZ, USA.

IPDiA and CEA-Leti will now work on stabilizing the ALD process and readying the product for market. The goal is 1

Electronics, optoelectronics, and semiconductor packaging and solutions company Endicott Interconnect Technologies (EI) has appointed David W. Van Rossum to the position of Chief Financial Officer effective immediately. In the CFO role, Van Rossum is responsible for the financial plans and policies of the company including establishing and maintaining fiscal controls; preparing and interpreting financial reports; ensuring financial resources are available to meet strategic objectives and safeguarding company assets.

Van Rossum spent 20 years with Tyco International and was VP/CFO of Tyco Telecomm from 1997-2002. More recently, David was CFO at Russound as their CFO and COO and is currently on the Board of Directors at Service Credit Union. Most of his financial experience has been in high-tech manufacturing and in Government contracts. "David’s broad and diverse financial and leadership experience will bring added value to the company as we continue to focus the organization on growth and operational excellence," said James J. McNamara, president and CEO at EI. "I am confident he will make a significant contribution in this complex environment."

David earned his MBA from the University of Southern New Hampshire. He also possesses a BS in Business Administration from New Hampshire University.

SOURCE: Endicott Interconnect Technologies; http://endicottinterconnect.blogspot.com/2012/03/endicott-interconnect-appoints-new.html

Courtesy of Gail Overton, senior editor, OptoIQ.com.

ONNN


April 9, 2012

April 6, 2012 – BUSINESS WIRE — Chip maker ON Semiconductor (Nasdaq: ONNN) will develop a next-generation star tracker CMOS image sensor (CIS) with the European Space Agency (ESA). The sensor will be used in star trackers, sun sensors and other scientific applications.

The High Accuracy Star Tracker 3 (HAS3) image sensor will expand the STAR family of radiation-tolerant CIS. ONNN and ESA plan to build a 1280 x 1280 pixel, 11 x 11

April 6, 2012 – BUSINESS WIRE — Materials supplier Rogers Corporation (NYSE: ROG) shared an update on its restructuring and streamlining initiatives, which are expected to save about $13 million (annualized savings) by Q4.

Rogers made improvements in supply chain and manufacturing operations efficiencies, focused on cost reduction across its businesses, and reduced headcount through a voluntary retirement program and the elimination of some positions.

As a result of the reorganization, product development, marketing and sales resources are now better aligned with its growth businesses: Printed Circuit Materials, High Performance Foams, and Power Electronics Solutions. Additional resources have been allocated to marketing and new business development activities to stimulate growth and expand revenue opportunities. Rogers will continue its active partnering and acquisition strategy for several of its core businesses.

Among the other improvement initiatives that concluded in the first quarter was the liquidation of the Company

April 5, 2012 — MOSAID Technologies Inc. is sampling a 16-die stack NAND Flash device operating on a single high-performance channel, the 5126Gb HLNAND. It comes in an 18 x 14mm, 100-ball BGA package.

The 16 industry-standard 32Gb NAND Flash die are stacked with two HLNAND interface devices, outputting 333MB/s (DDR333) at 1.8V output over 1 byte-wide HLNAND interface channel.

HLNAND is fabricated with a ring architecture, which avoids performance degradation in large chip stacks, compared to parallel bus architectures, said Jin-Ki Kim, VP of R&D, MOSAID. The ring architecture allows virtually unlimited NAND die to be connected on a single channel. It does not require termination resistors, lowering the device

April 4, 2012 — The Georgia Institute of Technology (Georgia Tech) Packaging Research Center (PRC) and its industry partners are developing low-cost/high-I/O silicon and glass interposers. Current work covers ultra-thin interposers, via linings, roll-to-roll manufacturing, and more. More areas of focus will be added with a Thinfilm Passive Components (TPC) industry consortium.

GT PRC proposes to add four new focus areas that include:

  • Second-level reliability with low CTE interposers;
  • Ultra-fine-pitch interconnection, down to 15um pitch;
  • Thermal enhancement of glass and silicon interposers and packages; and
  • Thinfilm Passive planar or IPD integration enhanced by through vias in glass or silicon.

The primary objective of the passive consortium is to transform today’s thick and bulky discrete components into thin IPDs or thin planar films with 10X improvements in volumetric density and performance at the same cost as today’s components for power, digital, RF, and analog functions. The thin IPDs (see the figure) will be micro-assembled on, or deposited as planar thinfilms on silicon or glass interposers or packages.

Figure. High-performance thin-film passives on silicon and glass interposers.

The TPC on Silicon and Glass Interposers and Packages Research focuses on:
Novel nanoscale materials and processes for improved properties such as volumetric density, stability and Quality factor
High-yield manufacturing with self-healing and precision-processing
Process integration as planar thin films or micro assembly of IPDs to silicon or glass substrates.

The Georgia Tech PRC has been pioneering low-cost and high I/O silicon and glass interposers with groundbreaking accomplishments in ultra-thin glass and Si panel handling, high throughput vias at small pitch, via-lining for electrical and thermo-mechanical performance, low-cost RDL, small-pitch Cu-to-Cu Interconnections, roll-to-roll ultra-thin glass, via reliability, electrical superiority of glass over Si, and prototype interposer demonstration. Companies interested in more information about this industry consortium are encouraged to contact Dr. Raj Pulugurtha at [email protected], or Prof. Rao Tummala at [email protected]. Internet: http://www.prc.gatech.edu/partnership/TPC.

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April 3, 2012 — Ferro Electronic Materials expanded its low temperature co-fired ceramic (LTCC) portfolio, adding a line of cost-effective matched materials. The L8 LTCC system claims better performance over a greater range of frequencies and easier manufacturability than market alternatives.

The L8 LTCC system’s dielectric properties provide lower loss than competitive, price-sensitive LTCC products, Ferro reports, enabling lower-power components. L8 performs well at up to 40GHz (see the figure below). The lead-free, RoHS-compliant glass-ceramic formulation provides high strength and may be used in wire-bond, solderable, brazable, and plateable packaging applications.

Ferro supplies L8 ceramic tape with a full complement of matched metallization pastes that include silver, gold, plateable silver, and mixed-metal formulations. Gold and nickel may be electrolessly plated onto silver surfaces to improve performance in harsh environments and for easier wire bonding. L8 pastes have good printability and the material set has a broad processing window with multiple co-firing options with either belt or box furnaces.     

The L8 system is suitable for cost-sensitive low- to mid-frequency telecommunications, automotive, and medical modules, components and sensors as well as higher frequency aerospace, satellite and other high-reliability applications.

Learn more about the Ferro L8 LTCC product line in booth 9-212 at SMT Hybrid Packaging 2012, May 8-10 in Nuremberg, Germany.

Ferro Corporation is a global supplier of technology-based performance materials for manufacturers in electronics, solar, and other end markets. Learn more at http://www.ferro.com.

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