Tag Archives: Advanced Packaging

December 1, 2011 – BUSINESS WIRE — Power management semiconductor maker International Rectifier (IR, NY:IRF) purchased multiple Apollo physical vapor deposition (PVD) systems from packaging equipment maker NEXX Systems for its Newport, Wales fab.

The Apollo’s backside metallization capabilities will be used to make next-generation power devices, including insulated gate bipolar transistors (IGBTs).

The Apollo can handle extremely thin wafers and permits wafer size conversions during production, in under an hour. Apollo’s Bernoulli wafer handling system moves thinned wafers on a processing tray in an atmospheric environment, handling thin wafers, bowed wafers, and several distinctive wafer shapes in high-temperature anneal processing.

IR qualified and ordered Apollo PVD systems because they enable cutting-edge advanced packaging technologies unavailable in the marketplace, said Alain Charles, VP of technology development at IR.

International Rectifier makes power management technology: analog and mixed signal ICs, advanced circuit devices, integrated power systems and components. Additional information can be found at www.irf.com.

NEXX Systems makes equipment for flip chip and advanced packaging: Apollo and Stratus, for high throughput deposition of metals. Learn more at www.nexxsystems.com.

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November 29, 2011 — Dainippon Screen Mfg. Co. Ltd. developed the DW-3000 direct imaging exposure system for next-generation semiconductor packaging, exposing complex 3D multilayer substrates while adjusting for warping and distortion of individual wafers. The DW-3000 exposure system images wiring patterns directly onto wafers.

With the system release, Dainippon Screen will enter the semiconductor post-processing exposure system market. The company makes this move based on the trends of thinned wafers and high-density, multi-chip packaging with fine-pitch interconnects. This means minute warping and distortion occurs very easily and improving the precision of the wiring patterns bridging the chips has become a key issue. This is being undertaken as part of the FRONTIER project for promoting the development of new fields for Screen

November 29, 2011 — OSRAM Opto Semiconductors introduced the Oslon Square LED for lighting applications, packaged enclosed in a reflective layer to boost light output.

The reflective package technology increases system efficiency, redirecting light from the side and back of the LED chip to the front. Light that is reflected back to the LED within a system, for example from a diffuser, can also be recycled in this way. At an operating current of 700mA, it achieves an efficiency of above 90lm/W and a luminous flux of 200lm and more. At 350mA, its efficiency exceeds the 100lm/W mark.

Also read: Thin-film chip boosts LED optical output without changing footprint

The Oslon Square is available in various versions and color temperatures, and can be operated with different currents. The Square measures 3 x 3mm, has thermal resistance of 3.8

November 28, 2011 – Marketwire — STATS ChipPAC Ltd. (SGX-ST:STATSChP), a semiconductor test and advanced packaging service provider, was named "Supplier of the Year" by Cirrus Logic Inc. (NASDAQ:CRUS), analog and mixed-signal processing components maker.

STATS ChipPAC provides full turnkey semiconductor assembly and test services (SATS) for Cirrus Logic’s portable audio solutions, which are used in diverse consumer electronics products. STATS ChipPAC was recognized from among Cirrus Logic’s back-end service providers.

Cirrus Logic aims for "very small and very economical" audio products, notes Randy Carlson, VP of supply chain management, Cirrus Logic, who credited STATS ChipPAC’s "responsiveness and exceptional performance during this past year" for advancing the company.

Hal Lasky, EVP and chief sales officer, STATS ChipPAC, added that his company’s high-performance wafer-level packaging (WLP) abilities were instrumental in supporting Cirrus Logic.

STATS ChipPAC recently named its own top suppliers.
STATS ChipPAC Ltd. provides semiconductor packaging design, assembly, test and distribution for communications, digital consumer and computing. STATS ChipPAC is listed on the SGX-ST. Further information is available at www.statschippac.com.

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Hynix renews Tessera license


November 24, 2011

November 24, 2011 — Hynix Semiconductor Inc. exercised the renewal option in its March 31, 2005 license agreement with Tessera Technologies Inc. (NASDAQ:TSRA) to extend the term of that license to May 22, 2017.

November 23, 2011 – BUSINESS WIRE — NeoPhotonics Corporation (NYSE:NPTN), photonic integrated circuit (PIC) maker, is in the process of doubling capacity for production of narrow-linewidth tunable lasers using a proprietary packaging technology.

NeoPhotonics offers these lasers in an OIF MSA standard ITLA form factor. The products are compact and widely tunable laser assemblies designed to be optimized for narrow linewidth with up to 35mW launch power in the C band and 20mW in the L band. The products

November 22, 2011 – PRNewswire-Asia-FirstCall — ChipMOS TECHNOLOGIES (Bermuda) LTD. (Nasdaq:IMOS) subsidiary ThaiLin Semiconductor Corp. will take on dedicated semiconductor testing capacity for a new long-term service agreement with its client Asahi Kasei Microdevices Corporation (AKM).

Under the new agreement, AKM will consign to ThaiLin certain sets of mixed-signal tester equipment, which ThaiLin will use as dedicated capacity to test AKM devices. This will allow ThaiLin to provide a critical testing facility without capex investment, noted S.J. Cheng, Chairman and CEO of ChipMOS.

The companies have worked together since 1999.

Hideki Kobori, president of Asahi Kasei Microdevices Corporation, commented that the new agreement follows AKM’s geographic diversification strategy following Japan’s March 11 earthquake and tsunami off Sendai. AKM is fortifying its supply chain with a long-term partner, ensuring quality control, Kobori said.

The new business will give ChipMOS access to wafer level chip scale packaging (WLCSP) technology, which helps it penetrate the smartphone/tablet device manufacturing market, said Cheng. ChipMOS also is building its LCD driver business for this end-use sector.

Asahi Kasei Microdevices Corporation (AKM) is the core operating company for all electronics devices operations of the Asahi Kasei Group. AKM provides mixed-signal ICs for consumer, automotive, and communication applications as well as magnetic sensors. Learn more at www.asahi-kasei.co.jp/akm/en/.

ChipMOS is an independent provider of semiconductor testing and assembly services to customers in Taiwan, Japan, and the U.S. Learn more at www.chipmos.com.

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November 18, 2011 – PRNewswire — SMArt systems Co-design (SMAC) launched today, bringing together a multinational, multidisciplinary partnership of leading companies on a three-year project for design and integration of smart systems. Smart systems incorporate sensing, actuation, computation, wireless communication, and energy harvesting in one package.

The SMAC program aims to put European companies in leadership positions in these key markets by reducing design costs and time-to-market for next-generation smart systems. SMAC partners assert that the design methodology is holding back smart system development. Separate design tools are used currently for different parts of the system, separately modeling, simulating, and designing MEMS sensors, analog and RF components, and digital ICs. No design methodology/tools exist that can simultaneously and seamlessly overcome potential intended or parasitic couplings (e.g. thermal or electromagnetic) of closely packed elements, and other challenges.

We need "a structured design methodology that explicitly accounts for final integration," said Salvatore Rinaudo, SMAC project co-ordinator and Industrial and Multisegment Sector CAD R&D Director at STMicroelectronics. A "holistic, integration-aware, design platform" will allow the industry to exploit the potential of smart systems, while reducing design costs, time-to-market, and integration risks.

Advanced packaging technologies such as system-in-package (SiP) and chip stacking (3D IC) with through-silicon vias (TSV) already allow manufacturers to package heterogeneous parts — digital and analog electronics, RF, MEMS, other sensors, power sources, wireless transmission devices — densely with performance and cost gains.

The SMAC mission covers:
1.New modeling and simulation capabilities to support accurate multi-physics, multi-layer, multi-scale and multi-domain co-simulation.
2.Innovative integration-aware design techniques for components and subsystems from different technology domains and with different functions.
3.Combination and augmentation of existing modeling and simulation tools into a seamless design flow (i.e., the SMAC Platform), enabling integration-aware co-design of smart systems.
4.Demonstration of the effectiveness of some of the new design solutions through implementation of test-cases featuring leading-edge technology.
5.Demonstration of the accuracy and ease of integration of new and existing EDA tools within the SMAC Platform by comparison with state-of-the-art reference methodologies.
6.Demonstration of the usability of the SMAC Platform through its application to an industry-strength design case.

Partners include academia and several Electronic Design Automation (EDA) and semiconductor companies:
STMicroelectronics s.r.l. (Italy), the Project Coordinator;
Philips Medical Systems Nederland BV (The Netherlands);
ON Semiconductor Belgium BVBA (Belgium);
Agilent Technologies Belgium NV (Belgium);
Coventor Sarl (France);
MunEDA GmbH (Germany);
EDALab s.r.l. (Italy);
Fondazione Istituto Italiano di Tecnologia (Italy);
Tyndall National Institute, University College Cork (Ireland);
Instytut Technologii Elektronowej (Poland);
Politecnico di Torino (Italy);
Universita degli Studi di Catania (Italy);
University of Nottingham (United Kingdom);
Katholieke Universiteit Leuven (Belgium);
Technische Universiteit Eindhoven (The Netherlands);
Slovak University of Technology Bratislava (Slovakia);
ST-POLITO s.c.a.r.l. (Italy).

SMAC is partially funded by the EU’s FP7 (FP7-ICT-2011-7).

The SMAC project will involve a total effort of over 1,300 person/months and an investment of approximately 13M Euros, of which the industrial partners will contribute around 5M Euros.