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Design features that contributed most to the improved performance include increased rotational speed, integrated rotor sleeves, and increased purge injection temperature.

BY MIKE BOGER, Edwards Vacuum, Tokyo, Japan

The use of high-k dielectric films deposited through atomic layer deposition, primarily in batch furnaces, has intensified, particularly in the manufacture of memory devices and high-k metal gates (HKMG) in logic devices. ALD uses a sequential purge and injection of the precursor gases to generate slow, but accurate growth of the films one atomic layer at a time. One of the precusors is typically a metal organic compound from a liquid source, commonly zirconium or hafnium-containing materials, followed by ozone to create the high-k film.

Wafers are usually processed in a furnace with batch sizes of 200 or more wafers. Reliability of the vacuum system is imperative to prevent contamination and consequent scrapping of the wafers. Unexpected failures can cause significant loss of work in process and process downtime. For example, if the vacuum pump seizes suddenly due to internal contamination by process by-products, the pressure in the pipe between the vacuum and furnaces rises, and there is a risk that powder deposited in the pipe will flow back into the furnace. This powder can not only contaminate wafers in the furnace, but also force a time-consuming clean-up that may remove the furnace from operation for a day or more.

The challenge

The mean-time-between-service (MTBS) for a vacuum pump used in semiconductor manufacturing varies greatly depending on the particular process it supports and the design of the pump. For the ALD processes considered here most failures caused process by-products can be grouped into four categories.

  • Corrosion – Attack on the metal components of the pump results in the opening of clearances leading to loss of base vacuum. Depending on the location of corrosion, the oxidation of the metal may actually generate powder that can cause seizure of rotating elements.
  • Plating – The deposition of metal compounds on the surface of internal components fouls internal mechanism clearances, causing the pump to seize.
  • Powder ingestion – Powder that enters the pump can jam rotating elements, leading to seizure.
  • Condensation – Compounds in the pumped gas stream transition from a gaseous to a solid phase within the pump, depositing on internal surfaces and eventually leading to loss of clearance and seizure.

Monitoring of pump operating conditions, such as input power, current, and running temperature, can provide an indication of the health of the pump. Events that lead to failure are generally gradual in nature. Advance notice periods can be measured in days. However, failures of vacuum pumps on high-k ALD processes often happen suddenly with little to no indication of distress prior to seizure.

A typical example of a vacuum pump used on a high-k ALD process is shown in FIGURE 1. This pump was used in a full production environment and consisted of a 1,800 m3h-1 mechanical booster mounted above a 160 m3h-1 dry pump. In this case, the pump exhibited a strong spike in running power, approximately 20 times normal, and was immediately removed for inspection. Significant deposition is evident in the booster (Fig. 1 left) and also in the last stage of the dry pump (Fig. 1 right). Evidence of the loss of clearance that caused the spike in input power is observed as a shiny area on the rotor lobe. In operation this pump was exposed to TEMAH (hafnium-containing liquid precursor), TMA (aluminum-containing liquid precursor), and ozone for producing HfO2 and TMA Al2O3. It was exchanged after 1,200 hours of use.

ALD 1-A ALD 1-B

 

FIGURE 1. A picture of a disassembled pump after 1,200 hours of use on a high-k ALD process showing the deposition in the booster (left) and loss of clearance in the last stage of the dry pump (right). 

FIGURE 2 provides another example of a pump that was removed due to detection of a spike in input current. In this case, the booster, second stage, and final stage of the pump are shown. Although the process was nominally the same (deposition of HfO2 and Al2O3), the deposition pattern is different. In this case, the booster and early stages of the dry pump show signs of a thin coating of a material that exhibits a green iridescent sheen. The final stage of the pump has a brown powder accumulation, but of a lighter color than that shown in Fig. 1.

FIGURE 2. Pictures of a disassembled pump that was removed for inspection after only 457 hours due to a large current spike detected during operation. In order, the pictures show the booster, second stage of the dry pump, and the final stage of the dry pump.

FIGURE 2. Pictures of a disassembled pump that was removed for inspection after only 457 hours due to a large current spike detected during operation. In order, the pictures show the booster, second stage of the dry pump, and the final stage of the dry pump.

In both of the examples shown in Figs. 1 and 2, the service interval of the pump was short and below the user’s expectations. In these cases, which are representative of all the pumps used on this process, the user was forced to exchange pumps frequently to minimize the risk of wafer loss. Other customers had similar experiences. TABLE 1 lists the films deposited and the preventative maintenance service intervals implemented by four customers. Analysis of serviced pumps suggested that processes depositing zirconium oxide were more challenging for the pump.

Screen Shot 2015-02-10 at 5.30.54 PM

Analysis

To better understand the reliability improvement challenge, a sample of the deposited material from a failed pump was analyzed. The results of the analysis, shown in FIGURE 3, revealed deposits rich in carbon and metal oxides, consistent with metal-organic precursors. The rate of oxide deposition appeared to be higher than that which would occur through pure ALD mechanisms, suggesting some chemical vapor deposition (CVD) or decomposition of the gases being pumped.

FIGURE 3. Analysis of the deposition within a failed pump showing hafnium, oxygen, and carbon components.

FIGURE 3. Analysis of the deposition within a failed pump showing hafnium, oxygen, and carbon components.

A survey of literature [1], [2], [3], [4] revealed that the typical reactants used in high-k ALD can react at high pressure and at low temperature without the need for external energetic activation. This suggests that even if there were no CVD or decomposition of gases within the pump, ALD-like films can still be deposited on the internal surfaces of the pump.

A simulation of the vapor pressure of TEMAH (one of the precursors used) within the pump was conducted, assuming a mass flow rate of 0.2 mg min−1 for TEMAH. The simulation results were compared to the measured vapor pressure of TEMAH to determine if there was any risk of TEMAH condensing within the vacuum pump. The results, shown in FIGURE 4, suggest that there are sufficient safety margins in the actual conditions. The TEMAH will stay in vapor form while it travels through the pump, even if the actual flow varied by an order of magnitude from that assumed. Moreover, the pump temperature could be reduced substantially without risk of condensing TEMAH within the pump.

FIGURE 4. Vapor pressure of TEMAH (0.2 mg/min with 14 slm of nitrogen) and simulated vapor pressure of TEMAH in the dry pump, inlet to outlet.

FIGURE 4. Vapor pressure of TEMAH (0.2 mg/min with 14 slm of nitrogen) and simulated vapor pressure of TEMAH in the dry pump, inlet to outlet.

A number of pumps were inspected, a large majority of which were pumps exchanged prior to seizure. Unfortunately, although powder was evident in the final stages of all pumps, not all pumps had powders of the same color. Moreover, as seen in the middle photograph of Fig. 2, some pumps and boosters were relatively clean exhibiting just a green sheen of deposition.

None of the observations, other than powder in the final stage of the dry pump, were consistently repeatable, suggesting that factors upstream of the pump were also contributing to short service intervals. Powder loading varied between pumps and within the pumps, although the heaviest deposition was always located in the final stages of the dry pump. It is normal for the most deposition to occur near the exhaust of the pump because of the generally increased temperature of the exhaust gas and the increase in vapor pressure of the materials being pumped.

A diagram of the dry pump stages from inlet to outlet is shown in FIGURE 5, where the sleeves are also shown. Consistently, the final stage shaft sleeve, which is located between the 4th and 5th stage of the pump, was the weakest link in the design. Deposition would collect on the sleeve’s surface. Resulting friction between the sleeve and the stator would cause the components to heat, expand, and finally seize the pump.

FIGURE 5. Schematic of the dry pump mechanism showing inlet (1st stage) to outlet (5th stage). Rotor sleeves are shown in green.

FIGURE 5. Schematic of the dry pump mechanism showing inlet (1st stage) to outlet (5th stage). Rotor sleeves are shown in green.

FIGURE 6 shows the sleeves from between three stages of a pump exchanged for service. Another example is shown in the right side picture of Fig. 1. The sleeves are steel with a PTFE coating, giving them a green color. Evidence of the deposition is clear in the shaft sleeves on the right side of the picture.

FIGURE 6. Picture of sleeves in an exchanged pump showing deposition on the outer surfaces.

FIGURE 6. Picture of sleeves in an exchanged pump showing deposition on the outer surfaces.

Extending pump service intervals

Inconsistencies in powder deposition that suggested variations in upstream conditions were ultimately traced to condensation in the gas lines to the process chamber. The amount of condensed liquid and the length of the flow step in the ALD cycle affected the amount of deposition. When the user took care to avoid condensation, a much more consistent pattern of deposition was observed within the pump.

For any particular dry pump, the two most convenient elements that can be adjusted are the nitrogen purge and the temperature of the pump. Adding purge, or changing the location of the purge, can affect the partial pressure of the gases being pumped. Purge can also affect the temperature of the gas being pumped. In this case the purge flow was already 76 slm and further increase could have affected the downstream gas abatement device.

Experiments to extend the MTBS focused on the pump running temperature. Temperature changes within the pump can dramatically affect the propensity of the pumped gases to condense on the internal surfaces of the pump as well as the rate of reactions of any gases being pumped. However, varying the pump temperature from 140°C to nearly 180°C made any appreciable change to the service interval.

Finally, two pumps with designs that differed significantly from the original pump were evaluated. Additionally, new pump A provided significantly greater capacity at higher inlet pressures than new pump B, at the expense of greater power consumption. The results are shown in TABLE 2.

Screen Shot 2015-02-10 at 5.32.47 PM

New Pump A was initially installed with a temperature set point of 130°C. It was removed after six months for inspection prior to failure. New Pump B was tested with a temperature set point of 110°C. It was removed after six months prior to failure. A comparison of the internal condition of the Original Pump and New Pump B is shown in FIGURE 7.

FIGURE 7. Pictures comparing the third stage of the original pump and New Pump B showing the different deposition patterns.

FIGURE 7. Pictures comparing the third stage of the original pump and New Pump B showing the different deposition patterns.

Four differences in the new pump design are believed to have contributed to improved reliability:

  • 180% increase in rotational speed (180%) resulting in less residence time of the pumped gases.
  • Reduced operating temperature. Although many semiconductor processes benefit from a hot pump, this ALD process does not.
  • No rotor sleeves. The rotor sleeve in the new pumps was integrated with the rotor element itself. This not only removed the necessity for a coating, but appeared to strengthen the mechanism.
  • Heated purge. The purge in the new pumps is warmed to within 95% of the stator temperature to prevent cooling effects and reduce the chance of spontaneous condensation of gases.

Subsequent experience with a large number of pumps and customers has confirmed the advantages provided by the new pump design. New pump B is the recommended pump for this application with fixed service intervals varying between 4 and 6 months depending on the specific characteristics of the process supported.

Conclusions

Deposition of high-k materials using ALD is a widely used technique for today’s transistor and memory structures. At early introduction of the process in high volume manufacturing, pump reliability became a key concern. Careful analysis and cooperation with customers resulted in extending the service interval of the pumps from one to up to six months, an achievement that significantly reduced operating expenses and production losses due to wafer contamination and equipment downtime caused by unexpected pump failures. Analysis of the pump condition and test results showed that, more than temperature or purge, a different pump design provided the greatest improvement in service intervals. Design features that contributed most to the improved performance include increased rotational speed, integrated rotor sleeves, and increased purge injection temperature.

References

1. J. M. et al., “Impact of Hf-precursor choice on scaling and performance of high-k gate dielectrics hf-based high-k materials,” ECSTrans., p. 59, 2007.
2. X. L. et al., “Ald of hafnium oxide thin films from tetrakis (ethylmethylamino) hafnium and ozone,” J. of ECS, vol. 152, 2005.
3. H. Furuya, “Formation of metal oxide film,” Sep 2008, patent application: US20080226820 A1.
4. Y. S. et al., “Atomic layer deposition of hafnium oxide and hafnium silicate thin films using liquid precursors and ozone,” J. Vac. Sci. Tech. A, vol. 22, 2004.

Researchers at The University of Texas at Austin’s Cockrell School of Engineering have created the first transistors made of silicene, the world’s thinnest silicon material. Their research holds the promise of building dramatically faster, smaller and more efficient computer chips.

Made of a one-atom-thick layer of silicon atoms, silicene has outstanding electrical properties but has until now proved difficult to produce and work with.

Deji Akinwande, an assistant professor in the Cockrell School’s Department of Electrical and Computer Engineering, and his team, including lead researcher Li Tao, solved one of the major challenges surrounding silicene by demonstrating that it can be made into transistors —semiconductor devices used to amplify and switch electronic signals and electrical power.

The first-of-their-kind devices developed by Akinwande and his teamrely on the thinnest of any semiconductor material, a long-standing dream of the chip industry, and could pave the way for future generations of faster, energy-efficient computer chips. Their work was published this week in the journal Nature Nanotechnology.

Until a few years ago, human-made silicene was a purely theoretical material. Looking at carbon-based graphene, another atom-thick material with promise for chip development, researchers speculated that silicon atoms could be structured in a broadly similar way.

Akinwande, who also works on graphene transistors, sees value in silicene’s relationship to silicon, which chipmakers already know how to work with.

“Apart from introducing a new player in the playground of 2-D materials, silicene, with its close chemical affinity to silicon, suggests an opportunity in the road map of the semiconductor industry,” Akinwande said. “The major breakthrough here is the efficient low-temperature manufacturing and fabrication of silicene devices for the first time.”

Despite its promise for commercial adaptation, silicene has proved extremely difficult to create and work with because of its complexity and instability when exposed to air.

To work around these issues, Akinwande teamed with Alessandro Molle at the Institute for Microelectronics and Microsystems in Agrate Brianza, Italy, to develop a new method for fabricating the silicene that reduces its exposure to air. To start, the researchers let a hot vapor of silicon atoms condense onto a crystalline block of silver in a vacuum chamber. They then formed a silicene sheet on a thin layer of silver and added a nanometer-thick layer of alumina on top. Because of these protective layers, the team could safely peel it of its base and transfer it silver-side-up to an oxidized-silicon substrate. They were then able to gently scrape some of the silver to leave behind two islands of metal as electrodes, with a strip of silicene between them.

In the near-term, Akinwande will continue to investigate new structures and methods for creating silicene, which may lead to low-energy, high-speed digital computer chips.

With properties that promise faster computers, better sensors and much more, graphene has been dubbed the ‘miracle material’. But progress in producing it on an industrial scale without compromising its properties has proved elusive. University of Groningen scientists may now have made a breakthrough. Their results will be published in the journal Nano Letters.

Graphene is a special material with crystals that are just one atom thick. Electrons pass through it with hardly any resistance at all, and despite being very flexible, it is stronger than any metal. The discoverers of graphene, Andre Geim and Konstantin Novoselov, famously made it by peeling graphite with Scotch tape until they managed to isolate a single atomic layer: graphene. It won them the 2010 Nobel Prize in Physics.

“The challenge is to find a substrate that not only preserves the properties of graphene, but also enables scalable production,” said Stefano Gottardi, PhD student at the University of Groningen Zernike Institute for Advanced Materials.

A good candidate is chemical vapor deposition. Here heat is used to vaporize a carbon precursor like methane, which then reacts with a catalytically active substrate to form graphene on its surface. A transition metal is normally used as the substrate. However, not only does the transition metal act as a support, but it also tends to interact with the graphene and modify – or even deteriorate – its outstanding properties.

Cumbersome

To restore these properties after growth on the metal, the graphene has to be transferred to a non-interacting substrate, but this transfer process is cumbersome and often introduces defects. Nevertheless, many scientists are trying to improve graphene growth on transition metals, mostly using copper foil as the substrate.

This is what the Surfaces and Thin Films group of Gottardi’s supervisors Meike Stöhr and Petra Rudolf did too. “When we analyzed a sample of graphene on copper, we made some strange observations,” Stöhr recalled. The observations suggested that alongside the copper some copper oxide was also present. Indeed, a nice graphene film appeared to have formed on the copper oxide, and as oxidized metals might leave the properties of graphene unaltered, this was a potentially important observation.

Achievement

The Groningen team began to study this possibility in more detail. That was three years ago. Since then, Gottardi and his colleagues have managed to successfully grow graphene on copper oxide. This achievement together with an in-depth characterization of graphene’s properties will be published in Nano Letters. The team also reports the remarkable finding that graphene on copper oxide is decoupled from the substrate, which means that it preserves its peculiar electronic properties.

The results could be far-reaching. Stöhr: “Other labs need to reproduce our findings, and quite a bit of work needs to be done to optimize growth conditions.”

The best case scenario would be that large single-domain crystals of graphene could be grown on copper oxide. If this proves to be the case, it should then be possible to use lithographic techniques to make all sorts of electronic devices from graphene in a commercially viable manner. An unexpected observation three years ago may thus prove to be the start of a new era of graphene electronics.

ROHM recently announced the development of a cell balancing IC that contributes to increased miniaturization, greater stability, and longer life for EDLCs (Electric Double Layer Capacitors), which are driving the adoption of energy regeneration applications in industrial equipment, automotive idling stop systems, and voltage sag (instantaneous voltage drop) countermeasures.

The BD14000EFV-C integrates over 20 discrete components required for EDLC cell balancing on a single chip, reducing mounting area by 38 percent over conventional solutions while eliminating component variations, making it easy to configure compact, high reliability EDLC systems.

In addition to cell balancing functionality for up to 6 cells, multiple ICs can be connected in series to enable simultaneous control of even more cells. The cell balancing voltage can be set between 2.4V and 3.1V, ensuring support for a variety of EDLCs. Flag output is also built in, along with an over-current detection voltage function with adjustable detection voltage setting based on the cell balancing voltage. In addition, AEC-Q100 qualification ensures worry-free use in automotive and other environments requiring high reliability.

Compared to other storage devices, EDLC offers faster charge/discharge performance, longer life, and greater safety while minimizing environmental impact, making it ideal for a variety of applications – including automotive and industrial systems. And every year higher voltages and greater capacitances are demanded for use under high power environments.

When connecting multiple EDLCs in series to support higher voltages, the voltage applied to each EDLC cell may vary, which can adversely affect the lifetime and shorten the amount of time they can be safely used. And up to now cell balancing operation has been achieved through discrete configurations, making it necessary to address a number of issues such as board space and design load in order to minimize fluctuations while maintaining reliable cell balancing operation.

At next week’s SPIE Photonics West 2015, imec will present a new set of snapshot hyperspectral CMOS image sensors featuring spectral filter structures in a mosaic layout, processed per-pixel on 4×4 and 5×5 ‘Bayer-like’ arrays.

Imec’s hyperspectral filter structures are processed at wafer-level on commercially available CMOS image sensor wafers, enabling extremely compact, low cost and mass-producible hyperspectral imaging solutions. This paves the way to multiple applications ranging from machine vision, medical imaging, precision agriculture to higher volume industries such as security, automotive and consumer electronic devices.

“Imec’s latest achievements in hyperspectral imaging emphasize how our promising technology has become an industrially viable solution for a number of applications,” said Andy Lambrechts, program manager at imec. “The new mosaic architecture, and extended spectral range, brings unique advantages compared to our previously announced hyperspectral linescan sensors for applications in which scanning would not be practical. It enables spectral imaging in a truly compact, tiny form-factor, that can even be scaled to handheld devices. From the technology standpoint, we have now successfully demonstrated linescan and tiled sensors, in which spectral filters cover many pixels, to mosaic sensors, in which filters vary from pixel to pixel. At the same time, the spectral range is extended and now covers down to 470nm.”

The newly developed mosaic sensors feature one spectral filter per pixel, arranged in mosaics of 4×4 (16 spectral bands) or 5×5 (25 spectral bands) deposited onto a full array of 2 Million pixels 5.5µm size CMOSIS CMV2000 sensor. Two versions of the mosaic hyperspectral image sensors have been developed:

  • one 4×4 mosaic with 16 bands in the 470-630nm (visible range)
  • one 5×5 mosaic with 25 bands in the 600-1000nm range (Visible – NIR range)

“Imec’s hyperspectral imaging sensors (100bands linescan, 32bands tiled and 16/25bands mosaic designs) are off-the-shelf, commercially available engineering sample sensors that we developed to address the fragmented machine vision market and to trigger interest for this unique technology from potential end-users in other industries,” explained Jerome Baron, business development manager at imec. “We also offer customized spectral filtering solutions for companies that are already familiar with the technology and interested in developing proprietary solutions with a specific performance in terms of speed, compactness, spatial versus spectral resolution, bands selection, or cost.”

Located at booth 4635 at SPIE Photonics West, imec will demonstrate the 3 different versions of these hyperspectral image sensors. First engineering samples have been manufactured and now available for evaluation to early partners.

Entegris, Inc. announced the latest addition to its IntelliGen family of two-stage dispense technologies used in microelectronics manufacturing processes. The IntelliGen MV extends upon the proven performance of the IntelliGen Mini and HV dispense systems with a solution optimized for 3D and MEMS applications, enabling high-purity filtration and repeatable dispense of mid-viscosity fluids.

“With the growth of 3D IC technology and MEMS, manufacturers are requiring a higher level of throughput and greater filtration capabilities to meet their unique process demands,” said Entegris Chief Operating Officer, Todd Edlund.  “Each application requires an intensive focus on real-time, interactive diagnostics and feedback. The IntelliGen MV provides several new diagnostic and detection features to reduce defects, simplify recipe programming and improve filter priming.”

The IntelliGen MV Dispense System’s compact design allows manufactures to install multiple dispense systems into a single track with the ability to process several chemistries simultaneously and maximize filter performance even in the most sensitive photochemicals between 100 and 300 centipoise.

The IntelliGen MV Dispense System and other Entegris contamination control and substrate handling solutions will be featured at the SEMICON® Korea 2015 tradeshow, which is being held at COEX exhibition center in Seoul, Korea from February 4 through 6, 2015.

entegris

According to Yole Développement’s team, wide band gap (WBG) technologies are almost ready to be used by power electronics integrators. The question is now: How? Industry players have identified many module packaging challenges. Yole Développement (Yole) has analyzed their insights, and is now presenting an overview of the issues.

Yole is the “More Than Moore” market research, technology and strategy consulting company. Every day its analysts work with power electronics industry leaders, all along the supply chain. For more than 10 years, Yole has developed strong technology and market knowledge in this area.
Yole will present its latest analysis at the Applied Power Electronics Conference (Charlotte, North Carolina, USA on March 15-19, 2015 – Program). Yole’s presentation includes the following topic: the power electronics industry’s market structure, the status of its innovations, business opportunities at the substrate and device level, as well as from the applications side. To meet Yole’s team and ask your questions, save the date and contact us right now.

“The expected rebound from electric and hybrid electric vehicle (EV/HEV) applications and the emergence of smart-grid projects did not occur in 2013,” explains Dr Pierric Gueguen, Business Unit Manager, Power Electronics, at Yole. “Indeed, the car market was still depressed and the industry segment not strong enough to sustain high volumes.” (Source: Power Electronics in Electric and Hybrid Vehicles report). But how will EV/HEV applications impact the power electronics industry in 2015?

And what about Chinese players? Over the last few years, their leadership has been confirmed among their local markets. According to Yole’s analysis, these companies are now looking for international business opportunities. Such a strategy could reinforce their positioning and strongly modify the supply chain.

Yole presented this analysis at the annual meeting of Power Sources Manufacturers Association (PSMA), a US-based professional association that gathers the key players of the power electronics industry. Yole collaborates with PSMA’s members to learn more about industry changes and define roadmaps combining technical innovations and market evolution.

The power electronics industry has been focusing its research and development on WBG technologies. Under this strategy, silicon carbide (SiC) and gallium nitride (GaN) have proved to be powerful solutions. They are now ready to be implemented in numerous power electronics applications. (Sources: Power GaN 2014 report – SiC Modules, Devices and Substrates for Power Electronics Market report):

– Most companies today choose SiC technologies for high temperature and high voltage applications. Yole confirms that SiC is propagating across all industrial segments. Contagion has begun.
– In parallel companies are developing GaN solutions for medium-voltage applications, especially GaN HEMT transistors.

However, Yole’s analysts have identified a potential bottleneck for WBG technologies’ adoption: Device integration, especially at the power module packaging level. “WBG market shares are not directly linked to WBG component availability”, highlights Pierric. Instead they depend on when integrators will get benefits from such solutions. New WBG-based solutions induce research expenses at the power module packaging level. Such costs must be compensated for by added value at the system, compare to existing silicon solutions. “Integrators could ensure such added value by integrating WBG devices with an increased operating frequency and temperature,” explains Pierric.

Yole’s power electronics activities follow the industry all along the supply chain: from basic components to power modules. The consulting company continuously improves its expertise and enlarges it with new topics of investigation, covering technical innovations, mergers and acquisitions and market trends.

Today, Yole’s team is mixing a “bottom-up” methodology, taking into account business opportunities of innovative technologies and a “top-down” analysis, more focused on the market needs from the applications side.

This comes thanks to Pierric’s recent appointment to the management of Yole’s business in this area. Before Yole, Pierric oversaw power electronic converters’ and WBG devices’ integration into electric vehicles.

With that knowledge, Pierric and his team work to understand technical challenges, evolution of the supply chain in each sector, and identify business opportunities. He announces that in 2015, Yole will concentrate its power electronics analysis on device integration. The company will also introduce new topics related to alternative energy and will explore energy storage and autonomy with two new battery market analyses.

If you can’t find the ideal material, then design a new one.

Northwestern University’s James Rondinelli uses quantum mechanical calculations to predict and design the properties of new materials by working at the atom-level. His group’s latest achievement is the discovery of a novel way to control the electronic band gap in complex oxide materials without changing the material’s overall composition. The finding could potentially lead to better electro-optical devices, such as lasers, and new energy-generation and conversion materials, including more absorbent solar cells and the improved conversion of sunlight into chemical fuels through photoelectrocatalysis.

“There really aren’t any perfect materials to collect the sun’s light,” said Rondinelli, assistant professor of materials science and engineering in the McCormick School of Engineering. “So, as materials scientists, we’re trying to engineer one from the bottom up. We try to understand the structure of a material, the manner in which the atoms are arranged, and how that ‘genome’ supports a material’s properties and functionality.”

The electronic band gap is a fundamental material parameter required for controlling light harvesting, conversion, and transport technologies. Via band-gap engineering, scientists can change what portion of the solar spectrum can be absorbed by a solar cell, which requires changing the structure or chemistry of the material.

Current tuning methods in non-oxide semiconductors are only able to change the band gap by approximately one electronvolt, which still requires the material’s chemical composition to become altered. Rondinelli’s method can change the band gap by up to 200 percent without modifying the material’s chemistry. The naturally occurring layers contained in complex oxide materials inspired his team to investigate how to control the layers. They found that by controlling the interactions between neutral and electrically charged planes of atoms in the oxide, they could achieve much greater variation in electronic band gap tunability.

“You could actually cleave the crystal and, at the nanometer scale, see well-defined layers that comprise the structure,” he said. “The way in which you order the cations on these layers in the structure at the atomic level is what gives you a new control parameter that doesn’t exist normally in traditional semiconductor materials.”

By tuning the arrangement of the cations–ions having a net positive, neutral, or negative charge–on these planes in proximity to each other, Rondinelli’s team demonstrated a band gap variation of more than two electronvolts. “We changed the band gap by a large amount without changing the material’s chemical formula,” he said. “The only difference is the way we sequenced the ‘genes’ of the material.”

Supported by DARPA and the US Department of Energy, the research is described in the paper “Massive band gap variation in layered oxides through cation ordering,” published in the January 30 issue of Nature Communications. Prasanna Balachandran of Los Alamos National Laboratory in New Mexico is coauthor of the paper.

Arranging oxide layers differently gives rise to different properties. Rondinelli said that having the ability to experimentally control layer-by-layer ordering today could allow researchers to design new materials with specific properties and purposes. The next step is to test his computational findings experimentally.

Rondinelli’s research is aligned with President Barack Obama’s Materials Genome Initiative, which aims to accelerate the discovery of advanced materials to address challenges in energy, healthcare, and transportation.

“Today it’s possible to create digital materials with atomic level precision,” Rondinelli said. “The space for exploration, however, is enormous. If we understand how the material behavior emerges from building blocks, then we make that challenge surmountable and meet one of the greatest challenges today–functionality by design.”

Samsung Electronics announced today that it has begun mass producing the industry’s first 8 gigabit (Gb) GDDR5 DRAM, based on the company’s leading-edge 20-nanometer (nm) process technology. GDDR5 is the most widely used discrete graphics memory in the world.

Designed for use in graphics cards for PCs and supercomputing applications, and on-board graphics memory for game consoles and notebook PCs, discrete graphics DRAM provides an extensive amount of bandwidth to process large high quality graphically-oriented data streams. With the rising popularity of 3-D games and UHD video content soon to be widespread, the need for high-performance, high-bandwidth graphics memory has begun to rapidly increase.

“We expect that our 8Gb GDDR5 will provide original equipment manufacturers (OEMs) with the best graphics memory solution available for game consoles as well as general use notebook PCs,” said Joo Sun Choi, Executive Vice president of Memory Sales and Marketing at Samsung Electronics. “By expanding our production of 20nm-based DRAM products including the new GDDR5, we will meet increasing global customer demand and take the lead in accelerating the growth of the premium memory market.”

Samsung’s new GDDR5 DRAM offers outstanding bandwidth. Combining only eight of the new 8Gb chips will achieve the same density as the 8 gigabytes (GB) needed in the latest game consoles.

The memory operates with an I/O data rate of 8 gigabits per second (Gbps) per pin, which is more than four times faster than the DDR3 DRAM widely used in notebook PCs today, and each chip can process data at 32-bit I/O rate. Two GB of graphics memory can be created with just two of the new chips, which together can process up to 64GB of graphical images per second. That equates to processing approximately 12 full-HD DVDs (5GB equivalent) in a second.

With this new 20nm 8Gb GDDR5, Samsung has completed its line-up of 8Gb DRAM solutions based on its leading-edge 20nm process technology, covering the server, PC, mobile and graphics memory markets. The world’s largest memory manufacturer will keep expanding the production volumes of its 20nm DRAM products at a variety of densities including 4Gb, 6Gb, 8Gb and higher densities to solidify its leading position in high-end IT market segments as well as more value-driven markets.

Silicon Space Technology announced today the company has partnered with GLOBALFOUNDRIES to build commercial-ready products for extreme environments and applications.

Silicon Space Technology’s patented HARDSIL technology is tested and proven to operate in high-temperature environments — at 250C for more than 1,250 hours, and in high-radiation environments — with a TID performance of > 300 Krads. This is the first time any CMOS process has met these unique and extreme characteristics. This technology advancement also represents a huge milestone in extending reliability, performance and operating lifetimes, while simultaneously simplifying design complexity and reducing Size, Weight and Power (SWaP).

“We have been collaborating with GLOBALFOUNDRIES since 2012,” said Wes Morris, president and chief executive officer of SST. “The result is that Silicon Space Technology and GLOBALFOUNDRIES have a qualified CMOS process that Silicon Space Technology is already using to develop a family of ARM-based System-on-Chip (SoC) processors and memories which represent a paradigm shift for the high-temp and rad-hard markets.”

“Our partnership with Silicon Space Technology will enable us to produce a disruptive technology in the marketplace for ruggedized applications,” said Gregg Bartlett, senior vice president of the Product Management Group at GLOBALFOUNDRIES. “Now that HARDSIL is implemented and qualified in our foundry, we believe opportunities exist for it to be adopted across a wide-range of high-temp and rad-hard products and market segments.”

Silicon Space Technology is a privately held, fabless semiconductor company based in Austin, TX that provides integrated radiation-hardened (>300 Krads, latchup immune) and temperature-hardened (125C – 250C) solutions for extreme applications in the oil & gas, space, automotive, aerospace, industrial, medical and food & health industries.