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By Emmy Yi, SEMI Taiwan

Since 2010, 474 companies have poured $51 billion into developing products enabled by artificial intelligence (AI), with the bulk of these investments targeting autonomous driving and in-vehicle experiences, according to the McKinsey reports. With AI and automotive electronics promising massive growth potential, it’s no surprise that IHS Market predicts the Advance Driver Assistance Systems (ADAS) market will reach $67.43 billion by 2025 and that, by 2040, 33 million AI-enabled autonomous vehicles will be on the road worldwide.

Lured by this immense business opportunity, many key semiconductor industry players are jumping into the automotive market. Their ICs, however, will face far more stringent reliability requirements than most consumer products, making testing crucial to accelerating the realization of level 5 autonomous driving – a fully autonomous system that rivals the behind-the-wheel performance of a human driver even in extreme road conditions like snow and ice.

With testing such a vital aspect of autonomous driving, SEMI Taiwan recently connected industry experts from IC design and testing-related fields to facilitate cross-discipline collaboration and help inspire innovative solutions to current testing challenges. The early February AI IC and Automotive IC Test Seminar is part of a series of SEMI Taiwan events focused on hot topics including like AI, IoT, smart automotive, smart data and smart MedTech. Following are a few key takeaways from the seminar.

A Paradigm Shift is Needed in Automotive Electronics Testing Strategies

Designers of automotive electronics need to transform their test strategies to match the technical rigors of autonomous driving. The traditional process of build, test, and then fix-for-compliance must be changed in the era of self-driving vehicles. Adding AI to already electronically complex automotive systems will dramatically increase the number of ICs and sensors in vehicles.

The process of testing component points of failure falls well short of the requirement to test under countless driving scenarios during a which a device might fail. Testing, therefore, must be holistic. Starting in the development phase of their own electronics systems, automotive electronics designers must work closely with component and other technology suppliers to ensure that designs are well-integrated and rigorously tested for interoperability and points of failure under any conditions a human driver would face.

Wafer-level Test is A Trend

The cost and time for IC testing have steadily increased to meet the relentless scaling requirements of highly integrated advanced technologies, placing immense pressure on current wafer-level packaging and testing methodologies to maintain cost efficiencies, chip yields and time-to-market speed. The challenges will intensify with the multiple-component parallel testing required for autonomous vehicles. Demands on automotive electronics manufacturers to maintain DDPM quality levels key to smart functionalities, powertrain operation, safety and reliability will also complicate current IC testing methodologies.

Beyond Technology

To fulfill the promise of autonomous automobiles and other AI applications, industry, academia, and government in Taiwan must work together to solve underlying technical challenges, create profitable business models and develop a strong programming and system integration workforce. Taiwan has a solid foundation to build on. With its strong semiconductor manufacturing industry and advanced IC testing capabilities, Taiwan is well-positioned as a growth engine for the advanced automotive electronics needed for autonomous vehicles.

 

 

By Emmy Yi, SEMI Taiwan

 

Since Apple unveiled iPhone X with face-recognition functionality in early November 2017, interest in 3D sensing technology has reached fever pitch and attracted huge investments across the related supply chains. The global market for 3D depth sensing is estimated at US$1.5 billion in 2017 and will grow at a CAGR of 209 percent to US$14 billion in 2020, Trendforce estimates. This trend pushes up demand for Vertical Cavity Surface Emitting Laser (VCSEL), a key component for 3D depth sensing technology. SEMI estimates that the global VCSEL market will grow at a CAGR of 17.3 percent between 2016 and 2022, and the total value of the market is expected to reach US$1 billion by 2022.

This SEMI 3D Depth Sensing & VCSEL Technology Seminar attracted more than 600 industry experts.

This SEMI 3D Depth Sensing & VCSEL Technology Seminar attracted more than 600 industry experts.

In light of the significant market growth potential and business opportunities, SEMI Taiwan recently organized the 3D Depth Sensing & VCSEL Technology Seminar, where industry experts from Qualcomm, Lumentum, Himax, Vertilite and IQE gathered to explore the technology trends and potentials from different perspectives. Following are the key takeaways from the Forum:

Not just iPhoneX! Expect a boom in 3D depth sensing

The real-time and depth cue feature of the 3D sensor is essential to enable the next-generation computer vision (CV) applications. Improvements in 3D recognition, machine learning, and 3D image segmentation promise to stoke significant growth across a wide range of applications including long-range automotive LiDAR, short-distance AR/VR devices, facial recognition in the low-light environment inside a car and more.

SEMI_Member_Forum_2_450px

Improvements in component R&D, algorithm writing, and supply chain integration will further expand the 3D sensing market.

Why VCSELs?

Structured light and time of flight (TOF) are currently the two key approaches to 3D sensing, and VCSEL is the core light source for both technologies. VCSEL’s advantages of small footprint, low cost, low power consumption, circular beam shape, optical efficiency, wavelength stability over temperature and high modulating rate are all indispensable for 3D sensing to flourish. In the longer term, improvements in component R&D, algorithm writing, and supply chain integration will further expand the 3D sensing market.

Optimistic about the proliferation of 3D sensing applications, The SEMI Taiwan Power and Compound Semiconductor Committee plans to organize a special interest group to better respond to technology evolution and rising applications of the emerging optoelectronic semiconductor and to drive innovations and development of the industry. SEMICON Taiwan 2018 will also include a theme pavilion and a series of events to enable more communications and collaborations. To learn more, please contact Emmy Yi, SEMI Taiwan, at [email protected] or +886.3.560.1777 #205.

MagnaChip Semiconductor Corporation (NYSE: MX), a designer and manufacturer of analog and mixed-signal semiconductor platform solutions, announced today it now offers the 2nd generation of 0.13 micron BCD process technology integrated with high-density embedded Flash memory. This second-generation BCD process offers advanced features compared to previous BCD processes, which are high-density Flash memory up to 64 kilo bytes, low specific Ron of power LDMOS up to 40V, low number of photo steps and automotive grade reliability. These characteristics make the new generation of BCD process technology highly suitable for programmable PMICs, wireless power chargers, USB-C power-delivery IC products and automotive power ICs.

Traditionally, the non-volatile memories in the BCD process are low in density, below 256 bytes, for trimming purposes. However, today’s electronic devices require more complex functions and lower power consumption. As a result, there is a greater market need for high-density embedded non-volatile memory in the BCD process. This memory includes Flash memory used for power ICs, including programmable PMICs, wireless power chargers and USB-C power-delivery ICs. In some applications, high-density Flash memory up to 64 kilo bytes is used to store programming codes as well as trimming data. Until now, the drawback of implementing high-density embedded memory in other BCD processes has been that it increases the overall number of manufacturing steps.

MagnaChip was able to eliminate 8 photo steps in the second-generation BCD process from the 1st generation by process optimization. Aside from embedded non-volatile memory, the 2nd generation also achieved the improvement of power LDMOS specific Ron performance, which is well suited for high-power requirements up to 40V operation. For IoT and automotive applications, this BCD process provides 1.5V and 5V CMOS devices with very low leakage current level that enables low power consumption. Furthermore, this new BCD process has various option devices for Hall sensors, varactors, inductors, and RF CMOS devices that are useful for highly integrated IC solutions, which give smaller system size and less system cost.

YJ Kim, Chief Executive Officer of MagnaChip, commented, “The integration of analog-based BCD and high density non-volatile memory enables highly suitable ICs and system designs for power management solutions, wireless chargers and power ICs used in smartphones, IoT devices and automotive applications.” Mr. Kim added, “Our goal is to continue to develop specialized and innovative process technologies that meet the changing market requirements of our foundry customers.”

Imec has designed and fabricated a 16,384-electrode, 1,024-channel micro-electrode array (MEA) for high-throughput multi-modal cell interfacing. The chip offers intracellular and extracellular recording, voltage- and current-controlled stimulation, impedance monitoring and spectroscopy functionalities thereby packing the most cell-interfacing modalities on a single chip, and being the only one to enable multi-well assays. With this new chip, imec has created a platform that enables high quality data acquisition at increased throughput in cell-based cell studies. Imec’s micro-electrode array chip will be presented at ISSCC in San Francisco, Feb. 11-15.

These results will be presented at ISSCC2018 on Feb 14, 2018 in session 29: Advanced Biomedical Systems at 2.30 pm: 29.3 – A 16384-Electrode 1024-Channel Multimodal CMOS MEA for High-Throughput Intracellular Action Potential Measurements and Impedance Spectroscopy in Drug-Screening Applications, C. Mora Lopez et al. (imec).

These results will be presented at ISSCC2018 on Feb 14, 2018 in session 29: Advanced Biomedical Systems at 2.30 pm: 29.3 – A 16384-Electrode 1024-Channel Multimodal CMOS MEA for High-Throughput Intracellular Action Potential Measurements and Impedance Spectroscopy in Drug-Screening Applications, C. Mora Lopez et al. (imec).

MEAs have since long been used for in vitro cell-interaction experiments. However, most of today’s MEAs do not support high throughput measurements, making current cell-assays time-consuming. They are typically passive devices, without built-in circuitry, therefore requiring complex external equipment for data acquisition. Additionally, most MEAs are not able to accommodate the extra sensing modalities to fully characterize complex cell behavior and interactions.

Imec’s high-throughput multi-modal CMOS-MEA packs 16,384 active electrodes with signal processing, filtering and analog-to-digital conversion on-chip, resulting in a very complete and compact system with easy interfacing. To improve the signal quality, each electrode has a miniature pre-amplifier. The electrodes are grouped in 16 clusters, each of which can be addressed individually, making it possible to run 16 experiments independently and simultaneously. This CMOS-MEA also includes 1,024 low-noise readout channels that can be connected to any of the 16,384 electrodes. The custom reconfigurable on-chip circuits support 6 cell-interfacing modalities: both extra- and intracellular electrical activity recording, constant voltage and constant current stimulation for cell excitation or localized electroporation, fast impedance monitoring and, finally, impedance spectroscopy. While fast impedance monitoring can detect impedance changes over time and cell presence for optimal electrode selection, single-cell impedance spectroscopy gives detailed information of the electrode impedance, seal resistance and cell-membrane impedance which can be used for cell differentiation. Imec’s high input impedance, low noise and low power reconfigurable circuits make it possible to integrate 1,024 parallel readout channels and 64 reconfigurable stimulation units on a small chip area.

“Not only are we reporting the highest number of modalities so far on a single chip with a very high channel count, we are able to achieve this without any performance penalty. Moreover, by offering six modalities on such large scale, the imec CMOS-MEA will greatly improve the throughput and versatility of cell-based assays,” commented Nick Van Helleputte, manager biomedical circuits at imec. “With the introduction of CMOS chip technology into the MEA-technology, we have realized a breakthrough in cell interfacing.”

Samsung Electronics Co., Ltd. today announced that it has begun mass production of a 256-gigabyte (GB) embedded Universal Flash Storage (eUFS) solution with advanced features based on automotive specifications from the JEDEC UFS 3.0 standard, for the first time in the industry.

Following the memory breakthrough of the automotive industry’s first 128GB eUFS in September, 2017, Samsung’s automotive 256GB eUFS is now being shipped to automotive manufacturers preparing the market for Advanced Driver Assistance Systems (ADAS), next-generation infotainment systems and new-age dashboards in luxury vehicles.

As thermal management is crucial for automotive memory applications, Samsung’s 256GB eUFS extends the temperature range to between -40°C and 105°C for both operational and power-saving modes. Warranties for conventional embedded multimedia card (eMMC) 5.1 solutions generally cover -25°C to 85°C for vehicles in operation and -40°C to 85°C when in idle or power-saving mode.

“With the new temperature threshold for automobile warranties, major automotive manufacturers can now design-in memory that’s even well suited for extreme environments and know they will be getting highly reliable performance,” said Kyoung Hwan Han, vice president of NAND marketing at Samsung Electronics. “Starting with high-end vehicles, we expect to expand our business portfolio across the entire automotive market, while accelerating growth in the premium memory segment.”

Samsung’s 256GB eUFS not only can easily endure the new temperature specification, despite the heat-sensitive nature of memory storage, but also through its temperature notification feature, a sensor will notify the host application processor (AP) when the device temperature exceeds 105°C or any pre-set level. The AP would then regulate its clock speed to lower the temperature to an acceptable level.

Sequential reads for the 256GB eUFS can reach 850 megabytes per second (MB/s), which is at the high end of the current JEDEC UFS 2.1 standard, and random read operations come in at 45,000 IOPS. In addition, a data refresh feature speeds up processing and enables greater system reliability by relocating older data to other less-used cells.

The temperature notification, developed by Samsung, and data refresh features are included in UFS specification, version 3.0, which was announced last month by JEDEC, a global semiconductor standards organization.

Samsung plans to bolster its technology partnerships with global automakers and component providers, and continue expanding its eUFS line-up with an aim to lead the premium memory market.

Texas Instruments (TI) (NASDAQ: TXN) today introduced the industry’s smallest operational amplifier (op amp) and low-power comparators at 0.64 mm2. As the first amplifiers in the compact X2SON package, the TLV9061 op amp and TLV7011 family of comparators enable engineers to reduce their system size and cost, while maintaining high performance in a variety of Internet of Things (IoT), personal electronics and industrial applications, including mobile phones, wearables, optical modules, motor drives, smart grid and battery-powered systems.

With a high gain bandwidth (GBW) of 10 MHz, fast slew rate at 6.5 V/µs and low-noise spectral density of 10 nV/√Hz, the TLV9061 op amp is designed for use in wide-bandwidth, high-performance systems. The TLV7011 family of nanopower comparators delivers a faster response time with propagation delays down to 260 ns, while consuming 50 percent less power than competitive comparators. Additionally, both devices support rail-to-rail inputs with low-voltage operation down to 1.8 V, enabling ease-of-use in battery-powered applications.

Achieve high performance in tiny spaces with the TLV9061 operational amplifier

  • Reduces system size and cost: In addition to its tiny size, the TLV9061 op amp also features integrated EMI filtering inputs. This helps provide resilient performance for systems prone to RF noise, while significantly reducing the need for external discrete circuitry.
  • Greater DC accuracy: Two times lower offset drift and typical input bias across a full temperature range, -40 to 125 degrees Celsius, creates a more precise signal chain solution compared to other small devices.

Lower power, faster response with the tiny TLV7011 family of comparators

  • Smaller footprint, extra features: No phase reversal and integrated internal hysteresis for overdriven inputs increase design flexibility and reduce the need for external components.
  • Fifty percent less power consumption: With power as low as 335 nA and fast propagation delay down to 260 ns, the TLV7011 family of nanopower comparators enable low-power systems to monitor signals and respond quickly.

These new devices join TI’s small-size amplifier portfolio which enables engineers to design smaller systems, while maintaining high performance, with industry-leading package options and many of the world’s smallest op amps and comparators.

Tools and support to speed design
Designers can download the TINA-TI™ SPICE model to simulate their designs and predict circuit behavior when using the TLV9061 op amp and TLV7011 family of comparators. Engineers can jump-start their small brushed DC servo drive designs using the TLV9061 op amp with the 10.8-V/15-W, >90% Efficiency, 2.4-cm2, Power Stage Reference Design. Also, they can quickly and easily evaluate the TLV7011 comparators with the DIP adapter evaluation module, available today for US$5.00 from the TI store and authorized distributors.

Package, availability and pricing
Preproduction samples of the TLV9061 op amp and volume quantities of the TLV7011 family of comparators are now available through the TI store and authorized distributors in a 5-pin extra small outline no-lead (X2SON) package, measuring 0.8 mm x 0.8 mm x 0.4 mm. Pricing starts at US$0.19 and US$0.25 in 1,000-unit quantities, respectively. Learn more about the family of comparators in the table below.

Product

Supply
voltage (Vcc)

DC input
offset (Vios)

Propagation
delay (tpd)

Supply
current (Icc)

TLV7011

1.6 – 5.5 V

0.5 mV

260 ns

5 µA

TLV7021

1.6 – 5.5 V

0.5 mV

260 ns

5 µA

TLV7031

1.6 – 6.5 V

0.1 mV

3 µs

335 nA

TLV7041

1.6 – 6.5 V

0.1 mV

3 µs

335 nA

SK Hynix Inc. (or ‘the Company’, www.skhynix.com) today announced that the company recently completed developing an enterprise SATA Solid State Drive (or ‘eSSD’). With its 72-Layer 512Gb (Gigabits) 3D NAND Flash chips, the company is paving the way for its full-fledged entrance to the high value-added eSSD market.

SK Hynix combined the 72-Layer 512Gb 3D NAND Flash with its in-house firmware and controller to provide the maximum density of 4TB (Terabytes). SK Hynix makes the most of its 72-Layer 512Gb 3D NAND chips to double the biggest density of the SSD of the same size with 256Gb NAND chips.

A single 4TB SSD could contain 200 UHD (Ultra-HD) movies, each of which is generally as large as approximately 20GB (Gigabytes). The new eSSD supports sequential read and write speed of up to 560MB/s (Megabytes per second) and 515MB/s, respectively, and it can perform 98,000 random read IOPS (Input/Output operations per second) and 32,000 random write IOPS. SK Hynix also improved the read latency, which is of the utmost importance in eSSD performance. The Company is sampling the product to server and data center clients in the United States.

The company also finished developing enterprise PCIe (PCI Express) SSD and is shipping samples to server and data center clients. The PCIe SSD will also use the 72-Layer 3D NAND and have a capacity of more than 1TB. The 1TB PCIe SSD operates at 2,700MB/s and 1,100MB/s of sequential read/write speed and runs random read/write performance of 230,000 IOPS and 35,000 IOPS.

“SK Hynix started mass-producing client SSD with its 3D NAND chips and in-house firmware and controller last year. Now we have expanded our SSD business portfolio with the development of eSSD,” said Jin Kang, the Head of NAND Planning and Enabling. “The company plans to actively meet growing eSSD market demands to contribute to enhancing its profitability in NAND Flash business” he added.

According to IHS Markit, the SSD market revenue is expected to total USD 25.1 billion in 2017 and post a continuous annual growth of 5.6% to total USD 31.2 billion in 2021. Revenue of the enterprise SSD will lead the market growth by rising from USD 13.4 billion to USD 17.6 billion at a CAGR of 7% during the same period.

Nordson MARCH, a Nordson company (NASDAQ:NDSN), a developer of plasma processing technology, introduces the MesoSPHERE Plasma System for very-high throughput processing of 3D and wafer-level packaging processes such as fan-in, fan-out, wafer-level, and panel-level – handling wafers up to 450mm and panels up to 480mm. The MesoSPHERE’s new, patented W3 three-axis symmetrical plasma chamber ensures that all areas of the wafer are treated equally and uniformly. Tight control over all process parameters gives highly repeatable results.

For wafer cleaning, the MesoSPHERE plasma system removes contamination prior to wafer bumping, organic contamination, fluorine and other halogen contamination, and metal and metal oxides. Plasma improves spun-on film adhesion and cleans metallic bond pads.

For wafer etching, the MesoSPHERE plasma system descums wafers of residual photoresist and BCB, pattern dielectric layers for redistribution, strip/etch photoresist, enhances adhesion of wafer applied materials, removes excess wafer applied mold /epoxy, enhances adhesion of gold solder bumps, destresses wafer to reduce breakage, improves spun-on film adhesion, and cleans aluminum bond pads.

The MesoSPHERE’s chamber design and control architecture enable short plasma cycle times with very low overhead, maximizing throughput and minimizing cost of ownership. Plasma confinement technology uses a ring to isolate and focus plasma so it’s distributed directly above the wafer, minimizing undesired secondary reactions. Process temperatures can be kept low because the ring increases etch rate capability without increasing the electrode temperature or adding bias to the chuck.

An innovative handling system transfers round or square substrates and frame or bonded carriers. The modular design allows capacity increase on a per plasma chamber basis. Equipment front end module (EFEM) integration supports from 1 to 4 plasma chambers. A pocket chuck design provides accurate substrate placement and centering, for additional process repeatability.

“A unique feature of the MesoSPHERE is the way we developed the isolation,” explained Jonathan Doan, director of marketing for Nordson MARCH. “It allows our customers a method to perform advanced packaging without having to use an expensive carrier and it can be used with 300mm wafers on frames.”

Alpha and Omega Semiconductor Limited (AOS) (Nasdaq:AOSL), a designer, developer and global supplier of a broad range of power semiconductors and power ICs, today introduced AONE36132, a 25V N-Channel MOSFET in a dual DFN 3.3×3.3 package which is ideal for synchronous buck converters. The AONE36132 is an extension to the XSPairFET™ lineup.  Designed with the latest bottom source packaging technology, the AONE36132 has lower switch node ringing due to lower parasitic inductance. This new XSPairFET™ offers a higher power density compared to existing solutions and is ideally suited for computing, server and telecommunication markets.

AONE36132 has an integrated high-side and low-side MOSFETs (7mOhms and 2mOhms maximum on-resistance, respectively) within a DFN 3.3×3.3 XSPairFET™ package.  The low-side MOSFET source is connected directly to the exposed pad on PCB to enhance thermal dissipation.  Using an existing notebook design under typical conditions, 19V input Voltage, with 1.05V output Voltage, and a 21A output load condition, the AONE36132 had more than a two percent efficiency improvement when compared to a single DFN 5×6 high side and single DFN 5×6 low side configuration.

“The AONE36132 is the latest addition to the XSPairFET™ family which incorporates innovative technology to increase power density and improve efficiency for today’s demanding applications,” said Peter H. Wilson, Marketing Director of MOSFET product line at AOS.

Technical Highlights

The new product family offers various RDS(ON) levels in combination with multiple package options.

Part
Number		 Package VIN
(V)		 VGS
(±V)		 RDS(ON) (mΩ max)
at VGS =		 VGS (±V)
(max V)		 Ciss
(pF)		 Coss
(pF)		 Crss
(pF)		 Qg
(nC)		 Qgd
(nC)
10V 4.5V
AONE36132 DFN 3.3×3.3 High Side (Q1) 25 12 4.6 6 1.8 880 250 55 6.5 2.5
Low Side (Q2) 25 12 1.8 1.7 1.9 3125 860 200 25 6

Pricing and Availability

The AONE36132 is immediately available in production quantities with a lead-time of 12-14 weeks. The unit price for 1,000 pieces is $0.91.

 

GLOBALFOUNDRIES today announced that its 45nm RF SOI (45RFSOI) technology platform has been qualified and is ready for volume production. Several customers are currently engaged for this advanced RF SOI process, which is targeted for 5G millimeter-wave (mmWave) front-end module (FEM) applications, including smartphones and next-generation mmWave beamforming systems in future base stations.

As next-generation systems move to frequencies above 24GHz, higher performance RF silicon solutions are required to exploit the large available bandwidth in the mmWave spectrum. GF’s 45RFSOI platform is optimized for beam forming FEMs, with features that improve RF performance through combining high-frequency transistors, high-resistivity silicon-on-insulator (SOI) substrates and ultra-thick copper wiring. Moreover, the SOI technology enables easy integration of power amplifiers, switches, LNAs, phase shifters, up/down converters and VCO/PLLs that lowers cost, size and power compared to competing technologies targeting tomorrow’s multi-gigabit-per-second communication systems, including internet broadband satellite, smartphones and 5G infrastructure.

“GF’s leadership in RF SOI solutions makes the company a perfect strategic partner for Peregrine’s next generation of RF SOI technologies,” said Jim Cable, Chairman and CTO of Peregrine Semiconductor. “It enables us to create RF solutions that provide our customers with new levels of product performance, reliability and scalability, and it allows us to push the envelope of integrated RF front-end innovation for evolving mmWave applications and emerging 5G markets.”

“To bring 5G into the future, mmWave innovations are needed for allocating more bandwidth to deliver faster, higher-quality video, and multimedia content and services,” Bob Donahue, CEO of Anokiwave. “GF’s RF SOI technology leadership and 45RFSOI platform enables Anokiwave to develop differentiated solutions designed to operate between the mmWave and sub-6GHz frequency band for high-speed wireless communications and networks.”

“GF continues to expand its RF capabilities and portfolio to provide competitive RF SOI advantages and manufacturing excellence that will enable our customers to play a critical role in bringing 5G devices and networks to real-world environments,” said Bami Bastani, senior vice president of the RF Business Unit at GF.  “Our 45RFSOI is an ideal technology for customers that are looking to deliver the highest- performing mmWave solutions that will handle demanding performance requirements in next-generation mobile and 5G communications.”

GF’s RF SOI solutions are part of the company’s vision to develop and deliver the next wave of 5G technology aimed at enabling connected intelligence for next-generation devices, networks and wired/wireless systems. GF has a successful track record in manufacturing RF SOI solutions at its 300mm production line in East Fishkill, N.Y.  Customers can now start optimizing their chip designs to develop differentiated solutions for high performance in the RF front end for 5G and mmWave applications.