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Strong growth in MCUs for IoT applications and suppliers jockeying for marketshare in this IC segment have resulted in several major acquisitions that changed the pecking order of MCU leaders in 2016, according to data released in IC Insights’ April Update to The McClean Report, which was released earlier this month. Figure 1 ranks the largest MCU suppliers in 2016 by dollar-sales volume.  Among the top MCU suppliers shown, NXP, Microchip, and Cypress Semiconductor moved up in the sales ranking during 2016 with strong increases in revenues, which were driven by acquisitions of IC companies that sold microcontrollers. Meanwhile, those suppliers not making significant acquisitions in microcontrollers posted low-single digit percentage increases or declines in MCU sales in 2016.

Figure 1

Figure 1

Although overall growth in microcontrollers has wobbled and stalled in the past couple years, MCUs remain at the epicenter of tremendous growth in the Internet of Things, automotive, robotics, embedded applications and other emerging systems.   Major MCU suppliers have been improving their portfolios to address many of these key markets.  Part of that improvement process has included merging and acquiring competitors in order to gain a quick foothold into these developing markets.

In 2016, NXP in the Netherlands overtook Renesas Electronics in Japan as the world’s largest microcontroller supplier with MCU revenues climbing 116% following its $11.6 billion purchase of U.S.-based Freescale Semiconductor in December 2015.  Prior to its acquisition, Freescale was ranked second in MCUs and was catching up with Renesas in microcontroller sales with only $210 million separating the two companies in 2015 versus about a $1 billion gap in 2014.  Renesas suffered a 19% drop in MCU dollar sales in 2015 (largely due to the weak yen exchange rate in that year but also because of the continued fallout from Japan’s troubled economy).  In 2016, Renesas’ fall in MCU sales eased, dropping 4% to nearly $2.5 billion, or about 16% of the total microcontroller market.  In 2011, Renesas’ MCU marketshare was 33% of worldwide microcontroller sales.

The Freescale acquisition moved NXP from sixth in the 2015 MCU ranking to the top spot in 2016 with a marketshare of 19% ($2.9 billion).  About three-quarters of NXP’s 2015 microcontroller sales were 8-bit and 16-bit MCUs used in smartcards.  After Freescale’s business was merged into NXP, smartcard MCUs accounted for a little over one-quarter of the company’s total microcontroller sales in 2016. MCUs developed and introduced by Freescale are aimed at a wide range of embedded control applications, including significant amounts in automotive systems.  NXP and Freescale both have developed extensive 32-bit MCUs with Cortex-M CPU design cores licensed from ARM in the U.K.

U.S.-based Microchip Technology climbed from fifth in the 2015 MCU ranking to third in 2016 with sales increasing 50% to $2.0 billion following its $3.4 billion acquisition of Atmel in 2Q16.  U.S.-based Atmel was ranked ninth in MCU sales in 2015 ($808 million).  Prior to buying Atmel, Microchip had been the only major MCU supplier not licensing ARM CPU technology.  For about 10-years, Microchip has developed and sold 32-bit MCUs, based on a RISC-processor architecture developed by MIPS Technologies (which is now owned by Imagination Technology in the U.K.,  a rival of ARM).  Six months after completing the Atmel acquisition, Microchip said it would expand both its MIPS-based PIC32 MCU product line and Atmel’s ARM-based SAM series.  Microchip has promised to “remain core agnostic, fitting the best solution with the right customer and for the right application.”

Meanwhile, Cypress in Silicon Valley moved into eighth place in the MCU ranking with sales increasing 15% in 2016 to about $622 million.  Cypress boosted its presence in MCUs when it acquired Spansion for about $5.0 billion in stock in March 2015.  Originally spun out of Advanced Micro Devices as a NOR flash memory supplier, Spansion had purchased Fujitsu Semiconductor’s Microcontroller and Analog Business in 2013 for $110 million as part of its efforts to expand beyond nonvolatile storage ICs. Spansion also licensed ARM’s 32-bit CPU cores for microcontrollers in 2013.  Cypress’ increase in microcontroller sales was partly a result of having a full year of revenue from Spansion’s MCU business but also growth in the company’s programmable system-on-chip (PSoC) products, which combine microcontroller functionality with user-configurable peripherals of mixed-signal and digital functions that are targeted at end-use applications.

The biggest decline in the MCU leader list was posted by Samsung, which saw its sales drop 14% in 2016, primarily because of weakness in the smartcard microcontroller market.  Samsung sells MCUs to OEMs but also serves in-house needs for its own brands of consumer electronics, computers, and communications systems (i.e., smartphones).

With its unique characteristics, FD-SOI is generating increasingly strong interest from major players in the semiconductor ecosystem for a very wide range of markets.

BY MANUEL SELLIER, Soitec, Bernin (Grenoble), France

Fully depleted silicon-on-insulator or FD-SOI is the only technology bringing together two substantial characteristics of CMOS transistors: 2D planar transistor structure and fully depleted operation. It relies on a unique substrate whose layer thicknesses are controlled at the atomic scale. FD-SOI offers remarkable transistor performance with one of the best power, performance, area and cost tradeoffs (PPAC) among all advanced CMOS technologies. In addition, FD-SOI has numerous other unique advantages including back bias ability, very good transistor matching, near threshold supply capability, ultra-low sensitivity to radiation and very high intrinsic transistor speed, which allows it to handle mmWave frequencies.

All these key features are progressively making FD-SOI a de facto technology for many applications including entry-level application processors for smartphones, system-on- chip (SoC) devices for autonomous driving and IoT, and all mmWave applications such as 5G transceivers and radar systems for automotive electronics.

FD-SOI technology is supported by multiple foundries and IDMs with full technology offerings now available for the 28nm and 22nm nodes and emerging for the 65nm and 12nm nodes. With this global ecosystem in place, FD-SOI is ready for applications development for diversified markets.
There are several striking characteristics of FD-SOI substrates that give this technology unique advantages. This article summarizes the latest advances and the various elements of the global ecosystem that supportwidespread implementation of FD-SOI as well as the applications that most benefit from it.

The heart of FD-SOI

Everything in FD-SOI technology starts with the substrate. The substrate directly defines the transistor architecture, as shown in FIGURE 1. To allow the fully depleted operation of transistors, the thickness of the top silicon layer defining the device channel represents a real challenge, with the thickness target typically around 60 Å or 11 atomic layers. Given the consumption of silicon material during device fabrication, a 120 Å incoming top silicon specification is usually required by foundries. Uniformity is another very challenging specification needed to keep transistor variability as low as possible. Uniformity of +/-5 Å or 1 atomic layer is typically considered essential. Buried oxide (BOx) thickness also must be very thin – around 20nm – to maximize electrostatic control in the transistor channel due to the ground plane effect.

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Manufacturing a 300mm piece of crystalline silicon with a thickness specification as low as 11 +/-1 atomic layers is understandably difficult. Ten years ago, it sounded unachievable so people studied other paths to enable fully depleted transistors [1]. But it is now possible.

Fabrication relies on the well-known Smart Cut TM process (FIGURE 2). As shown, wafer A first undergoes an oxidation step followed by high-dose ion implantation, creating a weakened layer just beneath the surface. After careful cleaning steps, wafer A is bonded to wafer B through molecular-bonding technology. Splitting is then induced at the precise location of the weakened zone of wafer A. Finally, the formed SOI wafer is subjected to other smoothing process steps to achieve the targeted thickness specification. It is noteworthy that high-quality wafer A can be recycled for further reuse, making Smart Cut the most cost- effective solution for SOI manufacturing.

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The FD-SOI substrate-manufacturing process is now fully mature. In particular, thickness uniformity is very well controlled at all levels, from transistor to wafer, as shown in FIGURE 3. This ensures a very low level of transistor variability.

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When less is more

The way of getting more performance out of silicon below 28nm node adds more complexity to the manufacturing process. Consequently, as illustrated in FIGURE 4, the smaller nodes get, the greater number of masks are needed to create chips. This increases manufacturing costs as well as other non-recurring engineering costs including design flow, design verification, mask sets and more.

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On the other hand, FD-SOI is a simple technology from a manufacturing standpoint. In fact, it offers more perfor- mance while decreasing the manufacturing process complexity. Most of the channel engineering work is actually done directly at the substrate level, making FD-SOI easier to implement than bulk silicon, as major foundries have reported [2] [3].

The next level of transistor performance

In addition to simpler manufacturing, FD-SOI offers other substantial benefits, as depicted below and summarized in FIGURE 5.

Screen Shot 2017-04-27 at 12.01.46 PM Screen Shot 2017-04-27 at 12.01.53 PM

1. Better design flexibility through body bias

The thin BOx of FD-SOI not only enhances electro- static control of the channel, but also makes it possible to completely tune the threshold voltage through back biasing. All the complex Vth adjustment techniques through channel doping can be avoided. Low, mid-range and high Vth can be achieved simply through back-gate polarization. The thin BOx behaves like a real second gate and, most importantly, it can be used dynami- cally. This means that the same functional block can operate under high or low power, on demand. Back bias potential is huge: selective body bias for critical path improvements [4], process variation compensation [5] and reliability drift compensation [6]. Full back biasing is a very unique feature, only achievable with SOI on thin BOx technology.

2. Power-performance-area-cost tradeoff: Best PPAC of all planar technologies.

Thanks to simpler manufacturing, better control of random mismatch, minimizing of junction leakage and capacitances, enhanced electrostatic control through fully depleted transistor operation and the possibility of tuning body bias, FD-SOI technology presents the best power- performance-area-cost tradeoff (PPAC) among all planar technologies.

3. Ultra-low power through near-threshold supply voltage

Almost all CMOS technologies achieve their best energy efficiency – i.e., the lowest amount of energy per function, regardless of the frequency – at around 0.4 V supply voltage, often referred to as Vdd [7]. At this level of supply voltage, variability management is a real challenge. Thanks to body bias and to its intrinsic low-variability characteristics, FD-SOI can achieve very low supply voltages. More generally, the ability to lower the supply voltage, although not necessarily as low as 0.4 V, is a real challenge in many applications in which power is a greater challenge than performance. Given the fact that dynamic power scales with Vdd2, a technology like FD-SOI that is capable of strong power savings through tremendous supply voltage reduction presents a unique advantage.

4. Best RF-CMOS technology with almost 2 times maximum frequency over 3D devices

Integrating as many analog/RF functions as possible into a single RF-CMOS silicon platform is becoming an increasingly important issue in many markets for obvious cost and power reasons. However, one limitation of RF-CMOS platforms is the limited ability to increase frequency, especially in the mmWave spectrum (30 GHz and above). This is a bigger issue with 3D devices such as FinFETs, which must carry very strong parasitic capaci- tances due to their 3D structures [8]. As a result, SiGe- Bipolar platforms are often used for this frequency range. FD-SOI is a planar technology and, as such, it should not suffer from the limitations of 3D devices. Ft/Fmax in the range of 325-350 GHz have been reported [3], allowing full usage of the mmWave spectrum up to 100 GHz and giving FD-SOI RF-CMOS platforms a bright future in many applications.

5. Enhanced reliability

Low sensitivity to high-energy particles is another key characteristic of FD-SOI. High-energy particles can interact with silicon and generate a significant amount of charges capable of flipping transistor logic state, thus increasing the soft errors rate (SER). FD-SOI devices are completely isolated from the substrate due to the BOx layer. This means that any charge generated in the substrate is unlikely to modify the device logic state. In short, FD-SOI is much less sensitive to SER [9]. This has very important consequences for safety-critical devices such as autonomous car systems.

6. Outstanding analog transistor characteristics

Often, analog designers have to make their designs work with more and more degraded transistors as technology shrinks. Meeting speed, noise, power, leakage and variability requirements is increas- ingly challenging. By providing a transistor with improved matching, gain and parasitic, FD-SOI can greatly simplify device design [10]. Moreover, the back bias has potential for the design of many new analog structures [11].

FD-SOI’s growing use at foundries

Some of the most pioneering work with FD-SOI has been done at semiconductor foundries around the world.

STMicroelectronics adopted FD-SOI technology in 2012 [12] and started several projects. The company demonstrated an ARM-based application processor for smart-phones with 3 GHz+ operating frequency on 28nm FD-SOI [13]. The technology is now used at STMicroelectronics for many diversified markets [14] [15].

In 2014, Samsung announced the adoption of 28nm FD-SOI technology for its foundry division [15]. Mass production maturity was reached in 2016 [2], and the first product release was announced recently [16] [17].

In 2015, GLOBALFOUNDRIES developed a 22nm FD-SOI technology called 22FDX [18], which it positioned as offering the best performance/cost ratio. This FD-SOI technology platform achieved performance close to 16nm/14nm FinFET at a cost similar to 28nm bulk silicon [19]. The first commercial product was announced in February 2017 by GLOBALFOUNDRIES and Dream Chip Technologies [20]. GLOBALFOUNDRIES’ technology is now almost fully qualified, with volume ramp-up expected this year.

In Asia, the Chinese foundry Huali has announced its intention to include 22nm FD-SOI technology in its fab2 plan [21], offering the Chinese market greater access to FD-SOI technology.

In Japan, Renesas’ experience with FD-SOI includes work on a very low-power FD-SOI technology called silicon- on-thin-BOx (SOTB), which targets low-power MCU markets. This technology has been supported by the LEAP initiative (Low-Power Electronics Association and Project) and is now available in 65nm. Renesas has reported very low-power consumption with this platform, as small as a tenth of that achieved using bulk silicon.

IP/CAD status and roadmap

The design ecosystem is well established for 28nm FD-SOI with complete libraries and foundation IP and growing at a fast pace for 22nm technology. EDA companies are on board and developing IP ported to FD-SOI.

In September 2016, GLOBALFOUNDRIES announced a new partner program called FDXceleratorTM to facil- itate 22FDX SoC design and reduce time to market for its customers including Synopsys, Cadence, INVECAS, VeriSilicon, CEA-Leti, Dream Chip and Encore Semi [22]. In December 2016, the foundry announced the addition of eight new partners to its growing FDXcel- erator program including Advanced Semiconductor Engineering (ASE Group), Amkor Technology, Infosys, Mentor Graphics, Rambus, Sasken, Sonics and Quick- Logic [23].

As for the technology roadmap, FD-SOI is available on a wide range of technology nodes from 65nm to 12nm with visibility down to 7nm. Building on the success of its 22FDX offering, in 2016 GLOBALFOUNDRIES unveiled a new 12nm FD-SOI semiconductor technology called 12FDX [24]. Staying with fully depleted planar processing allows the foundry to take advantage of the low parasitic capacitance, avoid the complex lithog- raphy steps required by equivalent 3D transistors, and leverage back biasing to boost transistor performance, especially at low supply voltages. Customer product tape-outs are expected to begin by the end of 2017.

Leti, which pioneered FD-SOI development 15 years ago, worked with GLOBALFOUNDRIES on the 22FDX and 12FDX platforms. The organization recently developed test devices on 10nm FD-SOI technology and produced models for 10nm and 7nm on FD-SOI. Leti strongly believes that FD-SOI can be scaled down to 7nm.

Both Samsung and GLOBALFOUNDRIES plan to have embedded non-volatile memory integrated into their FD-SOI technology platforms by 2018 [2] [3].

FD-SOI traction in power and analog/RF integration ThankstothegrowingmaturityoftheFD-SOIecosystem, there is now a wide range of applications seeing strong differentiation possibilities through FD-SOI. These include single-chip solutions for entry-level mobile communications, general purpose application processors, image signal processors, SoC for set-top boxes, embedded computer vision, microcontrollers, mixed-signal applications such as transceivers, GPS/satellite receivers, wi-fi/ BT combos and mmWave radar systems.

For all these applications, power budget is typically very limited and must be balanced with performance targets. A good example of this can be found in embedded computing applications such as ADAS, where designers must constantly find compromises to achieve the required performance with a very limited power budget, typically around 3 W. For all embedded computing applications, FD-SOI – and its ability to run on very low supply voltages – is gaining momentum as the reference technology.

In addition, RF/analog integration is often key for these applications. Having best-in-class RF-CMOS technology available on the same silicon die as the digital parts is a unique advantage of FD-SOI. It opens up possibilities for single-chip solutions covering a wide range of functions. This is particularly advantageous in entry-level markets such as low-end mobile, where the price pressure is so great that integration must be pushed to its limits, or in mmWave applications including radar and 5G transceivers, where the mmWave RF functions can be integrated on the same die as the computing functions.

A new wave of ground-breaking products

The list of FD-SOI-based products is increasing at a very fast pace, with multiple product announcements over the past months.

In September 2016, Huami (a Xiaomi partner company) introduced a new fitness smartwatch that includes a FD-SOI-based global positioning system (GPS) chip demonstrating record energy efficiency (FIGURE 6) [25]. The chip allows the watch to reach an unsurpassed battery life of 35 hours with the GPS turned on, which represents two to five times more than today’s similar devices. The chip, revealed in February 2016 at the International Solid- State Circuits Conference (ISSCC) in San Francisco [27], dramatically lowers power usage and opens the door for always-on GPS applications in smartwatches, smart-phones, drones and a large number of devices for the IoT.

Also in 2016, Mobileye posted on its website that its next EyeQ4 product family dedicated to level3 autonomous driving will be based on FD-SOI technology [26] (FIGURE 7).

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In March 2017, NXP released two general-purpose processor families (i.MX7ULP and i.M8X) [16] [17] based on Samsung’s 28FDS FD-SOI technology for ultra-low power consumption and rich graphics in battery-powered applications (see NXP roadmap FIGURE 8). NXP reported a deep-sleep suspended power consumption of 15 μW or less for its i.MX7ULP product, 17 times less in comparison to previous low-power bulk devices, while the dynamic power efficiency improved by 50 percent. This high-performance, low-power solution is optimized for customers developing IoT, home control, wearable and other applications that spend a significant amount of time in standby mode with short bursts of performance-intense activity that require exceptional graphics processing.

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In March 2017, Eutelsat Communications and STMicroelectronics announced a new-generation SoC for interactive applications that represents a step down in the overall cost of interactive satellite terminals while reducing power consumption [14].

On the 22nm side, Dream Chip announced the industry’s first 22nm FD-SOI product for a new ADAS SoC for automotive computer-vision applications [20]. The SoC device (FIGURE 9) offers high- performance image acquisition and processing capabilities and supports convolutional neural network (CNN) vision workloads to meet the demand for complex automotive object detection and processing.

Screen Shot 2017-04-27 at 12.02.27 PM

The 22nm FD-SOI product portfolio is expected to grow significantly in the coming year as the technology ramps up.

Adding fabs to meet overall FD-SOI demand

Faced with the growing interest of FD-SOI, particularly in China, foundries are organizing themselves to build up enough production capacity. In February 2017, GLOBALFOUNDRIES announced plans to expand the capacity of its Fab 1 facility in Dresden by 40 percent by 2020. Dresden will continue to be the center for FDX technology development [27].

In China, GLOBALFOUNDRIES and the Chengdu munici- pality have announced a partnership to build a fab. The partners plan to establish a 300mm fab to support the growth of the Chinese semiconductor market and to meet accelerating global customer demand for 22FDX [27]. The fab will begin producing mainstream process technologies in 2018 and then focus on manufacturing GLOBALFOUNDRIES’ commercially available 22FDX process technology, with volume production expected to start in 2019.

With these two announcements, GLOBALFOUNDRIES will have a future production capacity of more than 2 million FD-SOI wafers per year.

Regarding FD-SOI substrate manufacturing capacity, Soitec owns one 300mm fab in France and has another one in Singapore (currently in standby mode) with a combined global capacity of 1.5 million wafers per year (for manufacturing FD-SOI and other emerging SOI products). The company has plans to go beyond that to meet additional customer demand.

Conclusion

Growing interest in FD-SOI reflects today’s new paradigm for semiconductor technologies. Customers are demanding for more computing capability with drastically reduced power consumption, enabled by enhanced analog/RF integration. With its unique characteristics, FD-SOI is generating increasingly strong interest from major players in the semiconductor ecosystem for a very wide range of markets, especially for embedded computing applications. FD-SOI is now a mainstream technology, which device designers are leveraging for key competitive advantages.

Acknowledgements

The author would like to warmly thank the Soitec team (Christophe Maleville, Bich-Yen Nguyen, Thomas Piliszczuk, Alexandra Givert, and Camille Dufour) for their valuable contribution and constructive discussions.

References

1. H. Chenming, “FinFET-a self-aligned double-gate MOSFET scalable to 20 nm,” IEEE Transactions on Electron Devices, p. 2320–2325, December 2000.
2. Y. Jeon (SAMSUNG), “The industry’s first mass-produced FD-SOI technology for the IoT era, with single design platform benefits,” in SOI Industry Consortium workshop, Tokyo, 2016.
3. J. Schaeffer (GLOBALFOUNDRIES), “FDX Rising,” in GLOBAL- FOUNDRIES Technology Conference, San Jose, 2016.
4. W. Abbey (ARM), “Realize the potential of FD-SOI,” in SOI Industry Consortium workshop, San Jose, 2016.
5. P. Flatresse (ST), “FD-SOI ULV, Body Biasing & Demonstrators,” in LETI days FDSOICE Workshop, GRENOBLE, 2015.
6. C. Ndiaye (ST), “Performance vs. reliability adaptive body bias scheme in 28nm & 14nm UTBB FD-SOI nodes,” Microelectronics Reliability, 2016.
7. B. Zha, in VLSI symposium, 2006.
8. IMEC, chez VLSI Design, 2010.
9. P. Roche (ST), “Technology downscaling worsening radiation effects in bulk: SOI to the rescue,” in IEDM, 2013.
10. G. Cesana (ST), “Advances in Applications and Ecosystem for the FD-SOI Technology,” in LETI days FDSOICE Workshop, GRENOBLE, 2015.
11. A. Cathelin (ST), “On the usage of FBB for inverter-based Analog and RF 28nm UTBB FD-SOI circuits : example of a 450MHz Gm-C filter with IIP3> 1dBv over a 0.7-1V power supply,” in LETI Days FDSOICE Workshop, GRENOBLE, 2015.
12. STMicroelectronics Announces Its 28nm FD-SOI Technology Is Ready for Manufacturing in Its Leading-Edge Crolles Fab, ST Press Release, 2012.
13. ST-Ericsson brings PC speeds to mobile devices: First 3Ghz smartphone prototype demo at Mobile World Congress, STE Press Release, February 20, 2013.
14. EUTELSAT and STMicroelectronics announce low-cost, low-power, system-on-chip for interactive satellite terminals, EUTELSAT Press Release, March 8, 2017.
15. G. Desoli (ST), «A 2.9TOPS/W deep convolutional neural network SoC in FD-SOI 28nm for intelligent embedded systems,» chez International Solid-State Circuits Conference (ISSCC), 2017.
16. Samsung and STMicroelectronics Sign Strategic Agreement to Expand 28nm FD-SOI Technology, Samsung/STMicroelectronics Press Release, May 14, 2014.
17. NXP Taps into FD-SOI Technology to Enable the Industry’s Lowest Power General Purpose Applications Processors, NXP Press Release, March 13, 2017.
18. NXP Delivers Increased Safety, Reliability and Scalability to Industrial Applications with New i.MX 8X Processors, NXP Press Release, March 14, 2017.
19. GLOBALFOUNDRIES Launches Industry’s First 22nm FD-SOI Technology Platform, GLOBALFOUNDRIES Press Release, July 13, 2015.
20. S. Jha (GLOBALFOUNDRIES), “The Right Technology at the Right Time,” in SOI Industry Consortium workshop, Shanghai, 2015.
21. Dream Chip Technologies Presents First 22nm FD-SOI Silicon of New Automotive Driver Assistance SoC, DREAM CHIP Press Release, February 27, 2017.
22. R. Merritt, “China Defends Big Chip Bet – Inside Huali’s $5.9 billion bet on Fab 2,” EETIMES, January 12, 2017.
23. GLOBALFOUNDRIES Unveils Ecosystem Partner Program to Accelerate Innovation for Tomorrow’s Connected Systems, GLOBALFOUNDRIES Press Release, September 8, 2016.
24. GLOBALFOUNDRIES Expands Partner Program to Speed Time- to-Market of FDXTM Solutions, GLOBALFOUNDRIES Press Release, December 15, 2016. www.solid-state.com
25. GLOBALFOUNDRIES Extends FDXTM Roadmap with 12nm FD-SOI Technology, GLOBALFOUNDRIES Press Release, September 8, 2016.
26. J. Yoshida, «Sony-Inside Huami Watch: Is It Time for FD-SOI?,» October 4, 2016.
27. K. Yamamoto (SONY), “A 0.7V 1.5-to-2.3mW GNSS receiver with 2.5-to-3.8dB NF in 28nm FD-SOI,” in International Solid-State Circuits Conference (ISSCC), 2016.
28. Mobileye, “The Evolution of EyeQ,” [Online]. Available: http:// www.mobileye.com/our-technology/evolution-eyeq-chip/. [Accessed 29 March 2017].
29. GLOBALFOUNDRIES Expands to Meet Worldwide Customer Demand, GLOBALFOUNDRIES Press Release, February 9, 2017.

According to the latest market study released by Technavio, the electrostatic discharge (ESD) packaging market is projected to grow to USD 5.42 billion by 2021, at a CAGR of more than 8% over the forecast period.

Global_ESD_Packaging_Market

This research report titled ‘ESD Packaging Market 2017-2021’ provides an in-depth analysis of the market in terms of revenue and emerging market trends. This market research report also includes up to date analysis and forecasts for various market segments and all geographical regions.

Communication network infrastructure

“The communication network infrastructure end-user segment occupies a significant 26% of the global ESD packaging market. The high rate of deployment of next-generation wireless networks such as Wi-Fi, WiMAX, 3G/4G, and ultra-wideband is responsible for the dominance of the market segment,” says Sharan Raj, a lead analyst at Technavio for packaging research.

The growth in the wireless network infrastructure market drives the demand for printed circuit boards (PCBs), which require ESD protection. Also, the increase in virtualization and cloud computing have resulted in increased Internet traffic worldwide, which is also indirectly boosting the market growth.

Consumer electronics industry

The consumer electronics segment includes smartphones, PCs, audio systems, video systems, and TVs, all of which incorporate sophisticated and high-performance printed circuit boards (PCBs) and semiconductors for efficient working. These electronic devices, combined with the rapid adoption of 3G and 4G networks, are driving the growth of ESD packaging in the market segment. Currently, APAC is showcasing an impressive growth curve in the market segment, driven by an extremely high mobile phone subscription rate.

Computer peripherals

“The computer peripherals segment is expected to reach a value of around USD 1,141 million by 2021. This segment includes products such as a mouse, keyboards, printers, hard drives, flash drives, scanners, webcams, and digital cameras which require ESD protection,” says Sharan.

This end-user segment is expected to be driven by the increased demand for tablets, notebooks, ultrabooks, and digital cameras. Further, the introduction of Windows 10 and lightweight ultrabooks will add a boost to the growth of the market segment.

The top vendors highlighted by Technavio’s research analysts in this report are:

  • BASF
  • Desco Industries
  • Dow Chemical
  • PPG Industries

Technavio is a global technology research and advisory company.

Worldwide semiconductor revenue is forecast to total $386 billion in 2017, an increase of 12.3 percent from 2016, according to Gartner, Inc. Favorable market conditions that gained momentum in the second half of 2016, particularly for commodity memory, have accelerated and raised the outlook for the market in 2017 and 2018. However, the memory market is fickle, and additional capacity in both DRAM and NAND flash is expected to result in a correction in 2019.

“While price increases for both DRAM and NAND flash memory are raising the outlook for the overall semiconductor market, it will also put pressure on margins for system vendors of smartphones, PCs and servers,” said Jon Erensen, research director at Gartner. “Component shortages, a rising bill of materials, and the prospect of having to counter by raising average selling prices (ASPs) will create a volatile market in 2017 and 2018.”

PC DRAM pricing has doubled since the middle of 2016. A 4GB module that cost $12.50 has jumped to just under $25 today. NAND flash ASPs increased sequentially in the second half of 2016 and the first quarter of 2017. Pricing for both DRAM and NAND is expected to peak in the second quarter of 2017, but relief is not expected until later in the year as content increases in key applications, such as smartphones, have vendors scrambling for supply.

“With memory vendors expanding their margins though 2017, the temptation will be to add new capacity,” said Mr. Erensen. “We also expect to see China make a concerted effort to join the memory industry, setting the market up for a downturn in 2019.”

Unit production estimates for premium smartphones, graphics cards, video game consoles and automotive applications have improved and contributed to the stronger outlook in 2017. In addition, electronic equipment with heavy exposure to DRAM and NAND flash saw semiconductor revenue estimates increase. This includes PCs, ultramobiles, servers and solid-state drives.

“The outlook for emerging opportunities for semiconductors in the Internet of Things (IoT) and wearable electronics remains choppy with these markets still in the early stages of development and too small to have a significant impact on overall semiconductor revenue growth in 2017,” said Mr. Erensen.

The new, higher-speed DDR4 DRAM generation gained significant marketshare in 2016, representing 45% of total DRAM sales. Previously, DDR3 DRAM, including low-power versions used in tablets, smartphones, and notebook PCs, accounted for 84% of total DRAM sales in 2014 and 76% in 2015, but in 2016, DDR4 price premiums evaporated and prices fell to nearly the same ASP as DDR3 DRAMs. A growing number of microprocessors, like Intel’s newest 14nm x86 Core processors, now contain DDR4 controllers and interfaces.  As a result, IC Insights expects DDR4 to become the dominant DRAM generation in 2017 with 58% marketshare versus 39% for DDR3 (Figure 1).

Figure 1

Figure 1

The Joint Electron Devices Engineering Council (JEDEC) officially launched the fourth generation of DDR in 2012.  In 2014, DDR4 memories first began appearing on the market in DRAM modules for powerful servers and a small number of high-end desktop computers, which had souped-up motherboards or the “extreme” versions of Intel’s 22nm Haswell-E processors for high-performance gaming software and PC enthusiasts, but volume sales remained low until 2015, when data centers and Internet companies began loading up servers with the new-generation memories to increase performance and lower power consumption. In 2016, DDR4 memories quickly spread into more data center servers, mainframes, and high-end PCs, accounting for about 45% of total DRAM sales versus 20% in 2015.  In 2017, DDR4 will move into more notebook PCs, high-end tablets, and smartphones and is expected to hold a 58% share of DRAM sales.

The DDR4 standard contains a number of features that are expected to speed up memory operations and increase SDRAM storage in servers, notebook and desktop PCs, tablet computers, and a wide range of consumer electronics.  The DDR4 standard supports stacked memory chips with up to eight devices presenting a single signal load to memory controllers.  Compared to DDR3, DDR4 can potentially double the module density, double the speed, and lower power consumption up to 20%, thereby extending battery life in future 64-bit tablets and smartphones.

Meanwhile, the DRAM average selling price has been increasing very rapidly since mid-2016.  Figure 2 shows that the DRAM ASP increased 54% from $2.41 in April 2016 to $3.70 in February 2017.  As a result of this big increase, IC Insights raised its 2017 DRAM market forecast to $57.3 billion, which is a 39% increase over 2016.  IC Insights believes that DRAM ASPs will continue to trend upward through most of the first half of 2017, though probably not as rapidly as they did between the period from April 2016 to February 2017.

Figure 2

Figure 2

In its latest quarterly financial conference call, Micron indicated its DRAM outlook through the balance of its fiscal year 2017 (ending August 31) was very encouraging, with solid demand coming from PC, server, communication, automotive, and several other applications.

However, the bigger question for Micron and other top DRAM suppliers is available supply and whether (more accurately, when will) prices plateau and begin trending downward.  One indication that DRAM prices could soften in the second half of the year is the fact that Samsung and SK Hynix are bringing additional DRAM capacity online that features smaller process geometries. Samsung is slated to begin operations at its new Fab 18, in Pyeongtaek, South Korea in 2Q17.  Fab 18, with capacity of 300,000 300mm wafer starts per month, features five production lines that are dedicated primarily to making DRAM.  The company plans to begin DRAM operations at the fab using an 18nm process technology.

SK Hynix has transitioned most of its South Korean-based DRAM output from Fab M10 to Fab M14. With Fab M14 and its dedicated DRAM fab in Wuxi, China, SK Hynix has DRAM capacity of about 280,000 300mm wafer starts per month.  SK Hynix is manufacturing most of its DRAM at the 21nm node, but expects to begin using sub 20nm process technology later this year, thereby helping to reduce costs and increase the number of chips on a wafer.

Following a year of extraordinary gains in pricing, a boost to DRAM supply in the second half of 2017 could lead to reduced ASPs and the inevitable start of a cyclical slowdown in the DRAM market.

Participating in the DRAM market has always been a big challenge for suppliers.  Hot or cold, boom or bust—the DRAM market is rarely moving along in a steady, predictable manner.  For at least the first half of 2017, it appears that DRAM market will be very favorable for these top three suppliers.

“In 2016, the MOSFET market recovered, after a minor downturn in 2015,” announced Yole Développement (Yole) in its latest power electronics report, Power MOSFET: Market & Technology Trends. With stable growth, mainly in automotive and industrial sales in 2016 the overall silicon power MOSFET market size surpassed 2014’s performance.

“We expect the market to grow steadily thanks to increasing demand for efficient electronics, in which power MOSFETs play a vital role”, explains Zhen Zong, Technology & Market Analyst, Power Electronics at Yole. Overall market revenue neared US$6.2 billion. From 2016 to 2022 Yole estimates a 3.4% CAGR.

mosfet market

Under this dynamic ecosystem, Yole reinforces its market positioning within the power electronics industry. The “More than Moore” market research and strategy consulting company is covering step by step the whole power electronics supply chain: from substrates with innovative WBG materials including GaN , SiC , Bulk GaN… to devices (IGBT, MOSFET, gate drivers IC …), modules and systems. In parallel, the company also enlarges its core expertise towards batteries and energy management sector. Yole’s strategy is clearly to propose a deep understanding of the overall power electronics industry by taking into account technical innovations such as WBG technologies, analyze the impact on the supply chain and identify business opportunities.

Yole’s power electronics team attends PCIM Europe with a booth and its annual powerful Power Electronics Market Briefing. During this briefing, the consulting company is inviting industrial leaders to speak and proposes detailed presentations focused on the power semiconductor industry.

Power MOSFET report is one of the key 2017 reports proposed by Yole’s team. It provides an overview of the entire market, with a comprehensive analysis of the players in each market segment with their product range and technologies.

“Under this new report, our aim is to propose our vision of the power electronics industry, from an end-users perspective,” explained Dr Pierric Gueguen, Business Unit Manager at Yole. “Our analysis highlights the corresponding impact on MOSFET technologies and the introduction of WBG technologies which represent only less than 2% of the overall power electronics market today but are showing a real growth potential in a near future.”

In 2016, 25 million electrified vehicles were sold. Power MOSFET sales in automotive applications have surpassed computing and data storage, now representing more than 20% of the total market. As vehicle numbers increase worldwide and people adopt electrified vehicles, this sector’s rapid growth will continue at 5.1% CAGR between 2016 and 2022.

Power MOSFETs are widely used in various automotive applications involving braking systems, engine management, power steering and other small motor control circuits, in which a low conduction loss and high commutation speed device is very much appreciated. Silicon power MOSFETs are also becoming increasingly popular in EV/HEV converters, depending on their electrification level. For battery chargers MOSFETs can handle roughly 3-6 kW, which is perfect for small size plug-in EVs or full EVs. They are also used for 48V DC/DC converters and other micro inverters in the start/stop function module. With the trend of EV/HEV adoption led by Tesla, Yole’s analysts believe this market segment will become increasingly important in the next 5-10 years.

Computing and storage market segment which includes desktops, laptops, as well as different kinds of servers in the datacenters comes to the second largest market. With the declining sales number of personal PCs this market segment is slowing down and has been surpassed by automotive part in 2016. However with the increasing demand for servers and datacenters, the whole segment is still having a steady increase, posting a 2.8% CAGR for the 2016-2022 period.

Power electronics market future may depend on governmental decisions concerning electrified vehicles as well as renewable energies applications. It includes CO2 reduction targets, energy efficiency increases… Both markets could be the most important in 2030, announces Yole in its MOSFET report. On the other hand, other large volume applications may come, such as 5G, drones or robots. All those applications, demanding power supply, will clearly pull the MOSFET market.

Today it is not possible to get a comprehensive understanding of the MOSFETs market without taking into account the impact of the innovative WBG technologies including SiC and GaN.
Silicon power MOSFETs have been developing for 20 years. Ceaseless improvement and technology innovations from planar to trench structure and today’s super junction, have reduced silicon MOSFET device sizes and costs dramatically. They have been massively used in various application segments – but today, device performance has reached silicon’s theoretical limit.
Chasing better performance and even smaller devices size, today the power electronics industry is at the beginning of SiC and GaN’s adoption. Ever more new companies are promoting SiC and GaN solutions and new designs. At Yole, analysts believe this will be the next technology evolution stage. However, this does not necessarily mean doom for silicon power MOSFETs.

“Looking back at the development of bipolar transistors and power MOSFETs in the past 20 years in different applications, we expect that there will still be a very solid market share reserved for silicon power MOSFETs”, analyzes Zhen Zong from Yole. With increasing need in the end applications, the overall market size for MOSFETs will not necessarily decline.

Over the next 5-10 years, Yole envisions some GaN devices coming out and being implemented for high frequency switch applications in the low-to-mid voltage 100-200V range, but remaining a small portion. Both SiC and GaN devices will penetrate the high frequency market around 600V, but will probably only be popular in particular markets, like EV on-board chargers and data center power supply units. The majority of the market will still use silicon power MOSFETs, thanks to their proven reliability and good cost performance ratio.

IHS Markit (Nasdaq: INFO) announced that the worldwide semiconductor market showed signs of recovery in 2016 following a down year in 2015. In 2016, the market posted a year-end growth rate of 2 percent with chip growth seen across multiple market segments. Global revenue came in at $352.4 billion, up from $345.6 billion in 2015.

Key growth drivers

Key drivers of this growth were DRAM and NAND flash memory, which grew more than 30 percent collectively in the second half of 2016. Key to this turnaround was supply constraints and strong demand, coupled with an ASP increase. We expect these factors to drive memory revenue into record territory throughout 2017.

Semiconductors used for automotive applications were also a key driver of 2016 growth, with a 9.7 percent expansion by year-end. Chip content in cars continues to climb, with micro components and memory integrated circuits (IC) leading the pack, both experiencing over 10 percent growth in automotive applications.

“The strong component demand that drove record capital expenditures in 2016 also provided the industry with advanced technology platforms which will support further semiconductor revenue growth in 2017,” said Len Jelinek, Senior Director and Chief Analyst for Semiconductor Manufacturing at IHS Markit.

Continued consolidation

Continuing a recent trend, the semiconductor market saw another year of intense consolidation with no signs of slowing down. The year began with the close of the biggest-ever acquisition in the semiconductor industry. Avago Technologies finalized its $37 billion acquisition of Broadcom Corp. to form Broadcom Limited, which jumped to rank fourth in terms of market share (Avago previously ranked 11th). This acquisition resulted in the newly formed company increasing its market share in several market segments, including taking a large lead in the wired application market.

“After some selective divestiture, Broadcom Limited has focused on market segments where its customer base holds dominant market share positions. These also tend to be markets which have fairly stable and visible TAM growth,” said Senior Analyst Brad Shaffer. “These characteristics may help entrench the company’s market share positions in areas where it chooses to compete,” added Shaffer.

Among the top 20 semiconductor suppliers, ON Semiconductor and nVidia enjoyed the largest revenue growth, followed closely by MediaTek. ON and MediaTek achieved growth through multiple acquisitions, while nVidia saw an enormous demand for its GPU technology as it moves into new markets and applications.

Qualcomm remained the top fabless company in 2016 while MediaTek and nVidia moved into the number two and three spots, respectively. The fabless company with the largest market share gain was Cirrus Logic, a major supplier for Apple and Samsung mobile phones. They moved up five spots in 2016, to number 10.

Intel remains in the number one spot for semiconductor suppliers, followed by Samsung. Qualcomm comes in at number three, with plans to increase its market share in 2017 with its pending acquisition of NXP.

Find more information on this topic in the latest release of the Competitive Landscaping Tool from the Semiconductors & Components service at IHS Markit.

2016 was a turning point for fan-out packaging. With Apple’s entrance and its subsequent decision to package its A10 APE in TSMC’s fan-out solution, the market changed. Thus advanced packaging leaders decided large investments for the development of fan-out platforms, impacting the related equipment and materials market.

“Indeed, both equipment and materials markets for FOWLP will reach an impressive 40% CAGR,” confirmed Jérôme Azémar, Technology & Market Analyst, Advanced Packaging & Semiconductor Manufacturing at Yole Développement (Yole).

A detailed description of both markets and a list of equipment and materials studied by Yole is available in the new report Equipment and Materials for Fan-Out Packaging. According to this technology & market analysis, the total FOWLP equipment market is expected to reach about US$694 million in 2021 at an impressive CAGR of 42.5% between 2015 and 2021. Similarly, FOWLP’s total materials market is expected to reach about US$148 million in 2021 at a CAGR of 40% during the same period.

fowlp 2017

How is Fan-Out success driving the equipment & materials market? What is the impact of the huge investments listed during the 2015-2016 period? Under this dynamic context, where are the business opportunities? Yole’s advanced packaging team is expecting lot of changes in the coming years and offers you today a snapshot of these industries.

In its report, the “More than Moore” market research and strategy consulting company proposes a clear picture of new investments and future markets for equipment and materials in Fan-Out. This report focuses on FOWLP’s key process steps, which Yole believes are most essential to the platform: carrier bonding/debonding, chip placement, molding and RDL processing.

The equipment studied in the report that enables the aforementioned process steps includes pick-and-place bonders, lithography tools, sputter tools, molding tools, carrier debonding tools, and coaters/developers. In parallel, key materials investigated in Yole’s report include RDL dielectrics and photoresist, molding compound, and glass carriers.

As mentioned, 2015 – 2016 period saw large investments in FOWLP.

“With the FOWLP adoption spreading from mobile/wireless and automotive to MEMS, RF SiP, and medical, a wealth of lucrative business opportunities exist for fan-out equipment and materials suppliers,” detailed Jérôme Azémar.

2017 will not see the same investment level, but the potential for new moves is high. Capacity enlargement is still an option for players considering it; in fact it may be required in two years if fan-out keeps growing in high-density applications. Newcomers will gain some market share, necessitating entry into volume production. However, with 4.5 million wafers to be produced in 2021, capacity must also be increased by TSMC and/or other actors. Therefore, a second wave of investment must occur soon or capacity will not be sufficient to address the FOWLP market if it continues growing.

As a consequence, growth will be significant for all equipment and material types, indicating broad benefit from the FOWLP platform’s success. However the challenges and market landscapes are very different from process step and the market is quite diversified. For example, lithography for patterning RDL represents one of the largest market components thanks to the equipment’s high value and the large volume of photoresist. In lithography, a “stepper”-type litho tool is used for FOWLP RDL patterning in order to achieve low-resolution (down to 2µm today), but its cost is high and manufacturers are under strong pressure to reduce their prices.

“This market is currently dominated by Ultratech, which supplies TSMC, and Rudolph which has enjoyed success with OSATs,” said Santosh Kumar, Senior Technology & Market Research Analyst at Yole. And he adds: “We expect other players to penetrate this area, potentially with different approaches like laser ablation.”

Other steps, i.e. mold compound processing, may be more prone to domination by a single player. This symbolic step, which creates a reconstituted wafer out of a mold in which the IC are encapsulated, is almost entirely owned by Nagase Chemtex, almost 90% market share on the materials side. Nagase Chemtex’s dominance is the result of the complex approach such chemicals require in order to develop an optimum solution, and the long history Nagase has with the main producers including Nanium and STATS ChipPAC. LMC is currently the preferred FOWLP mold material, however, to break Nagase’s monopoly and reduce cost, other materials suppliers are working to develop GMC. By 2021, GMC is expected to have 29% of the total market. On the equipment side, things are more diversified, with APIC, Yamada, and Towa the key compression molding-tool suppliers for FOWLP.

2016 was the year of strong consolidations in the semiconductor industry. Yole Développement (Yole) highlights many mergers and acquisitions with several billions of dollars transactions.

“And 2017 seems to be following the same path,” said Jérôme Azemar, Technology & Market Analyst, Advanced Packaging at Yole.

Year after year, the advanced packaging industry has attracted more and more of the spotlight.

ic market forecast

“According to our estimates, advanced packaging revenues represented more than US$22 billion in 2016 and will increase to almost US$30 billion by 2020”, confirmed Jérôme Azemar from Yole.

What is the status of the advanced packaging industry? Who is leading the market today? What are the platforms that will drive the tomorrow’s industry? What could we expect in term of technology evolution? NCAP China and Yole propose you a 2-day conference to answer these questions and get the opportunity to meet the advanced packaging leaders. They announced today the 3rd Advanced Packaging & System Integration Technology Symposium. The 2017 edition takes place in Wuxi, China, on April 20 & 21.
   • Click program & registration to discover schedule, list of speakers, abstracts, and much more.
• The 2017 symposium is sponsored by BESI, Plasma-Therm, SPTS Technologies, UnitySC and Simco-Ion
   • This year again, ASTRI is a partner of the Advanced Packaging & System Integration Technology Symposium.

Created in 2014, the Advanced Packaging & System Integration Technology Symposium is attracting more and more attendees each year. The powerful program designed by Yole and NCAP China gathers numerous valuable discussions, meetings and business collaborations.

 This year again, both partners are excited to welcome the leaders of the advanced packaging industry and are expecting a great success. They have announced an impressive list of executive speakers including:
   • Tetsukazu Sugiya, Group Leader, Technology Solutions Group at DISCO Corp.
   • Lianming Tong, Lead Marketing Manager at Dow Electronics Materials
   • Kenji Kawada, Staff Engineer at Infineon Technologies Japan
   • Daquan Yu, CTO & VP, Kunshan Huatian Technology Electronics
   • Howard Huang, Director, Kingyoup Optronics
   • Tae-Hoon Kim, Ex. President, nepes Corporate
   • Dr David Lishan, Principal Scientist at Plasma-Therm
   • Richard Barnett, Etch Product Manager, SPTS, an Orbotech Company …

And much more. List of speakers, biographies and abstracts are available on i-micronews.com website. To download the PDF version, click Program. 2017 edition also includes two keynote speakers from Huawei and Brewer Science.

Partnership between both organizations, NCAP China and Yole has been signed 3 year ago and all benefits of this collaboration are serving the development of the advanced packaging industry in China and all around the world. Based on a strategic thinking, NCAP China and Yole combined their expertise and their brand to support the development of this dynamic industry. Both organizations became indispensable players. And as strong influencer, the NCAP China and Yole Symposium is today the relevant indicator of the status of advanced packaging industry.

“We are very pleased to have the opportunity this year again to host the “Advanced Packaging & System Integration Technology Symposium,” saidDr Cao LiQiang, NCAP’s CEO. And he adds: “Mixing together worldwide companies and laboratories, all experts in the advanced packaging arena is just key for the development of the industrial activities in China. It is a relevant contribution to shape the future of the advanced packaging ecosystem. Under this context, we are looking forward to welcome advanced packaging leaders and get powerful presentations and debates during the Symposium.”

Advanced packaging revenue in China is expected to reach US$4.6 billion in 2020 at an impressive 16% CAGR .

“Indeed we are experiencing a key momentum in the semiconductor industry,” announced Thibault Buisson, Business Unit Manager, Advanced Packaging & Semiconductor Manufacturing at Yole. “Lot of technical challenges are now being transferred from the chip to the package itself. This is why industrial companies from different business models are willing to get involved in the exciting advanced packaging field. Under a highly competitive landscape, innovative platforms such as FO packages, 3D & 2.5D interposers and SiP are getting more and more interest from the end users and therefore are changing the packaging ecosystem. NCAP China & Yole Symposium is the place to get a clear understanding of the status of this industry and get answers to future market evolutions, the industry will face tomorrow.”

The symposium represents an exciting opportunity for advanced packaging companies to develop, exchange and expand their activities in China and also in all other countries. NCAP and Yole are very enthusiastic about this 3rd edition. Make sure you will attend the Symposium and book your place right now on i-micronews website or click: Registration. To see the full schedule, please click here: Program.

The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, today announced worldwide sales of semiconductors reached $30.4 billion for the month of February 2017, an increase of 16.5 percent compared to the February 2016 total of $26.1 billion. Global sales in February were 0.8 percent lower than the January 2017 total of $30.6 billion, exceeding normal seasonal market performance. February marked the global market’s largest year-to-year growth since October 2010. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average.

“The global semiconductor industry has posted strong sales early in 2017, with memory products like DRAM and NAND flash leading the way,” said John Neuffer, president and CEO, Semiconductor Industry Association. “Year-to-year sales increased by double digits across most regional markets, with the China and Americas markets showing particularly strong growth. Global market trends are favorable for continuing sales growth in the months ahead.”

Year-to-year sales increased across all regions: China (25.0 percent), the Americas (19.1 percent), Japan (11.9 percent), Asia Pacific/All Other (11.2 percent), and Europe (5.9 percent). Month-to-month sales increased modestly in Asia Pacific/All Other (0.5 percent) but decreased slightly across all others: Europe (-0.6 percent), Japan (-0.9 percent), China (-1.0 percent), and the Americas (-2.3 percent).

Neuffer also noted the recent growth of foreign semiconductor markets is a reminder of the importance of expanding U.S. semiconductor companies’ access to global markets, which is one of SIA’s policy priorities for 2017. The U.S. industry accounts for nearly half of the world’s total semiconductor sales, and more than 80 percent of U.S. semiconductor company sales are to overseas markets, helping make semiconductors one of America’s top exports.

February 2017

Billions

Month-to-Month Sales                               

Market

Last Month

Current Month

% Change

Americas

6.13

5.99

-2.3%

Europe

2.84

2.82

-0.6%

Japan

2.79

2.77

-0.9%

China

10.15

10.05

-1.0%

Asia Pacific/All Other

8.72

8.76

0.5%

Total

30.64

30.39

-0.8%

Year-to-Year Sales                          

Market

Last Year

Current Month

% Change

Americas

5.03

5.99

19.1%

Europe

2.66

2.82

5.9%

Japan

2.47

2.77

11.9%

China

8.04

10.05

25.0%

Asia Pacific/All Other

7.88

8.76

11.2%

Total

26.08

30.39

16.5%

Three-Month-Moving Average Sales

Market

Sept/Oct/Nov

Dec/Jan/Feb

% Change

Americas

6.25

5.99

-4.2%

Europe

2.88

2.82

-2.3%

Japan

2.90

2.77

-4.6%

China

10.04

10.05

0.1%

Asia Pacific/All Other

8.94

8.76

-2.0%

Total

31.02

30.39

-2.0%