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The Semiconductor Industry Association (SIA) announced worldwide sales of semiconductors reached $29.0 billion for the month of October 2015, 1.9 percent higher than the previous month’s total of $28.4 billion and 2.5 percent lower than the October 2014 total of $29.7 billion. The Americas market posted 3.9 percent growth compared to last month, leading all regions. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average. Additionally, a new WSTS industry forecast projects slight market growth for the next three years.

“Global semiconductor sales have shown signs of stabilizing in recent months, with October marking the third straight month of month-to-month growth,” said John Neuffer, president and CEO, Semiconductor Industry Association. “Year-to-date sales are narrowly ahead of where they were through the same time last year, and slight growth is projected for next year and beyond.”

Month-to-month sales increased across all regional markets: the Americas (3.9 percent), China (1.6 percent), Europe (1.2 percent), Japan (0.4 percent), and Asia Pacific/All Other (1.7 percent). Compared to October 2014, sales were up in China (5.7 percent), but down in the Americas (-5.6 percent), Europe (-9.4), Japan (-10.5 percent), and Asia Pacific/All Other (-2.4 percent).

Additionally, SIA endorsed the WSTS Autumn 2015 global semiconductor sales forecast, which projects the industry’s worldwide sales will reach $336.4 billion in 2015, a 0.2 percent increase from the 2014 sales total. WSTS projects year-to-year increases for 2015 in Asia Pacific (3.9 percent), with decreases projected for the Americas (-0.6 percent), Europe (-8.2 percent), and Japan (-10.3 percent).

Beyond 2015, the global market is expected to grow at a modest pace. WSTS forecasts 1.4 percent growth globally for 2016 ($341.0 billion in total sales) and 3.1 percent growth for 2017 ($351.6 billion). WSTS tabulates its semi-annual industry forecast by convening an extensive group of global semiconductor companies that provide accurate and timely indicators of semiconductor trends.

October 2015

Billions

Month-to-Month Sales                               

Market

Last Month

Current Month

% Change

Americas

5.82

6.05

3.9%

Europe

2.87

2.90

1.2%

Japan

2.69

2.70

0.4%

China

8.45

8.58

1.6%

Asia Pacific/All Other

8.58

8.72

1.7%

Total

28.41

28.96

1.9%

Year-to-Year Sales                          

Market

Last Year

Current Month

% Change

Americas

6.41

6.05

-5.6%

Europe

3.21

2.90

-9.4%

Japan

3.01

2.70

-10.5%

China

8.12

8.58

5.7%

Asia Pacific/All Other

8.94

8.72

-2.4%

Total

29.68

28.96

-2.5%

Three-Month-Moving Average Sales

Market

May/Jun/Jul

Aug/Sept/Oct

% Change

Americas

5.51

6.05

9.7%

Europe

2.83

2.90

2.5%

Japan

2.63

2.70

2.3%

China

8.18

8.58

5.0%

Asia Pacific/All Other

8.71

8.72

0.2%

Total

27.87

28.96

3.9%

GLOBALFOUNDRIES today announced it has been presented with an Award of Excellence from INOVA Semiconductors GmbH, a specialist in the development of products for Gigabit/s serial data communication for in-vehicle Display- and Driver Assistance Systems.

This award acknowledges GLOBALFOUNDRIES for its ability to achieve top quality and yield performance for the silicon wafers produced specifically for the customer’s RF communication products used in the automotive market. Driven by “Zero Excursion, Zero Defect” (ZEZD) mindset, this is a testament to GLOBALFOUNDRIES’ continuous strive for improvement to increase initial product quality and reduce wafer failure rate after delivery.

“Achieving zero defect is our goal and GLOBALFOUNDRIES’ proven expertise in the automotive semiconductor supply chain plays an important role in helping us to reach that goal,” said Robert Kraus, INOVA Semiconductors CEO.

“It is a great honor for GLOBALFOUNDRIES to receive this award from INOVA. This award further solidifies our position in serving the automotive market over a decade with high quality and reliability standard, and propel us to become a leading foundry in this segment,” said KC Ang, SVP and General Manager for GLOBALFOUNDRIES Singapore.

GLOBALFOUNDRIES completes a range of industry certifications and audits every year in its continuous commitment to semiconductor quality and reliability. Every fab in Singapore are certified or exceeding ISO-TS 16949, ISO 9001, ISO 14001 and OHSAS 18001, including the customer-led VDA6.3 audits that exceed the TS16949 standard. GLOBALFOUNDRIES is also a member of the Automotive Electronics Council (AEC) which sets global industry standards for automotive semiconductor quality.

BY PETER CONNOCK, Chairman of memsstar

The dramatic shift from the trend for increasingly advanced technology to a vast array and volume of application-based devices presents Europe with a huge opportunity. Europe is a world leader in several major market segments – think automotive and healthcare as two examples – and many more are developing and growing at a rapid rate. Europe has the technology and manufacturing skills to satisfy these new markets but they must be addressed cost effectively – and that’s where the use of secondary equipment and related services comes in.

While Moore’s Law continues to drive the production of advanced devices, the broadening of the “More than Moore” market is poised to explode. All indicators are pointing to a major expansion in applications to support a massive increase in data interchange through sensors and related devices. The devices used to support these applications will range from simple sensors to complex packages but most can, and will, be built by “lower” technology level manufacturing equipment.

This equipment will, in many cases, be required to be “remanufactured” and “repurposed” but will allow semiconductor suppliers to extend the use of their depreciated equipment and/or bring in additional equipment, matched to their process needs, at reduced cost. In many cases this older equipment will need to be supported by advanced manufacturing control techniques and new test and packaging capabilities.

SEMI market research shows that investment in “legacy” fabs is important in manufacturing semiconductor products, including the emerging Internet of Things (IoT) class of devices and sensors, and remains a sizeable portion of the industries manufacturing base:

  • 150mm and 200mm fab capacity represent approximately 40 percent of the total installed fab capacity
  • 200mm fab capacity is on the rise, led by foundries that are increasing 200mm capacity by about 7 percent through to 2016 compared to 2012 levels
  • New applications related to mobility, sensing, and IoT are expected to provide opportunities for manufacturers with 200mm fabs

Out of the total US$ 27 billion spent in 2013 on fab equipment and US$ 31 billion spent on fab equipment in 2014, secondary fab equipment represents approximately 5 percent of the total, or US$ 1.5 billion, annually, according to SEMI’s 2015 secondary fab equipment market report. For 2014, 200mm fab investments by leading foundries and IDMs resulted in a 45 percent increase in spending for secondary 200mm equipment.

Secondary equipment will form at least part of the strategy of almost anyone manufacturing or developing semiconductors in Europe. In many cases, it is an essential capability for competitive production. As the secondary equipment industry increases its strategic importance to semiconductor manufac- turers and researchers it is critical that the corresponding supply chain ensures a supply of quality equipment, support and services to meet rapidly developing consumer needs.

Common challenges across the supply chain include:

  • How to generate cooperation across Europe between secondary equipment users and suppliers and what sort of cooperation is needed?
  • How to ensure the availability of sufficient engineering resource to support the European secondary installed base?
  • Are there shortages of donor systems or critical compo- nents that are restricting the use of secondary equipment and, if so, how might this be resolved

Europe’s secondary industry will be in the spotlight during two sessions at SEMICON Europa 2015:

  • Secondary Equipment Session – Enabling the Internet of “Everything”?
  • SEA Europe ‘Round Table’ Meeting

The sessions are organised by the SEMI SEA Europe Group and are open to everyone associated with the secondary industry, be they device manufacturer or supplier, interested in the development of a vibrant industry providing critical support to cost effective manufacturing in Europe.

Systematic – and predictive – cost reduction in semiconductor equipment manufacturing

BY TOM MARIANO, Foliage, Burlington, MA

After a period of double-digit growth, the semiconductor equipment industry has now stabilized to the point where recent market forecasts are predicting anemic single-digit growth rates. This is driven by total market demand from chipmakers. For example, despite strong growth of 12.9 percent in 2014, Gartner, Inc. projects worldwide semiconductor capital spending to only grow 0.8 percent in 2015, to $65.7 billion. [1] Additionally, this industry has always been subject to volatile demand cycles that are notoriously difficult to predict.

Translation: It’s extremely challenging for today’s semiconductor equipment manufacturers to improve their financial performance. There are fewer and fewer opportunities to grow topline revenue through innovation and new product development. And, after several years of cutting costs on existing products and not realizing enough cost reduction to improve margins, it’s difficult to know how to do it differently.

Yet a viable alternative to improve financial performance does exist: A disciplined, rigorous, and systematic approach to reducing costs that delivers more predictive results.

A systematic approach to cost reduction

Where cutting costs was once perceived as the end result of “desperate times, desperate measures,” many innovators are now using this approach much more proactively. By
meeting the idea of cost reduction head on – as an opportunity, not a last resort – many semiconductor equipment makers are uncovering wasteful, inefficient, and costly processes, often in areas they once overlooked. At this point, you may be thinking, “All of this sounds great, but what is a systematic approach to cost reduction, and how is it different from what I’m doing?”

Remember that many manufacturers (in all industries) tend to have a hard time driving costs down. They may set cost reduction goals and then attempt to achieve them using various ad hoc approaches. But they really need to understand exactly what their true costs are, where they exist, and which areas will improve their margins.

A systematic approach to cost reduction gives them this insight. With improved visibility into the entire organization, various processes, and how they execute, semiconductor equipment manufacturers can’t identify the right places to cut costs and hit their cost savings goals. This is a very detailed and planned approach in which organizations closely examine areas such as cost of goods sold, R&D, and service to make more informed decisions that will position their business for long-term success. This is the value of a systematic approach to cost reduction.

This approach also introduces the element of speed, helping equipment makers realize cost savings much faster than ad hoc cost-cutting initiatives and puts them on a path to achieve more predictive results. Beyond the positive (and more obvious) impact successful cost reduction has on a semiconductor equipment manufacturer’s bottom line, it also provides a number of significant benefits such as improving productivity, freeing up key personnel, and providing needed capital to fuel new growth.

The path to predictive results

Even if the concept of a more strategic approach to cutting costs sounds reasonable, many semiconductor equipment manufacturers struggle with how to begin and where to focus. All to often they resort to making reactive decisions regarding existing products without the necessary data, leading them to ask questions such as, “Should we have an obsolescence plan for this product?” “How much could we save?” and “Will this lead to bigger problems down the road?”

Without understanding where your best opportunities for cost cutting are, it’s a lot larder to predict when, and if, cost reduction goals will be met. A systematic approach to cost reduction includes establishing clear cost targets, communicating them to leadership, and measuring and reporting results along the way.

The first step is to engage with an outside firm that has a singular focus on cost reduction, and one that is clearly separated from day-to-day operations and current organizational dynamics. Such an engagement will yield an actionable list of improvements with specific cost targets, realistic timelines for achieving these goals, and future plans for reinvesting the cost savings.

More specifically, a systematic cost reduction approach will focus on three key areas: material costs, R&D costs, and service costs:

1. Material costs: The bill of materials is one of the most common ways to see all the components needed to produce the end product. But this goes well beyond the pure cost of materials. Research has shown that improving the way these components are managed can affect 80-90% of the product’s total costs.[2]

For semiconductor equipment manufacturers, the cost reduction process should start with the selection of the products or sub-assemblies that have the highest potential for savings. Focus on those products that are still generating significant revenue, but may not be receiving much attention in terms or engineering upgrades and enhancements. Thoroughly examine the bill of materials for these products by addressing materials, design, complexity reduction, the potential to create common assemblies, and more.

Value engineering efforts can simultaneously improve product functionality and performance while reducing bill of material costs. This effort should factor in ways to meet RoHS requirements and when to make end-of-life decisions for various electrical components to improve design efficiency and the effectiveness of the product.

A realistic cost reduction goal can then be created and a resulting value-engineering project can commence, often using low-cost offshore resources to best achieve those savings.

2. R&D costs: Making better decisions related to R&D processes and product development can shave considerable costs. Some areas to focus on include:

• When to officially end of life non-performing products
• When to consolidate products, or possibly even entire R&D departments
• When and how to move sustaining engineering efforts offshore, or to other lower-cost alternatives

The critical next step is to look at all products and all product variations to determine if an official end-of-life program should be employed. These decisions are notoriously hard to make and often require difficult conversations with key customers, but they are necessary nonetheless.

Many semiconductor equipment manufacturers have grown through acquisitions, creating redundant engineering groups that can be eliminated or downsized. Performing an organizational analysis of all R&D activities may uncover opportunities to consolidate and combine functions or create centers of excellence that focus on specific technical areas eliminating redundancies of technical specialty.

3. Service costs: Examine engineering and design processes to find ways to improve performance, reliability, and costs. For example, adding data collection technology or product diagnostics to enhance remote support efforts and predictive maintenance.

Improvement of product reliability is usually a large multiplier when it comes to service and spare parts costs. Collect and analyze field data to find the most significant issues driving service costs and then look to cut where possible.

For example, equipment in the field often does not have the capability to report enough information to effectively identify a problem. Adding increased data logging and communication can be used to clarify machine status and point services in the right direction. Connectivity can also help with remote diagnostics, all of which helps reduce costs, uptime, and customer satisfaction.

Cost Reduction as a Competitive Advantage

Short-term market forecasts will continue to make it challenging for semiconductor equipment manufacturers to deliver improved financial results. Yet the concept of a systematic approach to cost reduction is a proven way for them to proactively cut costs – in the right places – and also make better decisions related to existing products and other business systems and processes.

By taking a disciplined, rigorous, and objective look at any and all parts of their organization, semiconductor equipment makers can capitalize on new opportunities to free valuable resources, improve processes and future technology, and reinvest savings for future growth. For many equipment manufacturers the greatest obstacle to successfully exploiting these opportunities is insufficient experience and expertise with a disciplined and unconventional way of approaching cost reduction projects. A systematic approach to cost reduction will be the key to success for companies looking to improve their competitive advantage.

References

1. Gartner, Inc., “Gartner Says Worldwide Semiconductor Capital Spending to Increase 0.8 Percent in 2015: Conser- vative Investment Strategies Paving the Way to Slower Growth in 2015,” January 13, 2015. http://www.gartner. com/newsroom/id/2961017.

2. Forbes, “Product Lifecycle Management: A New Path to Shareholder Value?” August 5, 2011, http://www. forbes.com/sites/ciocentral/2011/08/05/product-lifecycle- management-a-new-path-to-shareholder-value/.

By Dr. Harry Zervos, Principal Analyst, IDTechEx

Flexible electronic devices are starting to experience significant proliferation, with more and more devices with innovative form factors being brought to market, from small components such as disposable sensors that have been in the market for quite some time now, all the way to new flexible smart phones currently being demonstrated by consumer electronics giants like Samsung and LG.

While printing technologies enable lower manufacturing costs and superior performance in many applications, vacuum deposition still claims significant market share in flexible electronics, although sometimes a combination of both can be the ideal combination.

From test strips to OLEDs 

Glucose test strips are a great example of the prevalence of both printed and vacuum deposited devices. Over ten billion test strips are being manufactured worldwide, in order to cater for the needs of the ever-increasing number of people living with diabetes. Although each manufacturer/brand has its own technology and design, the following cross-section shows the key parts of a test strip.  Manufacturers follow both thick film (screen printing) and thin film (sputtering) techniques for depositing the circuit in test strips, each of the techniques with its own merits.

Screen printing technology involves printing patterns of conductors and insulators onto the surface of planar solid (plastic or ceramic) substrates based on pressing the corresponding inks through a patterned mask. Each strip contains printed working and reference electrodes with the working one coated with the necessary reagents and membranes, with the reagents commonly dispensed by ink jet printing technology and deposited in the dry form. With thin film deposited electrodes, sputtering or laser ablation is commonly utilized. Lifescan for instance, a Johnson & Johnson company, mostly prints electrodes whereas Roche utilizes laser ablation in its Indianapolis plant. Along with the very specialized organic materials utilized in assays in the actively sensing part of the test strips, advanced devices integrating thin film technology utilize gold nanoparticles and mesoporous Pt electrodes, and even the use of carbon nanotubes and graphene has been demonstrated in certain designs.

OLED displays are a good example where the advent of printing techniques is meant to bring about much larger displays, manufactured at lower costs but for the time being, the OLED industry makes displays that are almost exclusively vacuum evaporated. Optimized solution processed materials are also becoming available but for now, vacuum deposited options perform better. Sunic, Aixtron, Canon Tokki and ULVAC are some of the companies that actively design and market equipment and materials for industrial vacuum technology in OLED applications.

Most of these companies, along with others such as Applied Materials are active in making more than just the active OLED layers, providing equipment for TFT deposition, encapsulation, etc.

The opportunity here is significant: The OLED market is meant to reach over $50bn in the next decade, with flexible and rigid plastic OLED displays surpassing 16 billion by 2020.

Flexible encapsulation & thin film PV

Encapsulation of flexible versions of OLED displays is set to become an exciting market: flexible barrier films – whether utilizing CVD or PVD processes or even in cases when ALD is utilized to make high quality, defect free layers- are hugely benefiting from vacuum deposition techniques and have created encapsulation materials that can reach the water vapor transmission rates required to allow flexible OLED displays the necessary lifetimes required to become commercially viable. Encapsulation for flexible OLED devices is a market that is expected to reach almost $340m by 2022 according to IDTechEx Research in the report “Barrier Layers for Flexible Electronics 2016-2026: Technologies, Markets, Forecasts”.

Flexible versions of thin film photovoltaics also require stringent encapsulation, but thin films have had harsh competition from low cost crystalline silicon cells from China, that have significantly reduced their market share in recent years. Just over 7% of the overall market for PV this year is expected to be thin-film based, according to research from SPV Research.

It is interesting to point out that manufacturing of all thin films for solar cell applications is fully vacuum based: PECVD for amorphous silicon platforms, sputtering or co-evaporation tends to be the preferred deposition techniques for CIGS technologies while CdTe leader First Solar has developed and optimized its own unique vacuum deposition technique, High Rate Vapor Transport Deposition (HRVTD). In this process, co-developed with NREL in an effort that started back in the early 1990’s, the material to be deposited is carried on a gas stream in powder form, then heated and vaporized as it passes through a membrane before depositing on a glass substrate. The technology can deposit a thin uniform layer of CdTe (or CdS, a common material system used as a buffer layer in CdTe cells) on 8 square feet of glass in less than 40 seconds, a deposition rate much higher than other rival thin film solar technologies that proved to be key in First Solar’s success in improving yield and output and consequently lower production costs for its thin film solar cells.

Conclusions 

The conclusion is simple: commercializing flexible or printed electronics will invariably require a deeper understanding of vacuum deposition technologies. Printing techniques are not the only manufacturing option that can allow for the freedom in design that the advent of flexibility in form factor is ushering in. In fact, vacuum deposition technologies are currently enabling the proliferation of a wide range of components and devices, from encapsulation films to thin flexible batteries to transparent conductive films and backplane elements. In many cases, having reached economies of scale, vacuum deposited devices have reached attractive cost structures that make it harder for printed versions to compete, having to “dig deep” in order to bring forward additional selling points than just reductions in cost.

Printed Electronics USA 2015 taking place in Santa Clara, CA on the 18th and 19th of November this year is going to focus on the importance of vacuum deposition, with both the conference as well as the trade show featuring contributions from end users, device manufacturers and manufacturing equipment suppliers of vacuum deposition technologies.

Security by design


November 13, 2015

Chowdary_Yanamadala-150x150By Chowdary Yanamadala, Senior Vice President of Business Development, ChaoLogix

The advent of Internet-connected devices, the so-called Internet of Things (IoT), offers myriad opportunities and significant risks. The pervasive collection and sharing of data by IoT devices constitutes the core value proposition for most IoT applications. However, it is our collective responsibility, as an industry, to secure the transport and storage of the data. Failing to properly secure the data risks turning the digital threat into a physical threat.  

Properly securing IoT systems requires layering security solutions. Data must be secured at both the network and hardware level. As a hardware example, let’s concentrate, on the embedded security implemented by semiconductor chips.

Authentication and encryption are the two main crypto functions utilized to ensure data security. With the mathematical security of the standardized algorithms (such as AES, ECDSA, SHA512, etc.) is intact, hackers often exploit the implementation defects to compromise the inherent security provided by the algorithms.

One of the most dangerous and immediate threats to data security is a category of attacks called Side Chanel Analysis attacks (SCA). SCA attacks exploit the power consumption signature during the execution of the crypto algorithms. This type of attack is called Differential Power Analysis (DPA). Another potent attack form of SCA is exploiting the Electromagnetic emanations that are occurring during the execution of the crypto algorithm – or Differential Electromagnetic Analysis attacks (DEMA).

Both DPA and DEMA attacks rely on the fact that sensitive data, such as secret keys, leaks via the power signature (or EM signature) during execution of the crypto algorithm.

DPA and DEMA attacks are especially dangerous, not only because of their effectiveness in exploiting security vulnerabilities but also due the low cost of the equipment required for the attack. An attacker can carry out DPA attacks against most security chips using equipment costing less than $2,000.

There are two fundamental ways to solve the threat of DPA and DEMA. One approach is to address the symptoms of the problem. This involves adding significant noise to the power signature in order to obfuscate the sensitive data leakage. This is an effective technique.  However, it is an ad-hoc and temporary measure against a potent threat to data security. Chip manufacturers can also apply this technique as a security patch, or afterthought, once  and architecture work is completed.

Another way (and arguably a much better way) to solve the threat of DPA is to address the problem at the source. The source of the threat derives from the leakage of sensitive data the form of power signature variations. The power signature captured during the crypto execution is dependent on the secret key that is processed during the crypto execution. This makes the power signature indicative of the secret key.

What if we address the problem by minimizing the relation between the power signature and the secret key that is used for crypto computation? Wouldn’t this offer a superior security? Doesn’t addressing the problem at the source provide more fundamental security? And arguably a more permanent security solution?

Data security experts call this Security By Design. It is obvious that solving a problem at the source is a fundamentally better approach than providing symptomatic relief to the problems. This is true in the case of data security as well. In order to achieve the solution (against the threat of DPA and DEMA) at the source, chip designers and architects need to build the security into the architecture.

Security needs to be a deliberate design specification and needs to be worked into the fabric of the design. Encouragingly, more and more chip designers are moving away from addressing security as an afterthought and embracing security by design.

As an industry, we design chips for performance, power, yield and testability. Now it is time to start designing for security. This is especially true for chips used in IoT applications. These chips tend to be small, have limited computational power and under tight cost constraints. It is, therefore, difficult, and in some cases impossible, to apply security patches as an afterthought. The sound approach is to start weaving security into the building blocks of these chips.

In sum, designing security into a chip is as much about methodology as it is about acquiring various technology and tools. As IoT applications expand and the corresponding demand for inherently secure chips grows, getting this methodology right will be a key to successful deployment of secure IoT systems.

Related data security articles: 

Security should not be hard to implement

ChaoLogix introduces ChaoSecure technology to boost semiconductor chip security

While conventional thin film transistor liquid crystal (TFT LCD) displays are rapidly trending towards commoditization and currently suffering from declining prices and margins, China is quickly adding capacity in all flat-panel display (FPD) manufacturing segments. Supported by financial incentives from local governments, Chinese TFT capacity is projected to grow 40 percent per year between 2010 and 2018. In 2010 China accounted for just 4 percent of total TFT capacity. However by 2018, China is forecast to become the largest FPD-producing region in the world, accounting for 35 percent of the global market, according to IHS Inc., a leading global source of critical information and insight.

While Chinese capacity expands, Japan, South Korea and Taiwan have restricted investments to focus mainly on advanced technologies. TFT capacity for flat panel display (FPD) production in these countries is forecast to grow on average at less than 2 percent per year between 2010 and 2018.

Based on the latest IHS Display Supply Demand & Equipment Tracker, BOE Technology Group stands out as the leading producer of FPDs in China. With a capacity growth rate of 44 percent per year between 2010 and 2018, BOE will become the main driver for Chinese share gains. By 2018, the company will have ramped up more FPD capacity than any other producers, except for LG Display and Samsung Display.

IHS FPD_capacity_table“Despite growing concerns of oversupply for the next several years in most parts of the display industry, there is still little evidence that Chinese makers are reconsidering or scaling back their ambitious expansion plans,” said Charles Annis, senior director at IHS. “On the contrary, there continues to be a steady stream of announcements of new factory plans by various regional governments and panel makers.”

In China the central government has generally encouraged investment in FPDs, in order to shift the economy to higher technology manufacturing, to increase domestic supply and to support gross domestic product (GDP) growth. Provincial governments have become the main enabler of capacity expansion through product and technology subsidies, joint ventures and other direct investments, by providing land and facilities and through tax incentives. In return, new FPD fabs increase tax revenue, support land value appreciation, increase employment and spur the local economy. The economic benefits generated from the feedback loop between local governments, panel makers and new FPD factories are still considered sufficiently positive in China to warrant application of significant public resources.

“China currently produces only about a third of the FPD panels it consumes. However, by rapidly expanding capacity, panel makers and government officials are expecting to double domestic production rates in the next few years and are also looking to export markets,” Annis said. “How excessive global supply, falling prices and lower profitability will affect these plans over time is not yet exactly clear. Even so, there is now so much new capacity in the pipeline that China will almost certainly become the top producer of FPDs by 2018.”

According to a new market report published by Transparency Market Research “LED Driver and Chipset Market – Global Industry Analysis, Trend, Size, Share and Forecast, 2015 – 2021“, the global LED Driver and Chipset market was valued at US$2.80 billion in 2014 and is expected to reach US$11.99 billion by 2021, growing at a CAGR of 23.2% from 2015 to 2021.

The global LED Driver and Chipset market is primarily driven by increasing demand among the consumers for efficient power solution both in terms of display and lighting. LEDs outperform the traditional Cold Cathode Fluorescent Lamps (CCFLs) and Liquid Crystal Displays (LCDs) in term of size, energy efficiency, reliability and mechanical ruggedness both for displays and lighting applications. LEDs generate 100% of the National Television System Committee (NTSC) colors plus some extra colors in comparison with LCDs which generates only 70-80% of the NTSC colors. In addition, the operating cost of LEDs is low as compared to other lighting and display devices as LEDs produce more lumen per watt. Thus, more consumers are inclining towards the usage of LEDs which in turn is driving the growth of LED drivers and chipset market. Moreover, increasing awareness among the consumers regarding carbon footprints is also expected to fuel the demand of eco friendly LED devices which in turn is expected to boost the demand of LED Drivers and Chipsets offered by different LED product’s manufacturers. LEDs result in less carbon dioxide and Sulphur oxide emission (451 pound/ year) and help to keep the environment pollution free. Moreover, LEDs produces 90% less heat than incandescent and. CCFL bulbs.

The LED Driver and Chipset market is segmented on the basis of application and geography. The application segment is further bifurcated into display and lighting. By display, LED Driver and Chipset market is classified into: mobile phones, digital camera, television and navigation devices, medical devices, computer/laptop peripherals and others. Gaming devices, digital photo frames and MP3 players are included in the others segment. By lighting, the market can be segmented into outdoor areas and traffic signals, automotives, indoor lighting and commercial lighting among others. Geographically, the LED Driver and Chipset market has been segmented into North America, Europe, Asia-Pacific and Rest of the World (ROW).

Among the different applications, lighting segment was the fastest growing market in 2014. The market is predicted to grow at a CAGR of 24.1% from 2015 to 2021 and accounted for 20.1% of the overall revenue share of LED Driver and Chipset market. By geography, Asia Pacific held the largest market share and is expected to be the fastest growing market expanding at a CAGR of 23.4%. Asia Pacific is mainly driven by China and Japan. The government in this region has taken several steps to phase out the usage of conventional lighting and display technology to reduce carbon footprints. This in turn is expected to increases the sale of LED appliances and is predicted to drive the growth of LED Driver and Chipset market during the forecast period. Advanced Analogic Technologies Inc, Diodes Inc, Exar Corp and Ixys Corp among others are some of the major players operating in LED Driver and Chipset market.

With a recent sharp rise in the number of patent applications for flexible display technologies, the market for various types of flexible displays is expected to broaden. According to IHS, 312 patents for flexible displays were filed with the United States Patent and Trademark Office in 2014; user-interface technology was the most active sector for patent applications. Flexible displays accounted for 62 percent of US display patent applications last year.

“Flexible displays are next-generation display panels fabricated on a paper-thin and flexible substrate, so that they can be bent and rolled without damage,” said Ian Lim, Senior Analyst of Intellectual Property for IHS Technology. “These types of displays, which lend themselves to far wider applications than conventional rigid displays, are projected to create an entirely new display market and replace existing non-flexible display solutions.”

Based on the latest information from the IHS Flexible Display Patent Report–which covers patents related to flexible displays issued in the US, in 2014, focusing on materials, manufacturing technology and applied devices–Samsung Electronics filed half of all new flexible display patents in the United States, followed by LG Electronics at 17 percent. Most of these patent applications focus on preventing image degradation, reducing device distortion and providing a range of user interfaces for bendable and foldable displays. Patents on parts and manufacturing technologies that primarily focus on the use of polyimide flexible substrates and metal nanowire in organic light-emitting diode (OLED) displays were also popular.

“Patents for flexible display device technologies outnumber those for flexible display parts and manufacturing technologies in recent patents, indicating that the flexible display market is entering a period of maturing growth,” Lim said. “As manufacturer requirements for flexible displays grow, battles to acquire relevant patents will only become fiercer.”

Flexible_display_patent_chart

Solid State Technology is thrilled to announce that several key industry leaders have joined the Advisory Board for its annual conference and networking event, The ConFab. New members include: Robert Cappel, Senior Director Corporate Marketing, KLA-Tencor; William Chen, Fellow and Senior Technical Advisor, ASE; L.T. Guttadauro, Executive Director, Fab Owners Association; Li Li, Distinguished Engineer, Cisco Systems; Ariel Meyuhas, COO, The MAX Group; Gary Patton, CTO and Head of Worldwide R&D, GLOBALFOUNDRIES and Elton Peace, General Manager North America Regional Operations, Lam Research.

“We are delighted to welcome the new additions to our Advisory Board, each of whom have a unique and valuable insight into the what makes the semiconductor manufacturing industry successful,” said Pete Singer, Editor-in-Chief of Solid State Technology and conference chair for The ConFab. “These individuals will be instrumental is ensuring that The ConFab has an expanded role in the industry and is a “must attend” event for networking and discussing critical economic and manufacturing issues.”

The ConFab 2016 conference program will focus on “The Economics of Semiconductor Manufacturing and Design”. Topics will include:

  • How IoT is Driving the Semiconductor Industry
  • Filling the Fabs of the Future: A Guide to Hot New Applications
  • MEMS Sensor Fusion and More then Moore
  • The Limits of Scaling: Understanding the Challenges of sub-10nm Manufacturing
  • Fabless, Foundries and OSATs: Optimizing the Supply Chain
  • System Integration, Advanced Packaging + 3D Integration
  • China’s New Role in the Global Semiconductor Industry
  • Legacy Fabs and the Resurgence of 200mm
  • The Impact of Continued Consolidation Across the Supply Chain
  • Wearables and Bioelectronics: The Cusp of a Revolution?
  • Tackling Rising R&D Costs in the Semiconductor Industry

The new members will be joining the existing Advisory Board, comprised of David Bennett, VP Alliances, GLOBALFOUNDRIES; Janice M. Golda, Director, Lithography Capital Equipment Development, Intel Corporation; Devan Iyer,,Director Worldwide Semiconductor Packaging Operations, Texas Instruments; Lori Nye, COO/Executive Director Customer Operations, Brewer Science; Ken Rygler, President, Rygler Associates (founder of Toppan Photomasks); Sima Salamati, VP, Fab Operations, imec; Hans Stork, CTO, ON Semiconductor Corporation; Aubrey Tobey, President, ACT International; Geoffrey Yeap, VP of Technology, Qualcomm Inc.; and Abe Yee, Sr. Director, Advanced Technology and Package Development, NVIDIA Corporation.

 The ConFab (June 12-15, 2016) is an executive-level conference and networking event for business leaders from the semiconductor manufacturing and design industry. The event features a high-level conference program, networking events and business meetings with purchasing decision makers and influencers. More information on The ConFab may be found at www.theconfab.com.