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Due to the growth of the semiconductor business, the wider adoption of Cu pillar solutions and the introduction of Flip Chip technology for LED and CMOS Image Sensors (CIS) applications, the Flip Chip market is expending. Under this context, more and more industrial companies including OSATs, IDMs IC foundries and bumping house undertake in this market.

The “More than Moore” market research and strategy consulting company Yole Développement (Yole) explored this industry and proposes today a detailed technology and market report, entitled “Flip Chip: Technologies & Market Trends”. Yole’s team is daily discussing with the leaders of the Advanced Packaging industry. Based on these interactions, the consulting company highlights the evolution of the technical needs and market trends. These major results make Yole’s analysts to think that full capacity should be reached in 2017.

What are the required investments to support this growth? Are there competitive technologies such as TSMC’s new solution, high-performance integrated fan-out wafer level packaging (InFO-WLP), that could answer the market needs and compete Flip Chip technology?

Under “Flip Chip: Technologies & Market Trends” report, Yole’s advanced packaging team provides an overview of Flip Chip technology and market trends. The company reviews the competitive landscape including player dynamics and key market trends; they also detail the Flip Chip market capacity and wafer forecast. Yole’s report also includes a detailed technology roadmap.

“Based on the discussions we had with the major advanced packaging companies, at Yole, we think that demand for Flip Chip is expected to reach the current maximum capacity in 2017,” said Santosh Kumar, Senior, Technology & Market Analyst, Advanced Packaging & Semiconductor Manufacturing at Yole. And he adds: “Therefore, new investment will be needed starting in 2018.”

Since Cu pillar processing can be performed by standard foundries and IDMs, the supply chain may see some slight modification. Yole’s analysts expect higher investment in Cu pillar 12” line wafer bumping lines from wafer foundries such as TSMC and SMIC. This change will affect OSATs’ wafer bumping revenue since foundries will gain market share.

OSATs will maintain their strong position in wafer bumping and assembly thanks to of their huge experience and low cost solutions. Their business model enables them to better control the supply chain, as they provide for the complete set of flip-chip services: package design and qualification, wafer bumping, substrate in-sourcing, assembly and final test.

However, big IDM companies like Intel and Samsung maintain their dominance in terms of wafer bumping capacity.

flip chip bump

“At Yole, we expect that even in 2020 Intel will remain the highest-capacity player in Cu pillar wafer bumping,” commented Thibault Buisson, Technology & Analyst, Advanced Packaging at Yole. Foundries and OSATs are also establishing joint ventures for wafer bumping to provide turnkey solutions to customers from chip fabrication to assembly at competitive cost.

And what about the Chinese companies? Do they have a role to play in the Flip Chip market? Chinese players are significantly increasing their presence in wafer bumping and Flip Chip assembly by mergers and acquisitions. JCET acquired STATS ChipPAC and FCI was acquired by Tianshui Huatian Technology Company.

In that context, Yole’s report, Flip Chip: Technologies & Market Trends report gives insights on the future strategies that players may adopt. A detailed description of this report is available on www.i-micronews.com, advanced packaging reports section.

Systematic – and predictive – cost reduction in semiconductor equipment manufacturing

BY TOM MARIANO, Foliage, Burlington, MA

After a period of double-digit growth, the semiconductor equipment industry has now stabilized to the point where recent market forecasts are predicting anemic single-digit growth rates. This is driven by total market demand from chipmakers. For example, despite strong growth of 12.9 percent in 2014, Gartner, Inc. projects worldwide semiconductor capital spending to only grow 0.8 percent in 2015, to $65.7 billion. [1] Additionally, this industry has always been subject to volatile demand cycles that are notoriously difficult to predict.

Translation: It’s extremely challenging for today’s semiconductor equipment manufacturers to improve their financial performance. There are fewer and fewer opportunities to grow topline revenue through innovation and new product development. And, after several years of cutting costs on existing products and not realizing enough cost reduction to improve margins, it’s difficult to know how to do it differently.

Yet a viable alternative to improve financial performance does exist: A disciplined, rigorous, and systematic approach to reducing costs that delivers more predictive results.

A systematic approach to cost reduction

Where cutting costs was once perceived as the end result of “desperate times, desperate measures,” many innovators are now using this approach much more proactively. By
meeting the idea of cost reduction head on – as an opportunity, not a last resort – many semiconductor equipment makers are uncovering wasteful, inefficient, and costly processes, often in areas they once overlooked. At this point, you may be thinking, “All of this sounds great, but what is a systematic approach to cost reduction, and how is it different from what I’m doing?”

Remember that many manufacturers (in all industries) tend to have a hard time driving costs down. They may set cost reduction goals and then attempt to achieve them using various ad hoc approaches. But they really need to understand exactly what their true costs are, where they exist, and which areas will improve their margins.

A systematic approach to cost reduction gives them this insight. With improved visibility into the entire organization, various processes, and how they execute, semiconductor equipment manufacturers can’t identify the right places to cut costs and hit their cost savings goals. This is a very detailed and planned approach in which organizations closely examine areas such as cost of goods sold, R&D, and service to make more informed decisions that will position their business for long-term success. This is the value of a systematic approach to cost reduction.

This approach also introduces the element of speed, helping equipment makers realize cost savings much faster than ad hoc cost-cutting initiatives and puts them on a path to achieve more predictive results. Beyond the positive (and more obvious) impact successful cost reduction has on a semiconductor equipment manufacturer’s bottom line, it also provides a number of significant benefits such as improving productivity, freeing up key personnel, and providing needed capital to fuel new growth.

The path to predictive results

Even if the concept of a more strategic approach to cutting costs sounds reasonable, many semiconductor equipment manufacturers struggle with how to begin and where to focus. All to often they resort to making reactive decisions regarding existing products without the necessary data, leading them to ask questions such as, “Should we have an obsolescence plan for this product?” “How much could we save?” and “Will this lead to bigger problems down the road?”

Without understanding where your best opportunities for cost cutting are, it’s a lot larder to predict when, and if, cost reduction goals will be met. A systematic approach to cost reduction includes establishing clear cost targets, communicating them to leadership, and measuring and reporting results along the way.

The first step is to engage with an outside firm that has a singular focus on cost reduction, and one that is clearly separated from day-to-day operations and current organizational dynamics. Such an engagement will yield an actionable list of improvements with specific cost targets, realistic timelines for achieving these goals, and future plans for reinvesting the cost savings.

More specifically, a systematic cost reduction approach will focus on three key areas: material costs, R&D costs, and service costs:

1. Material costs: The bill of materials is one of the most common ways to see all the components needed to produce the end product. But this goes well beyond the pure cost of materials. Research has shown that improving the way these components are managed can affect 80-90% of the product’s total costs.[2]

For semiconductor equipment manufacturers, the cost reduction process should start with the selection of the products or sub-assemblies that have the highest potential for savings. Focus on those products that are still generating significant revenue, but may not be receiving much attention in terms or engineering upgrades and enhancements. Thoroughly examine the bill of materials for these products by addressing materials, design, complexity reduction, the potential to create common assemblies, and more.

Value engineering efforts can simultaneously improve product functionality and performance while reducing bill of material costs. This effort should factor in ways to meet RoHS requirements and when to make end-of-life decisions for various electrical components to improve design efficiency and the effectiveness of the product.

A realistic cost reduction goal can then be created and a resulting value-engineering project can commence, often using low-cost offshore resources to best achieve those savings.

2. R&D costs: Making better decisions related to R&D processes and product development can shave considerable costs. Some areas to focus on include:

• When to officially end of life non-performing products
• When to consolidate products, or possibly even entire R&D departments
• When and how to move sustaining engineering efforts offshore, or to other lower-cost alternatives

The critical next step is to look at all products and all product variations to determine if an official end-of-life program should be employed. These decisions are notoriously hard to make and often require difficult conversations with key customers, but they are necessary nonetheless.

Many semiconductor equipment manufacturers have grown through acquisitions, creating redundant engineering groups that can be eliminated or downsized. Performing an organizational analysis of all R&D activities may uncover opportunities to consolidate and combine functions or create centers of excellence that focus on specific technical areas eliminating redundancies of technical specialty.

3. Service costs: Examine engineering and design processes to find ways to improve performance, reliability, and costs. For example, adding data collection technology or product diagnostics to enhance remote support efforts and predictive maintenance.

Improvement of product reliability is usually a large multiplier when it comes to service and spare parts costs. Collect and analyze field data to find the most significant issues driving service costs and then look to cut where possible.

For example, equipment in the field often does not have the capability to report enough information to effectively identify a problem. Adding increased data logging and communication can be used to clarify machine status and point services in the right direction. Connectivity can also help with remote diagnostics, all of which helps reduce costs, uptime, and customer satisfaction.

Cost Reduction as a Competitive Advantage

Short-term market forecasts will continue to make it challenging for semiconductor equipment manufacturers to deliver improved financial results. Yet the concept of a systematic approach to cost reduction is a proven way for them to proactively cut costs – in the right places – and also make better decisions related to existing products and other business systems and processes.

By taking a disciplined, rigorous, and objective look at any and all parts of their organization, semiconductor equipment makers can capitalize on new opportunities to free valuable resources, improve processes and future technology, and reinvest savings for future growth. For many equipment manufacturers the greatest obstacle to successfully exploiting these opportunities is insufficient experience and expertise with a disciplined and unconventional way of approaching cost reduction projects. A systematic approach to cost reduction will be the key to success for companies looking to improve their competitive advantage.

References

1. Gartner, Inc., “Gartner Says Worldwide Semiconductor Capital Spending to Increase 0.8 Percent in 2015: Conser- vative Investment Strategies Paving the Way to Slower Growth in 2015,” January 13, 2015. http://www.gartner. com/newsroom/id/2961017.

2. Forbes, “Product Lifecycle Management: A New Path to Shareholder Value?” August 5, 2011, http://www. forbes.com/sites/ciocentral/2011/08/05/product-lifecycle- management-a-new-path-to-shareholder-value/.

By Dr. Harry Zervos, Principal Analyst, IDTechEx

Flexible electronic devices are starting to experience significant proliferation, with more and more devices with innovative form factors being brought to market, from small components such as disposable sensors that have been in the market for quite some time now, all the way to new flexible smart phones currently being demonstrated by consumer electronics giants like Samsung and LG.

While printing technologies enable lower manufacturing costs and superior performance in many applications, vacuum deposition still claims significant market share in flexible electronics, although sometimes a combination of both can be the ideal combination.

From test strips to OLEDs 

Glucose test strips are a great example of the prevalence of both printed and vacuum deposited devices. Over ten billion test strips are being manufactured worldwide, in order to cater for the needs of the ever-increasing number of people living with diabetes. Although each manufacturer/brand has its own technology and design, the following cross-section shows the key parts of a test strip.  Manufacturers follow both thick film (screen printing) and thin film (sputtering) techniques for depositing the circuit in test strips, each of the techniques with its own merits.

Screen printing technology involves printing patterns of conductors and insulators onto the surface of planar solid (plastic or ceramic) substrates based on pressing the corresponding inks through a patterned mask. Each strip contains printed working and reference electrodes with the working one coated with the necessary reagents and membranes, with the reagents commonly dispensed by ink jet printing technology and deposited in the dry form. With thin film deposited electrodes, sputtering or laser ablation is commonly utilized. Lifescan for instance, a Johnson & Johnson company, mostly prints electrodes whereas Roche utilizes laser ablation in its Indianapolis plant. Along with the very specialized organic materials utilized in assays in the actively sensing part of the test strips, advanced devices integrating thin film technology utilize gold nanoparticles and mesoporous Pt electrodes, and even the use of carbon nanotubes and graphene has been demonstrated in certain designs.

OLED displays are a good example where the advent of printing techniques is meant to bring about much larger displays, manufactured at lower costs but for the time being, the OLED industry makes displays that are almost exclusively vacuum evaporated. Optimized solution processed materials are also becoming available but for now, vacuum deposited options perform better. Sunic, Aixtron, Canon Tokki and ULVAC are some of the companies that actively design and market equipment and materials for industrial vacuum technology in OLED applications.

Most of these companies, along with others such as Applied Materials are active in making more than just the active OLED layers, providing equipment for TFT deposition, encapsulation, etc.

The opportunity here is significant: The OLED market is meant to reach over $50bn in the next decade, with flexible and rigid plastic OLED displays surpassing 16 billion by 2020.

Flexible encapsulation & thin film PV

Encapsulation of flexible versions of OLED displays is set to become an exciting market: flexible barrier films – whether utilizing CVD or PVD processes or even in cases when ALD is utilized to make high quality, defect free layers- are hugely benefiting from vacuum deposition techniques and have created encapsulation materials that can reach the water vapor transmission rates required to allow flexible OLED displays the necessary lifetimes required to become commercially viable. Encapsulation for flexible OLED devices is a market that is expected to reach almost $340m by 2022 according to IDTechEx Research in the report “Barrier Layers for Flexible Electronics 2016-2026: Technologies, Markets, Forecasts”.

Flexible versions of thin film photovoltaics also require stringent encapsulation, but thin films have had harsh competition from low cost crystalline silicon cells from China, that have significantly reduced their market share in recent years. Just over 7% of the overall market for PV this year is expected to be thin-film based, according to research from SPV Research.

It is interesting to point out that manufacturing of all thin films for solar cell applications is fully vacuum based: PECVD for amorphous silicon platforms, sputtering or co-evaporation tends to be the preferred deposition techniques for CIGS technologies while CdTe leader First Solar has developed and optimized its own unique vacuum deposition technique, High Rate Vapor Transport Deposition (HRVTD). In this process, co-developed with NREL in an effort that started back in the early 1990’s, the material to be deposited is carried on a gas stream in powder form, then heated and vaporized as it passes through a membrane before depositing on a glass substrate. The technology can deposit a thin uniform layer of CdTe (or CdS, a common material system used as a buffer layer in CdTe cells) on 8 square feet of glass in less than 40 seconds, a deposition rate much higher than other rival thin film solar technologies that proved to be key in First Solar’s success in improving yield and output and consequently lower production costs for its thin film solar cells.

Conclusions 

The conclusion is simple: commercializing flexible or printed electronics will invariably require a deeper understanding of vacuum deposition technologies. Printing techniques are not the only manufacturing option that can allow for the freedom in design that the advent of flexibility in form factor is ushering in. In fact, vacuum deposition technologies are currently enabling the proliferation of a wide range of components and devices, from encapsulation films to thin flexible batteries to transparent conductive films and backplane elements. In many cases, having reached economies of scale, vacuum deposited devices have reached attractive cost structures that make it harder for printed versions to compete, having to “dig deep” in order to bring forward additional selling points than just reductions in cost.

Printed Electronics USA 2015 taking place in Santa Clara, CA on the 18th and 19th of November this year is going to focus on the importance of vacuum deposition, with both the conference as well as the trade show featuring contributions from end users, device manufacturers and manufacturing equipment suppliers of vacuum deposition technologies.

Cambridge, UK — November 9, 2015 — Xaar plc, a world leader in industrial inkjet technology, and Lawter, along with its parent company Harima Chemicals Group (HCG), announced a collaboration to optimize the performance of a line of nanosilver conductive inks in the Xaar 1002 industrial inkjet printhead. The combined solution will be of particular interest to manufacturers of consumer electronics goods looking for a robust and reliable method for printing antennas and sensors with silver nanoparticle ink as part of their manufacturing processes.

Industrial inkjet offers significant advantages over traditional print technologies to manufacturers of consumer electronics products. Inkjet is a cleaner process than other methods of printing silver inks; this is especially relevant when printing onto a substrate, such as a display, in which any yield loss is very expensive. With inkjet, manufacturers can very precisely control the amount of ink dispensed in certain areas of a pattern so that the ink or fluid deposited can be thicker in some areas and thinner in others. Similarly, inkjet enables the deposition of a much thinner layer of fluids than traditional methods, which is significant for the manufacturers looking to produce thinner devices. In addition, inkjet is one of the few technologies able to print a circuit over a substrate that has a structured surface.

“This is an excellent opportunity to showcase our latest technological breakthroughs and demonstrate the unique value that our revolutionary nanoparticle inkjet solutions can play as part of an integrated system solutions in the PE world,” says Dr. Arturo Horta Ph.D., Business Development Manager for Lawter Innovation Group.

HCG pioneered the development and manufacture of silver nanoparticle conductive inks for the printed electronics industry over 20 years ago and has over 100 patents related to its nanoparticle dispersion technology. This line of nanosilver conductive inks for inkjet printing offers a unique combination of low temperature sintering and high circuit conductivity. In addition, Lawter’s novel inks are compatible with a range of photonic curing tools as well as a variety of substrates.  These value-added features, together for the first time in a single product, provide increased project efficiency, decreased raw material costs and finer line printing.  All of this adds up to significant, quantifiable benefits for the end-user.

Xaar, also a major player in industrial manufacturing applications, has been delivering inkjet technology for 25 years. Its leading printhead, the Xaar 1002 is particularly suitable for Lawter’s nanosilver conductive inks due to the printhead’s unique TF Technology™ (fluid recirculation) which ensures a continuous flow of the heavy particulate in the ink to deliver uninterrupted high volume production printing.

“The applications that will benefit from the combination of Lawter’s nanosilver conductive inks and Xaar’s 1002 printhead are exciting,” says Keith Smith, Director of Advanced Manufacturing at Xaar. “We are seeing more and more that the consumer electronics market is looking for a printing solution that provides the quality of the Lawter ink and production reliability of the Xaar GS6 1002 to allow designers to make thinner devices.  The printhead and ink combination, along with photonic sintering, is unlocking mechanical and electrical designs never thought possible before.”

 

Plasma-Therm announced that it has acquired an innovative High Density Radical Flux plasma technology, which enables low-temperature Bosch polymer removal.

High Density Radical Flux — HDRF® —was developed by Nanoplas France as a superior plasma process for low-temperature removal of photoresists and organic polymer residues. These capabilities are especially important for device fabrication steps in the MEMS, LED, and advanced packaging markets.

Plasma-Therm is integrating HDRF technology into its existing suite of plasma etching, deposition, and wafer-dicing products. The Nanoplas-developed HDRF low-temperature photoresist stripping capability is also applicable to Bosch polymer removal after DRIE processing.

“We are eager to make the HDRF technology available to our existing customers and potential customers,” said Ed Ostan, vice president of marketing for Plasma-Therm. “HDRF fits very well into our etch and deposition product line, because this will allow Plasma-Therm to provide multi-step solutions to specialized device manufacturers for both R&D and production use.”

Plasma-Therm will also offer ongoing support to Nanoplas customers. The Nanoplas installed baseis primarily made up of DSB 6000 and DSB 9000 HDRF systems.

HDRF enables removal of photoresist, as well as organic polymers left on trench sidewalls following DRIE processes. These applications are sought for advanced packaging, MEMS, and power devices.

HDRF systems incorporate a multi-zone, remote, inductively coupled plasma (ICP) source, which produces up to 1,000 times greater chemical concentration than a conventional ICP source.

HDRF provides better performance than wet processing and regular plasma processing in terms of selectivity, low damage, flexibility, and high-aspect-ratio efficiency. HDRF provides superior polymer removal efficiency for high-aspect-ratio (greater than 50:1) structures.

With operating temperatures lower than 80° C., and with high selectivity to TiN, Al, Au, SiO2, and Si3N4, HDRF provides damage-free residue removal for ultra-sensitive devices.

Nanoplas introduced the semi-automatic DSB 6000 system in 2008. It was followed in 2011by the fully automatic 200mm DSB 9000 system, which accommodates one or two process modules. Both systems are capable of chemical downstream etching, stripping and cleaning applications. The company also designed the HDRF300 system for advanced cleans for 3D-IC fabrication. Nanoplas customers include global companies utilizing the systems in volume production, and also R&D and pilot line facilities, company officials said.

Fremont, Calif., October 29, 2015 – Soraa, a leader in the development of advanced lighting products and gallium nitride on gallium nitride (GaN on GaN™) LED technology, announced today that it will open a new semiconductor fabrication plant in Syracuse, New York. In partnership with the State of New York, the company will construct a new state-of-the-art GaN on GaN LED fabrication facility that will employ hundreds of workers. Working in coordination with SUNY College of Nanoscale Science and Engineering (SUNY Poly CNSE), the new facility is on pace for shell completion by the end of this year with production beginning in the second half of 2016. Soraa currently operates an LED fabrication plant in Fremont, California, one of only a few in the United States.

“Central New York’s economic growth is due in large part to high-tech companies like Soraa that recognize the region’s wealth of assets and resources,” Governor Cuomo said. “Today’s announcement not only means economic stability for the region, but it also strengthens Central New York as leader in the development of the clean technology that will help light and power the future.”

“Syracuse is an optimal location for the new fabrication facility for a number of reasons including the innovative high-tech vision and strategy of Governor Cuomo; the ability to attract some of the best and brightest scientists and engineers in the world; and the capacity to tightly control the product quality and intellectual property around our lighting products through our partnership with SUNY Poly CNSE,” commented Jeff Parker, CEO of Soraa. “Since we launched our first product in 2012, global market reception for our high quality of light LED products has been phenomenal and sales have soared. The new facility will significantly increase our manufacturing capacity to meet this growing demand.”

It was announced in late 2013 that Soraa would expand its manufacturing operations to the Riverbend Commerce Park in Buffalo, NY. The plans outlined sharing the space with solar module manufacturer, Silevo. However, following the acquisition of Silevo by SolarCity, the facilities at Riverbend could no longer accommodate both Soraa’s fabrication facility and the necessary square footage for SolarCity’s expanded operations. As a result, it was back to the drawing board.

“Following the change with the Riverbend space, we remained focused on finding an optimal solution that worked for the State, Soraa and the talented workers that call upstate New York home,” added Parker. “We’re back on track with a great location and are targeting to employ at least 300 people to support a revenue stream of over $1 billion once fully functional.”

“By taking Albany’s nanotechnology-based public-private economic development model across New York State, Governor Andrew Cuomo has established an unmatched engine for long-term growth, and this latest announcement is a perfect example of how his jobs-focused strategy continues to pay dividends,” said Dr. Alain E. Kaloyeros, President and CEO of SUNY Poly. “SUNY Poly is thrilled to partner with Soraa to locate this advanced manufacturing facility and its resultant jobs, as well as the hands-on educational offerings that this will present for New York’s students, adjacent to the Film Hub in Syracuse, where the company’s cutting edge lighting technology can be adapted for production purposes. Each component of this collaboration is further proof that the Governor’s unique vision for crafting commercialization and manufacturing-based opportunities is a powerful recipe for a resurgent New York.”

In 2007, a team of pioneering professors from the worlds of engineering and semiconductors—Dr. Shuji Nakamura, Nobel Laureate and inventor of the blue laser and LED; Dr. Steven DenBaars, founder of Nitres; and Dr. James Speck of U.C. Santa Barbara’s College of Engineering—came together and made a bet on an LED technology platform completely different than current industry practice, a technology most industry experts at the time considered to be impossible to execute.

Soraa bet that GaN on GaN LEDs would produce more light per area of LED, be of higher quality, and be more cost-effective than technology based on other foreign substrates like sapphire or silicon carbide. This strategy ran against every trend in the LED industry. That bet paid off: today, the company’s LEDs emit more light per LED material than any other LED; handle more electric current per area than any other LED; and the company’s products produce best-in-class color quality with full spectrum light similar to sun-light, while also delivering the brightest beams.

Tokyo, October 28, 2015 — Toshiba Corp. said Wednesday that it will retreat from the complementary metal oxide semiconductor, or CMOS, image sensor business, by selling the production line at its Oita plant to Sony Corp.

Toshiba plans to sell the CMOS sensor production facility by the March 31 end of fiscal 2015 at an estimated price of 20 billion yen. Some 1,100 employees from the image sensor business will be rehired by the Sony group.

Toshiba also announced its withdrawal during fiscal 2015 from the white light-emitting diode business as part of reforms of its discrete semiconductor chip operations.

Intensifying competition led Toshiba to suffer market share declines and losses in the image sensor and white LED businesses. The company believes that loss-making operations were a cause of its accounting scandal and aims to accelerate its business reconstruction efforts by reforming semiconductor operations.

The company will set up a new firm in April to integrate the Oita plant in southwestern Japan with Iwate Toshiba Electronics Co., a group firm based in Kitakami in northeastern Japan. The integration is aimed at boosting production efficiency for such large-scale integration chips as analog integrated circuits for in-vehicle devices.

Toshiba will not close the Oita plant and will keep operating five plants in Japan for its production of LSI and discrete chips.

For the reform of semiconductor chip operations, Toshiba will face a surplus workforce of some 1,200 employees who are not moving to Sony. It will seek early retirements and consider transfers to the Yokkaichi plant, a core facility making flash memory chips, and other factories.

The company aims to restore profitability in LSI and discrete chip operations in fiscal 2016 by cutting their fixed costs by about 26 billion yen from fiscal 2014.

According to a new market report published by Transparency Market Research “LED Driver and Chipset Market – Global Industry Analysis, Trend, Size, Share and Forecast, 2015 – 2021“, the global LED Driver and Chipset market was valued at US$2.80 billion in 2014 and is expected to reach US$11.99 billion by 2021, growing at a CAGR of 23.2% from 2015 to 2021.

The global LED Driver and Chipset market is primarily driven by increasing demand among the consumers for efficient power solution both in terms of display and lighting. LEDs outperform the traditional Cold Cathode Fluorescent Lamps (CCFLs) and Liquid Crystal Displays (LCDs) in term of size, energy efficiency, reliability and mechanical ruggedness both for displays and lighting applications. LEDs generate 100% of the National Television System Committee (NTSC) colors plus some extra colors in comparison with LCDs which generates only 70-80% of the NTSC colors. In addition, the operating cost of LEDs is low as compared to other lighting and display devices as LEDs produce more lumen per watt. Thus, more consumers are inclining towards the usage of LEDs which in turn is driving the growth of LED drivers and chipset market. Moreover, increasing awareness among the consumers regarding carbon footprints is also expected to fuel the demand of eco friendly LED devices which in turn is expected to boost the demand of LED Drivers and Chipsets offered by different LED product’s manufacturers. LEDs result in less carbon dioxide and Sulphur oxide emission (451 pound/ year) and help to keep the environment pollution free. Moreover, LEDs produces 90% less heat than incandescent and. CCFL bulbs.

The LED Driver and Chipset market is segmented on the basis of application and geography. The application segment is further bifurcated into display and lighting. By display, LED Driver and Chipset market is classified into: mobile phones, digital camera, television and navigation devices, medical devices, computer/laptop peripherals and others. Gaming devices, digital photo frames and MP3 players are included in the others segment. By lighting, the market can be segmented into outdoor areas and traffic signals, automotives, indoor lighting and commercial lighting among others. Geographically, the LED Driver and Chipset market has been segmented into North America, Europe, Asia-Pacific and Rest of the World (ROW).

Among the different applications, lighting segment was the fastest growing market in 2014. The market is predicted to grow at a CAGR of 24.1% from 2015 to 2021 and accounted for 20.1% of the overall revenue share of LED Driver and Chipset market. By geography, Asia Pacific held the largest market share and is expected to be the fastest growing market expanding at a CAGR of 23.4%. Asia Pacific is mainly driven by China and Japan. The government in this region has taken several steps to phase out the usage of conventional lighting and display technology to reduce carbon footprints. This in turn is expected to increases the sale of LED appliances and is predicted to drive the growth of LED Driver and Chipset market during the forecast period. Advanced Analogic Technologies Inc, Diodes Inc, Exar Corp and Ixys Corp among others are some of the major players operating in LED Driver and Chipset market.

Flip Chip technology is expected to reach $25 billion market value and wafer demand of 32 million (12” eq. wafers) in 2020, supported by the wider adoption of Cu pillar technology. That growth will be led by Moore’s law pushing beyond the 28nm node and “More than Moore” evolution in next generation DDR and 3DICs.

flipchip_marketfigures_yole_oct2015_433x280The “More than Moore” market research and strategy consulting company Yole Développement’s (Yole) new analysis is entitled Flip Chip Technologies & Markets Trends (October 2015, Yole Développement). In this new report, Yole proposes a deep-added value analysis of the Flip Chip markets, players’ dynamics, and key trends. The consulting company highlights the key market figures and presents future Flip Chip strategy evolution and opportunities. Strongly linked to the Cu pillar technology, Flip Chip solutions have been largely adopted towards the mobile-wireless, consumer and computing applications, including continuous growth in the LED and CMOS Image Sensor (CIS) segments.

“Flip Chip assembly technology provides various benefits such as high I/O counts, fine pitch interconnection, and superior electrical and thermal performance,” explains Thibault Buisson, Technology & Market Analyst, Advanced Packaging at Yole. And he adds: “This drives its application across specific segments.”

The maximum growth in flip-chip bumping capacity will come from Cu pillars, driven by the finer pitches, higher I/O counts, lithography nodes below 28nm, emergence of 2.5D/3D packaging, increased current density and thermal dissipation needs. In the meantime lead-free solder bumping is expected to grow at just 2% CAGR as OSATs and foundries converting their existing solder bumping lines to Cu pillar lines. With the scaling of the Flip Chip pitch, OSATs are presently pushing the envelope of C2 mass reflow bonding with capillary underfill to pitches as low as 50µm by formulating engineered materials and improving assembly processes. However, if the pitch reaches or falls below 40µm Thermo Compression Bonding (TCB) will be the key option because of its high placement accuracy.

TCB will be adopted first in high volume manufacturing by IDMs like Intel, who can bear the high cost of ownership, followed by memory suppliers for their next generation memories based on through-silicon via technology.

“Intel has recently qualified ASM’s high throughput TCB bonder for assembly of 14nm chips for their CPUs in applications such as data centers, servers, and high-end computing”, comments Santosh Kumar, Senior Technology & Market Analyst, Advanced Packaging at Yole. And he adds: “At Yole, we estimate Flip Chip bonders’ total market value will reach US$435 million in 2020, with a CAGR of 7%. Flip Chip bonders and underfill materials will become key in coming years.”

Transparency Market Research (TMR), a market intelligence company based in the U.S., projects the global organic electronics market to grow at a CAGR of 32.6% from 2012 to 2018. The report, titled “Organic Electronics Market – Global Industry Analysis, Market Size, Share, Growth and Forecast 2012-2018”, is available on the company website for sale. The TMR study points out that the organic electronics market has tremendous potential in the fields of display technologies and electronic circuits, and is expected to register high growth rates in the coming years. The growth of the organic electronics market will be boosted by a combination of OLED lighting, OLED displays, OFRID, and organic photovoltaics.

As per the TMR study, the displays segment held the largest share of the organic electronics market. For the purpose of the study, the displays segment is segregated into electrophoretic, OLED displays, and other displays. Of these, OLED displays are projected to lead the organic electronics market and are projected to be worth US$10,450 million by 2018. This is due to their low energy consumption, high-speed performance, and sharp display features. Further, the study found the electrophoretic sub-segment is projected to be worth US$3,950 million by 2018, growing at a CAGR of 58.4% for the study period. Additionally, the continuous expansion of end-use applications beyond OLED lighting, OLED displays, and organic photovoltaics (OPV) is responsible for the robust growth of the global organic electronics market, as per the study analysis. Moreover, RFID labels and logic and memory are increasingly becoming the prime focus for OE manufacturers due to the high usage of these segments in the organic electronics market.

TMR’s findings show organic electronics will mostly be newly created rather than used as a replacement for other existing electronics, which will drive the growth of the market. Moreover, organic electronics, in spite of being capable of complemented with conventional silicon electronics, have the ability to produce flexible circuits. Owing to this trait, organic electronics have a rapidly increasing application base for flexible displays such as intelligent textiles, RFID labels, e-paper, bio-sensors, and intelligent packaging.

For the purpose of the study, the global organic electronics market is segmented into Asia Pacific, the U.S., Europe, and Rest of the World (RoW). In the geographical scenario, Asia Pacific is expected to lead the organic electronics market by revenue till 2018. As per the TMR research findings, Asia Pacific will boast a 50% share of the total revenue of the global organic electronics market in 2018 and will be followed by Europe.