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If you can’t find the ideal material, then design a new one.

Northwestern University’s James Rondinelli uses quantum mechanical calculations to predict and design the properties of new materials by working at the atom-level. His group’s latest achievement is the discovery of a novel way to control the electronic band gap in complex oxide materials without changing the material’s overall composition. The finding could potentially lead to better electro-optical devices, such as lasers, and new energy-generation and conversion materials, including more absorbent solar cells and the improved conversion of sunlight into chemical fuels through photoelectrocatalysis.

“There really aren’t any perfect materials to collect the sun’s light,” said Rondinelli, assistant professor of materials science and engineering in the McCormick School of Engineering. “So, as materials scientists, we’re trying to engineer one from the bottom up. We try to understand the structure of a material, the manner in which the atoms are arranged, and how that ‘genome’ supports a material’s properties and functionality.”

The electronic band gap is a fundamental material parameter required for controlling light harvesting, conversion, and transport technologies. Via band-gap engineering, scientists can change what portion of the solar spectrum can be absorbed by a solar cell, which requires changing the structure or chemistry of the material.

Current tuning methods in non-oxide semiconductors are only able to change the band gap by approximately one electronvolt, which still requires the material’s chemical composition to become altered. Rondinelli’s method can change the band gap by up to 200 percent without modifying the material’s chemistry. The naturally occurring layers contained in complex oxide materials inspired his team to investigate how to control the layers. They found that by controlling the interactions between neutral and electrically charged planes of atoms in the oxide, they could achieve much greater variation in electronic band gap tunability.

“You could actually cleave the crystal and, at the nanometer scale, see well-defined layers that comprise the structure,” he said. “The way in which you order the cations on these layers in the structure at the atomic level is what gives you a new control parameter that doesn’t exist normally in traditional semiconductor materials.”

By tuning the arrangement of the cations–ions having a net positive, neutral, or negative charge–on these planes in proximity to each other, Rondinelli’s team demonstrated a band gap variation of more than two electronvolts. “We changed the band gap by a large amount without changing the material’s chemical formula,” he said. “The only difference is the way we sequenced the ‘genes’ of the material.”

Supported by DARPA and the US Department of Energy, the research is described in the paper “Massive band gap variation in layered oxides through cation ordering,” published in the January 30 issue of Nature Communications. Prasanna Balachandran of Los Alamos National Laboratory in New Mexico is coauthor of the paper.

Arranging oxide layers differently gives rise to different properties. Rondinelli said that having the ability to experimentally control layer-by-layer ordering today could allow researchers to design new materials with specific properties and purposes. The next step is to test his computational findings experimentally.

Rondinelli’s research is aligned with President Barack Obama’s Materials Genome Initiative, which aims to accelerate the discovery of advanced materials to address challenges in energy, healthcare, and transportation.

“Today it’s possible to create digital materials with atomic level precision,” Rondinelli said. “The space for exploration, however, is enormous. If we understand how the material behavior emerges from building blocks, then we make that challenge surmountable and meet one of the greatest challenges today–functionality by design.”

Sound waves passing through the air, objects that break a body of water and cause ripples, or shockwaves from earthquakes all are considered “elastic” waves. These waves travel at the surface or through a material without causing any permanent changes to the substance’s makeup. Now, engineering researchers at the University of Missouri have developed a material that has the ability to control these waves, creating possible medical, military and commercial applications with the potential to greatly benefit society.

“Methods of controlling and manipulating subwavelength acoustic and elastic waves have proven elusive and difficult; however, the potential applications–once the methods are refined–are tremendous,” said Guoliang Huang, associate professor of mechanical and aerospace engineering in the College of Engineering at MU. “Our team has developed a material that, if used in the manufacture of new devices, could have the ability to sense sound and elastic waves. By manipulating these waves to our advantage, we would have the ability to create materials that could greatly benefit society–from imaging to military enhancements such as elastic cloaking–the possibilities truly are endless.”

In the past, scientists have used a combination of materials such as metal and rubber to effectively ‘bend’ and control waves. Huang and his team designed a material using a single component: steel. The engineered structural material possesses the ability to control the increase of acoustical or elastic waves. Improvements to broadband signals and super-imaging devices also are possibilities.

The material was made in a single steel sheet using lasers to engrave “chiral,” or geometric microstructure patterns, which are asymmetrical to their mirror images. It’s the first such material to be made out of a single medium. Huang and his team intend to introduce elements they can control that will prove its usefulness in many fields and applications.

“In its current state, the metal is a passive material, meaning we need to introduce other elements that will help us control the elastic waves we send to it,” Huang said. “We’re going to make this material much more active by integrating smart materials like microchips that are controllable. This will give us the ability to effectively ‘tune in’ to any elastic sound or elastic wave frequency and generate the responses we’d like; this manipulation gives us the means to control how it reacts to what’s surrounding it.”

Going forward, Huang said there are numerous possibilities for the material to control elastic waves including super-resolution sensors, acoustic and medical hearing devices, as well as a “superlens” that could significantly advance super-imaging, all thanks to the ability to more directly focus the elastic waves.

University of Wisconsin-Madison materials engineers have made a significant leap toward creating higher-performance electronics with improved battery life — and the ability to flex and stretch.

Led by materials science Associate Professor Michael Arnold and Professor Padma Gopalan, the team has reported the highest-performing carbon nanotube transistors ever demonstrated. In addition to paving the way for improved consumer electronics, this technology could also have specific uses in industrial and military applications.

In a paper published recently in the journal ACS Nano, Arnold, Gopalan and their students reported transistors with an on-off ratio that’s 1,000 times better and a conductance that’s 100 times better than previous state-of-the-art carbon nanotube transistors.

“Carbon nanotubes are very strong and very flexible, so they could also be used to make flexible displays and electronics that can stretch and bend, allowing you to integrate electronics into new places like clothing,” says Arnold. “The advance enables new types of electronics that aren’t possible with the more brittle materials manufacturers are currently using.”

Carbon nanotubes are single atomic sheets of carbon rolled up into a tube. As some of the best electrical conductors ever discovered, carbon nanotubes have long been recognized as a promising material for next-generation transistors, which are semiconductor devices that can act like an on-off switch for current or amplify current. This forms the foundation of an electronic device.

However, researchers have struggled to isolate purely semiconducting carbon nanotubes, which are crucial, because metallic nanotube impurities act like copper wires and “short” the device. Researchers have also struggled to control the placement and alignment of nanotubes. Until now, these two challenges have limited the development of high-performance carbon nanotube transistors.

Building on more than two decades of carbon nanotube research in the field, the UW-Madison team drew on cutting-edge technologies that use polymers to selectively sort out the semiconducting nanotubes, achieving a solution of ultra-high-purity semiconducting carbon nanotubes.

Previous techniques to align the nanotubes resulted in less-than-desirable packing density, or how close the nanotubes are to one another when they are assembled in a film. However, the UW-Madison researchers pioneered a new technique, called floating evaporative self-assembly, or FESA, which they described earlier in 2014 in the ACS journal Langmuir. In that technique, researchers exploited a self-assembly phenomenon triggered by rapidly evaporating a carbon nanotube solution.

The team’s most recent advance also brings the field closer to realizing carbon nanotube transistors as a feasible replacement for silicon transistors in computer chips and in high-frequency communication devices, which are rapidly approaching their physical scaling and performance limits.

“This is not an incremental improvement in performance,” Arnold says. “With these results, we’ve really made a leap in carbon nanotube transistors. Our carbon nanotube transistors are an order of magnitude better in conductance than the best thin film transistor technologies currently being used commercially while still switching on and off like a transistor is supposed to function.”

The researchers have patented their technology through the Wisconsin Alumni Research Foundation and have begun working with companies to accelerate the technology transfer to industry.

Today, we’re surrounded by a variety of electronic devices that are moving increasingly closer to us – we can attach and wear them, or even implant electronics inside our bodies.

Many types of smart devices are readily available and convenient to use. The goal now is to make wearable electronics that are flexible, sustainable and powered by ambient renewable energy.

This last goal inspired a group of Korea Advanced Institute of Science and Technology (KAIST) researchers to explore how the attractive physical features of zinc oxide (ZnO) materials could be more effectively used to tap into abundant mechanical energy sources to power micro devices. They discovered that inserting aluminum nitride insulating layers into ZnO-based energy harvesting devices led to a significant improvement of the devices’ performance. The researchers report their findings in the journal Applied Physics Letters, from AIP Publishing.

“Mechanical energy exists everywhere, all the time, and in a variety of forms – including movement, sound and vibration. The conversion from mechanical energy to electrical energy is a reliable approach to obtain electricity for powering the sustainable, wireless and flexible devices – free of environmental limitations,” explained Giwan Yoon, a professor in the Department of Electrical Engineering at KAIST.

Piezoelectric materials such as ZnO, as well as several others, have the ability to convert mechanical energy to electrical energy, and vice versa. “ZnO nanostructures are particularly suitable as nanogenerator functional elements, thanks to their numerous virtues including transparency, lead-free biocompatibility, nanostructural formability, chemical stability, and coupled piezoelectric and semiconductor properties,” noted Yoon.

The key concept behind the group’s work? Flexible ZnO-based micro energy harvesting devices, aka “nanogenerators,” can essentially be comprised of piezoelectric ZnO nanorod or nanowire arrays sandwiched between two electrodes formed on the flexible substrates. In brief, the working mechanisms involved can be explained as a transient flow of electrons driven by the piezoelectric potential.

“When flexible devices can be easily mechanically deformed by various external excitations, strained ZnO nanorods or nanowires tend to generate polarized charges, which, in turn, generate piezoelectronic fields,” said Yoon. “This allows charges to accumulate on electrodes and it generates an external current flow, which leads to electronic signals. Either we can use the electrical output signals directly or store them in energy storage devices.”

Other researchers have reported that the use of insulating materials can help provide an extremely large potential barrier. “This makes it critically important that insulating materials are carefully selected and designed – taking both the material properties and the device operation mechanism into consideration,” said Eunju Lee, a postdoctoral researcher in Yoon’s group.

To date, however, there have been few efforts made to develop new insulating materials and assess their applicability to nanogenerator devices or determine their effects on the device output performance.

The KAIST researchers proposed, for the first time, new piezoelectric ZnO/aluminum nitride (AlN) stacked layers for use in nanogenerators.

“We discovered that inserting AlN insulating layers into ZnO-based harvesting devices led to a significant improvement of their performance – regardless of the layer thickness and/or layer position in the devices,” said Lee. “Also, the output voltage performance and polarity seem to depend on the relative position and thickness of the stacked ZnO and AlN layers, but this needs to be explored further.”

The group’s findings are expected to provide an effective approach for realizing highly energy-efficient ZnO-based micro energy harvesting devices. “This is particularly useful for self-powered electronic systems that require both ubiquity and sustainability – portable communication devices, healthcare monitoring devices, environmental monitoring devices and implantable medical devices,” pointed out Yoon. And there are potentially many other applications.

Next up, Yoon and colleagues plan to pursue a more in-depth study to gain a much more precise and comprehensive understanding of device operation mechanisms. “We’ll also explore the optimum device configurations and dimensions based on the operation mechanism analysis work,” he added.

Chinese IC manufacturer Shanghai Huali Microelectronics Corporation gave a presentation on its outlook for the Internet of Things (IoT) market and the wide application of its specialty technology at the 2014 China Semiconductor Industry Association IC Design Branch Annual Conference (“ICCAD”), which was recently held at Hong Kong Science Park.

As a keynote speaker at the event, Henry Liu, senior director of marketing at HLMC, said, “With the development of smart automotive, smart grid, smart home and smart medical services, among other sectors, coupled with the pursuit among the general population of a simpler lifestyle and more efficient management of one’s day to day affairs, IoT has become the new hot topic of the market. The development of the market is set to further promote the prosperity of the semiconductor industry as semiconductor components are the basic core and data gateway of IoT equipment.”

According to Cisco IBSG, IoT connections worldwide are expected to reach 50 billion units, a milestone that is expected to have a profound impact on both consumers and vendors around the world. Currently, many of the world’s leading IC producers are accelerating expansion into the IoT sector in preparation for building their own ecosystem.

As one of the most advanced 12-inch wafer foundries in mainland China, HLMC’s technology starts from 55nm technology node and mainly covers 55nm LP, 40nm LP and 28nm LP as well as 55nm HV, 55nm eFlash and specialty technology. HLMC provides customers with low-cost wafer foundry solutions.  During the annual event, Chris Shao, senior director of Technology Development Division 1 at HLMC, shared features of the 55nm embedded flash technology with attendees. The 55nm embedded flash technology, one of the company’s core process platforms, provides the following advantages:

  • Core device: 1.2V; IO device: 2.5V or 5V; low working voltage and power consumption
  • Embedded SONOS technology based on standard COMS process without any need to change features and model of standard device
  • Complete retention of 55nm low power logic process-based IP bank
  • Only three additional layers of photomask are required for application of SONOS technology based on standard CMOS process, compared with 9-12 layers when using others processes, lowering manufacturing costs
  • Continuous downscaling to more advanced process nodes

Looking back the year of 2014, the IC manufacturing industry has made several great achievements: the industry’s sub-sector wafer foundry is on track to having a record year in terms of output value, as a result of the introduction of new mobile communication products and demands for special manufacturing processes used for IoT devices. The semiconductor facilities benefitting from IoT are expected to grow more rapidly than the overall semiconductor industry. Cisco IBSG estimates that 50 billion IoT products will be in existence by 2020, generating an output value of USD 14.4 trillion. Henry Liu stressed that HLMC is optimistic about the future of IoT and expressed confidence that the Company’s excellent manufacturing abilities and reliable quality management will serve to assure that it will be able to provide Chinese IC designers as well as customers worldwide with low-cost wafer foundry solutions for the IoT applications sector, including smartphones, tablets, smart TVs, set-top boxes, banking cards and automotive electronics.

MEMSensing Microsystems Co. and Semiconductor Manufacturing International Corporation jointly announced the launch of the world’s smallest 3-axis accelerometer MSA330, which utilizes SMIC’s CMOS integrated MEMS device fabrication and TSV-based wafer level packaging technologies.

By vertically integrating the 3-axis accelerometer device with CMOS ASIC into a single package of 1.075×1.075×0.60mm3 (LxWxH), MSA330 achieves about 30% shrink in footprint and 70% reduction in the total size compared to the latest commercial products. It is also the thinnest of its kind, only 0.5mm after SMT and 0.6mm in total height including 0.2mm solder balls. MSA330 would be competitive not only in overall fabrication costs through all wafer level fabrication and packaging but also in miniaturization particularly for mobile and wearable applications.

“The success in MSA330 signifies SMIC the major breakthrough achieved in its fabrication of CMOS integrated MEMS devices and TSV-based wafer level packaging technologies, which is expected to enter commercial production within 2015. Such accomplishment would further benefit SMIC in broadening its manufacturing capabilities and foundry services into fabricating MEMS devices and wafer level packaging open to global MEMS customers,” said Dr. Shiuh-Wuu Lee, Executive Vice President of Technology Development of SMIC.

“MEMSensing is SMIC’s 1st domestic MEMS customer, and also one of its earliest customers worldwide which can be dated back to as early as 2009. MSA330 is the world’s 1st MEMS accelerometer enabled by WLCSP (Wafer Level Chip Scale Packaging), which is based on WLP and TSV technology. This approach belongs to the latest generation for MEMS accelerometer fabrication while other competitors are still lagging one step behind. The success for MSA330 product development proves that MEMSensing has now broadened its MEMS sensor product portfolio beyond the existing MEMS microphone and pressure sensors. We plan to allocate more resources to cooperate with SMIC to develop other advanced products and make an effort to further enrich China’s domestic MEMS industry chain,” said Dr. Li Gang, CEO of MEMSensing.

In a sub-basement deep below the Laboratory for Integrated Science and Engineering at Harvard University, Mikhail Kats gets dressed. Mesh shoe covers, a face mask, a hair net, a pale gray jumpsuit, knee-high fabric boots, vinyl gloves, safety goggles, and a hood with clasps at the collar–these are not to protect him, Kats explains, but to protect the delicate equipment and materials inside the cleanroom.

While earning his Ph.D. in applied physics at the Harvard School of Engineering and Applied Sciences, Kats has spent countless hours in this cutting-edge facility. With his adviser, Federico Capasso, the Robert L. Wallace Professor of Applied Physics and Vinton Hayes Senior Research Fellow in Electrical Engineering, Kats has contributed to some stunning advances.

One is a metamaterial that absorbs 99.75 percent of infrared light–very useful for thermal imaging devices. Another is an ultrathin, flat lens that focuses light without imparting the distortions of conventional lenses. And the team has produced vortex beams, light beams that resemble a corkscrew, that could help communications companies transmit more data over limited bandwidth.

Certainly the most colorful advance to emerge from the Capasso lab, however, is a technique that coats a metallic object with an extremely thin layer of semiconductor, just a few nanometers thick. Although the semiconductor is a steely gray color, the object ends up shining in vibrant hues. That’s because the coating exploits interference effects in the thin films; Kats compares it to the iridescent rainbows that are visible when oil floats on water. Carefully tuned in the laboratory, these coatings can produce a bright, solid pink–or, say, a vivid blue–using the same two metals, applied with only a few atoms’ difference in thickness.

Capasso’s research group announced the finding in 2012, but at that time, they had only demonstrated the coating on relatively smooth, flat surfaces like silicon. This fall, the group published a second paper, in the journal Applied Physics Letters, taking the work much further.

“I cut a piece of paper out of my notebook and deposited gold and germanium on it,” Kats says, “and it worked just the same.”

That finding, deceptively simple given the physics involved, now suggests that the ultrathin coatings could be applied to essentially any rough or flexible material, from wearable fabrics to stretchable electronics.

“This can be viewed as a way of coloring almost any object while using just a tiny amount of material,” Capasso says.

It was not obvious that the same color effects would be visible on rough substrates, because interference effects are usually highly sensitive to the angle of light. And on a sheet of paper, Kats explains, “There are hills and valleys and fibers and little things sticking out–that’s why you can’t see your reflection in it. The light scatters.”

On the other hand, the applied films are so extremely thin that they interact with light almost instantaneously, so looking at the coating straight on or from the side–or, as it turns out, looking at those rough imperfections in the paper–doesn’t make much difference to the color. And the paper remains flexible, as usual.

Demonstrating the technique in the cleanroom at the Center for Nanoscale Systems, a National Science Foundation-supported research facility at Harvard, Kats uses a machine called an electron beam evaporator to apply the gold and germanium coating. He seals the paper sample inside the machine’s chamber, and a pump sucks out the air until the pressure drops to a staggering 10^-6 Torr (a billionth of an atmosphere). A stream of electrons strikes a piece of gold held in a carbon crucible, and the metal vaporizes, traveling upward through the vacuum until it hits the paper. Repeating the process, Kats adds the second layer. A little more or a little less germanium makes the difference between indigo and crimson.

This particular lab technique, Kats points out, is unidirectional, so to the naked eye very subtle differences in the color are visible at different angles, where slightly less of the metal has landed on the sides of the paper’s ridges and valleys. “You can imagine decorative applications where you might want something that has a little bit of this pearlescent look, where you look from different angles and see a different shade,” he notes. “But if we were to go next door and use a reactive sputterer instead of this e-beam evaporator, we could easily get a coating that conforms to the surface, and you wouldn’t see any differences.”

Many different pairings of metal are possible, too. “Germanium’s cheap. Gold is more expensive, of course, but in practice we’re not using much of it,” Kats explains. Capasso’s team has also demonstrated the technique using aluminum.

“This is a way of coloring something with a very thin layer of material, so in principle, if it’s a metal to begin with, you can just use 10 nanometers to color it, and if it’s not, you can deposit a metal that’s 30 nm thick and then another 10nm. That’s a lot thinner than a conventional paint coating that might be between a micron and 10 microns thick.”

In those occasional situations where the weight of the paint matters, this could be very significant. Capasso remembers, for example, that the external fuel tank of NASA’s space shuttle used to be painted white. After the first two missions, engineers stopped painting it and saved 600 pounds of weight.

Because the metal coatings absorb a lot of light, reflecting only a narrow set of wavelengths, Capasso suggests that they could also be incorporated into optoelectronic devices like photodetectors and solar cells.

“The fact that these can be deposited on flexible substrates has implications for flexible and maybe even stretchable optoelectronics that could be part of your clothing or could be rolled up or folded,” Capasso says.

Harvard’s Office of Technology Development continues to pursue commercial opportunities for the new color coating technology and welcomes contact from interested parties.

Kats, who concludes his year-long postdoctoral research position at SEAS this month, will become an assistant professor at the University of Wisconsin, Madison, in January. He credits those many hours spent in Harvard’s state-of-the-art laboratory facilities for much of his success in applied physics.

“You learn so much while you’re doing it,” Kats says. “You can be creative, discover something along the way, apply something new to your research. It’s marvelous that we have students and postdocs down here making things.”

A door has been opened to low-power off/on switches in micro-electro-mechanical systems (MEMS) and nanoelectronic devices, as well as ultrasensitive bio-sensors, with the first observation of piezoelectricity in a free standing two-dimensional semiconductor by a team of researchers with the U.S. Department of Energy (DOE)’s Lawrence Berkeley National Laboratory (Berkeley Lab).

Xiang Zhang, director of Berkeley Lab’s Materials Sciences Division and an international authority on nanoscale engineering, led a study in which piezoelectricity – the conversion of mechanical energy into electricity or vice versa – was demonstrated in a free standing single layer of molybdenum disulfide, a 2D semiconductor that is a potential successor to silicon for faster electronic devices in the future.

“Piezoelectricity is a well-known effect in bulk crystals, but this is the first quantitative measurement of the piezoelectric effect in a single layer of molecules that has intrinsic in-plane dipoles,” Zhang says. “The discovery of piezoelectricity at the molecular level not only is fundamentally interesting, but also could lead to tunable piezo-materials and devices for extremely small force generation and sensing.”

Zhang, who holds the Ernest S. Kuh Endowed Chair at the University of California (UC) Berkeley and is a member of the Kavli Energy NanoSciences Institute at Berkeley, is the corresponding author of a paper in Nature Nanotechnology describing this research. The paper is titled “Observation of Piezoelectricity in Free-standing Monolayer MoS2.” The co-lead authors are Hanyu Zhu and Yuan Wang, both members of Zhang’s UC Berkeley research group. (See below for a complete list of co-authors.)

Since its discovery in 1880, the piezoelectric effect has found wide application in bulk materials, including actuators, sensors and energy harvesters. There is rising interest in using nanoscale piezoelectric materials to provide the lowest possible power consumption for on/off switches in MEMS and other types of electronic computing systems. However, when material thickness approaches a single molecular layer, the large surface energy can cause piezoelectric structures to be thermodynamically unstable.

Over the past couple of years, Zhang and his group have been carrying out detailed studies of molybdenum disulfide, a 2D semiconductor that features high electrical conductance comparable to that of graphene, but, unlike graphene, has natural energy band-gaps, which means its conductance can be switched off.

“Transition metal dichalcogenides such as molybdenum disulfide can retain their atomic structures down to the single layer limit without lattice reconstruction, even in ambient conditions,” Zhang says. “Recent calculations predicted the existence of piezoelectricity in these 2D crystals due to their broken inversion symmetry. To test this, we combined a laterally applied electric field with nano-indentation in an atomic force microscope for the measurement of piezoelectrically-generated membrane stress.”

Zhang and his group used a free-standing molybdenum disulfide single layer crystal to avoid any substrate effects, such as doping and parasitic charge, in their measurements of the intrinsic piezoelectricity. They recorded a piezoelectric coefficient of 2.9×10-10 C/m, which is comparable to many widely used materials such as zinc oxide and aluminum nitride.

“Knowing the piezoelectric coefficient is important for designing atomically thin devices and estimating their performance,” says Nature paper co-lead author Zhu. “The piezoelectric coefficient we found in molybdenum disulfide is sufficient for use in low-power logic switches and biological sensors that are sensitive to molecular mass limits.”

Zhang, Zhu and their co-authors also discovered that if several single layers of molybdenum disulfide crystal were stacked on top of one another, piezoelectricity was only present in the odd number of layers (1,3,5, etc.)

“This discovery is interesting from a physics perspective since no other material has shown similar layer-number sensitivity,” Zhu says. “The phenomenon might also prove useful for applications in which we want devices consisting of as few as possible material types, where some areas of the device need to be non-piezoelectric.”

In addition to logic switches and biological sensors, piezoelectricity in molybdenum disulfide crystals might also find use in the potential new route to quantum computing and ultrafast data-processing called “valleytronics.” In valleytronics, information is encoded in the spin and momentum of an electron moving through a crystal lattice as a wave with energy peaks and valleys.

“Some types of valleytronic devices depend on absolute crystal orientation, and piezoelectric anisotropy can be employed to determine this,’ says Nature paper co-lead author Wang. “We are also investigating the possibility of using piezoelectricity to directly control valleytronic properties such as circular dichroism in molybdenum disulfide.”

Cross section sample preparation is demonstrated using a workflow that combines High Accuracy Cleaving I(HAC) and Broad Ion Beam (BIB) milling.

By TESHIMA, LatticeGear, Beaverton, OR and JAMIL J. CLARKE, Hitachi High Technologies America, Inc., Clarksburg, MD 

In order to develop and manufacture new materials and processes, the cross section is essential (FIGURE 1). Cross sections allow one to visualize, measure, and characterize the chemistry of the film stack or device structures. This allows engineers to verify the integrity of devices and to make critical decisions about the process. To be able to provide this data, manufacturers and equipment suppliers invest close to a billion dollars annually [1] to purchase equipment for off-line use and out- of-fab support labs.

FIGURE 1. Cross section of a fully processed microprocessor prepared by high accuracy cleaving and flat milling

FIGURE 1. Cross section of a fully processed microprocessor prepared by high accuracy cleaving and flat milling

Because such labs are not considered a “make wafer” function, lab managers are under constant pressure to reduce costs, both per sample and for lab operations. This paper demonstrates cross section sample preparation using a workflow that combines High Accuracy Cleaving (HAC) and Broad Ion Beam (BIB) milling. Coupling these techniques, which are relatively low in cost when compared to Focused Ion Beam (FIB) or automated polishing or cleaving [2], reduces sample preparation time, complexity, and cost without sacrificing cross-section quality. The LatticeAxTM HAC and the Hitachi IM4000 BIB milling tools were used to demonstrate this process and are also described.

Preparing cross sections for SEM analysis

Characterization of semiconductor structures and material properties commonly begins with sample preparation. Semiconductor samples are inspected either as a cross section or “top down.” Cross-section samples are needed to inspect layers of subsurface features. As shown in FIGURE 2, if a cross-section view is required and the original sample is a wafer or a die, cleaving is typically the first step in the sample preparation procedure.

FIGURE 2. Wafers and wafer pieces enter a cross- section workflow that starts with cleaving and then follows a single- or multi-tool sample preparation process.

FIGURE 2. Wafers and wafer pieces enter a cross- section workflow that starts with cleaving and then follows a single- or multi-tool sample preparation process.

In many cases, the sample can proceed directly to the Scanning Electron Microscope (SEM) as shown in the Single-Tool workflow. For fully processed devices and those with large metal structures, improving surface quality with another method enhances the results (see Multi-Tool workflow).

Advanced techniques used in the multi-tool workflow, such as FIB and automated polishing, have benefits in terms of submicron—or in the case of FIB, nanometer—targeting accuracy, but the tradeoff is high cost, long cycle time, and the need for skilled operators.

Methods

The following sections describe the techniques used to perform multi-tool, cross-section sample prepa- ration workflow using HAC and BIB milling.

High Accuracy Cleaving An accurate and high quality cleave is critical to preparing a cross section for SEM imaging regardless of whether it follows the single- or multi-tool workflow. Manual cleaving, in which you scribe a line and then break the sample along the fracture over a raised edge or pin, has inherent problems with accuracy and repeatability. In addition, because the user handles the sample with fingers that are often gloved, great skill is required to achieve good results. FIGURE 3a shows traditional scribing hand tools used in manual cleaving. Cleaving results using these tools are obviously dependent on the hand-eye coordination of the operator.

FIGURE 3a. Hand tools commonly used for cleaving semiconductor materials

FIGURE 3a. Hand tools commonly used for cleaving semiconductor materials

Figure 3b

Figure 3b

The LatticeAx process overcomes these disadvantages by controlling the indent location and depth, as well as the cleaving operation, with fine-positioning knobs on the LatticeAx high magnification digital microscope. This new machine-assisted Indent and Cleave[3] approach bridges both manual scribing and fully automated cleaving or polishing, and increases success rates while keeping costs down.

The accurate, repeatable indent and slow, controlled cleaving that results from this hybrid tool (FIGURE 3b) speeds preparation time and produces high accuracy, quality results—regardless of user experience—and with greater flexibility of sample size and dimensions.

Broad Ion Beam Milling The BIB milling system is a specimen preparation device (FIGURE 3c) for SEM and surface analysis (EDX[4], EBSP[5], etc.). The device uses a defocused beam of argon ions that sputter material from the target specimen at a rate up to 2-500μm/hour, depending on the mode used. The BIB milling system uses a simple, repeatable process to remove surface layers of a specimen and for final finish of specimens in cross section. It is advantageous compared to mechanical polishing methods, which require well-trained operators to polish the specimen to a flat and mirror-like surface and hit a specific target. In addition, complex material composites that contain materials varying in hardness pose challenges when mechanically prepared using polishing wheels and compounds. This mechanical approach can lead to cracks, stress, relief (pull-out effects), and smearing. These adverse effects are minimized when using the low voltage (0-6kV) argon beam to remove material.

FIGURE 3c. Hitachi IM4000Plus broad ion beam milling system

FIGURE 3c. Hitachi IM4000Plus broad ion beam milling system

Flat Milling Mode Using the BIB’s “Flat Milling” mode yields a high quality cross section in a short amount of time. It requires the initial high accuracy cleave to be through or within a few 100nms of the area of interest and the face of the cross section to be at 90 degrees to the sample surface. With a high quality cleave, the BIB’s Flat Milling mode quickly polishes the cross-section face. Material is removed at a rate of 2μm/hr. Using the flat milling holder, the milling process can uniformly sputter an area approximately ~5mm across around the center of rotation of the specimen (FIGURE 3d). Typical operating parameters for the Hitachi IM4000Plus are 3kV accelerating voltage and a tilt of 70 degrees, with sample stage oscillation set to ±90 degrees and 10rpm. The best quality surface is achieved with a minimum mill time, thus the importance of cleaving through, or very close to, the region of interest. Otherwise, variations in the milling rates of different materials produce artifacts, often called “curtaining.”

Figure 3d

Figure 3d

Cross-section Mode When more than a few microns of material need to be removed, the BIB system is operated in “Cross-section” mode. This is commonly used when exposing a sub-surface target structure. Mechanical grinding causes mechanical artifacts and deformation from stress, making it difficult to obtain a smooth surface for SEM analysis. When using the cross-section milling holder, the BIB IM4000Plus shields part of the argon ion beam with the mask arranged on the specimen, and produces a cross section along the trailing edge of the mask into the sample. For Cross-section mode, targeting accuracy is approximately +/- 15μm.

Backside Milling Backside (as opposed to topside) milling mode can be used in both flat milling and cross-section modes. Backside milling is effective and necessary to alleviate curtaining effects[6] that can occur when traditional top-down ion milling induces striations. These striations are caused by the milling differential from neigh- boring materials that are atomically denser than the surrounding area. FIGURE 4 shows the direction of the ion beam during backside milling and the trench milled by the ion beam.

FIGURE 4. Copper bump after backside milling shows both the milling direction and the trench created by the ion beam

FIGURE 4. Copper bump after backside milling shows both the milling direction and the trench created by the ion beam

Case Study 1. Quick 5-minute HAC and Flat Milling for Cross Section Final Polish

In this example, a cross section was prepared of an Intel microprocessor removed from its package. The size of the sample available after deprocessing was 8 x 8mm. To prepare the cross section, the sample was cleaved parallel to 15μm contacts visible on the sample surface. The Hitachi IM4000 was then used to prepare the final surface using flat milling mode. Approximately 100nm of material was removed in 10 minutes to achieve the polished surface of the final cross section.

The cross-section process included:

1. Indenting the 15μm area of interest (AOI) with the LatticeAx (FIGURE 5a) (3 min)
2. Cleaving through the AOI using the small sample cleaving accessory[7] (2 min) (FIG 5b-c)
3. Mounting the sample for the IM4000Plus and backside milling using flat milling mode (15 min)

FIGURE 5a. Case Study 1 –HAC and flat milling processes for cross section final polish

FIGURE 5a. Case Study 1 –HAC and flat milling processes for cross section final polish

FIGURE 5b. View of sample after cleaving with the small sample cleaver

FIGURE 5b. View of sample after cleaving with the small sample cleaver

 

FIGURE 5c. Optical view of the cross section after cleaving

FIGURE 5c. Optical view of the cross section after cleaving

Results

This demonstrates a rapid (15-minute) method to obtain a damage-free cross section from a fully processed microprocessor over a very large area (5mm in diameter). A comparison of the results before and after milling shows the clear improvement in surface quality and SEM imaging results (FIGURE 5d and e). Using other methods such as mechanical polishing or FIB can take several hours to achieve a comparable size produced by the large flat-milled region. The best results were obtained when removing a minimum of material (nms), demonstrating the importance of an accurate, high quality cleave prior to BIB milling. FIGURE 5f shows a high-magnification view of the resulting cross section after flat milling that is high quality and without curtaining.

FIGURE 5d. SEM image of the microprocessor after cleaving

FIGURE 5d. SEM image of the microprocessor after cleaving

FIGURE 5e. SEM image of the microprocessor after 10 minutes of BIB milling using flat milling mode

FIGURE 5e. SEM image of the microprocessor after 10 minutes of BIB milling using flat milling mode

 

FIGURE 5f. SEM image showing planar cross section after flat milling

FIGURE 5f. SEM image showing planar cross section after flat milling

Case Study 2. Using HAC and BIB Milling in Cross-section Mode to Prepare Cross Sections of Solder Bumps

Cross sections are required to inspect solder bump reliability for interconnect problems during development and production, or for electromigration failure after aging. Creating these cross sections in a targeted location is critical for effective fault isolation and SEM analysis. With the advent of large Through Silicon-Via (TSV) and solder bump structures—often 100μm in depth or width—high throughput methods are necessary to make cross sections efficiently and effectively.[8]

In this case study, the solder bumps were prepared for SEM in a two-step process. In step 1, the LatticeAx cleaver was used to cleanly cross-section close to, and parallel to, a specific row of copper bumps. The copper bumps had a diameter of 85μm and were cleaved 30 μm from the center of a bump. Time to cleave was 5 minutes and yielded the results shown in FIGURE 6a and FIGURE 6b.

FIGURE 6a. SEM image of the microprocessor after cleaving

FIGURE 6a. SEM image of the microprocessor after cleaving

FIGURE 6b. SEM image of the microprocessor after cleaving

FIGURE 6b. SEM image of the microprocessor after cleaving

In step 2, a broad argon ion beam instrument, the Hitachi IM4000, was used to prepare the final imaging surface within the copper bump. The backside milling method was used; no further preparation was performed.

Results

FIGURES 6c and 6d, taken after ion milling, plainly show the improved surface quality and copper grain structures, as well as fine details at the interface between the bump and adjacent structures. By cleaving close to the center of the copper bumps, the milling time on the BIB was reduced to less than 2 hours versus tens of hours for large cross-section areas (multiple bumps).

This two-step sample preparation process described has been implemented in production by a large semiconductor manufacturer. The technique described reduces turn-around time and repeatedly results in artifact-free cross sections of copper solder bumps.

FIGURE 6c. SEM image of the microprocessor after cleaving

FIGURE 6c. SEM image of the microprocessor after cleaving

FIGURE 6d. SEM image of the microprocessor after cleaving

FIGURE 6d. SEM image of the microprocessor after cleaving

Conclusion

For “off-line” laboratories, using HAC and BIB together for creating high quality cross sections is a compelling, low-cost alternative to investments in FIBs or automated polishing or cleaving equipment. High accuracy cleaving reduces sample preparation time, complexity, and cost without sacrificing cross- section quality. Combining this with a broad argon ion beam instrument for quick removal of minimal amounts of material or for milling of large flat areas, HAC presents effective, accurate results critical to product or failure analysis, while keeping both equipment and per-sample costs low.

Whether for final polish or in sample preparation of solder bumps, the results from the machine-assisted high accuracy Indent and Cleave approach combined with broad ion beam milling rival those of fully automated cleaving or polishing systems

References

1. Per industry sources
2. Approximate costs: FIB/SEM at $1-2 million; Automated HAC at $300,000; HAC+BIB milling tool at $160,000.
3. Cleaving Breakthrough: A New Method Removes Old Limitations, E. Moyal, E. Brandstädt, EDFAAO (2014) 3:26-31
4. Energy-dispersive X-ray spectroscopy
5. Electron backscatter pattern
6. CAVolkert and AM Minor, MRS Bull 32(5) (2007) 389–99.
7. The small sample cleaving accessory is used to clamp samples as small as 4mm wide for indenting with the LatticeAx and cleaving using a separate cleaving base. 8. Sample Preparation of Semiconductor Materials with a New Site-specific Cleaving Technology, Microscopy Today, September 2013, Teshima et al., 56-59.

J. TESHIMA is with LatticeGear, LLC., 1500 NW Bethany Blvd., Suite 200, Beaverton, OR 97006, USA. JAMIL J. CLARKE is with Hitachi High Technologies America, Inc., Nanotechnology Systems Division, 22610 Gateway Center, Dr. Clarksburg, MD 20871, USA

At this week’s IEDM 2014, held in San Francisco, California, nanoelectronics research center imec demonstrated an ultra-low power RFID transponder chip. Operating at sub 1V voltage and realized in thin-film transistor technology (TFTs) on plastic film, the chip paves the way for universal sensing applications, such as item level RFID tagging, body area networks (BAN) and environmental monitoring, that require prolonged remote autonomy, and ultimate thinness, flexibility and robustness.

One of the major drivers of the semiconductor industry is the Internet of Things (IoT). Market studies envision a society where billions of autonomous sensor nodes are seamlessly integrated into objects, in the environment and on human bodies, operating independently for months, interacting with each other and connecting to the internet. This IoT is expected to improve and enhance daily-lives through smart houses and smart cars, personal health monitoring and much more. Companies across the electronics value chain are rushing to define their vision and strategy and determine how this IoT fits into their product roadmap.

To enable this IoT vision, imec is leveraging its expertise in thin-film electronics, ultra-low power electronics and sensing, in this way tackling the technology roadblocks for universal sensing applications that lie ahead. The teamdemonstrated an 8-bit transponder chip made in thin-film transistor technology. The chip operates at a supply voltage of 0.55V while consuming only 2.5µW. A commercial AAA battery could power the chip for more than 20 years. Moreover, processed on a 25µm thin foil in a process flow compatible to a commodity manufacturing infrastructure (flat panel display fabs), the chip addresses the issue of cost and mechanical flexibility, thinness and robustness. The chip can be embedded in security documents, smart packaging, disposable electronics or textiles.

The research is done in the framework of Holst Centre’s (initiated by imec and TNO) industrial affiliation program on thin-film electronics and with support from the EU through the project COSMIC that developed complimentary thin film circuit technologies on foil for applications like gate driver for flexible displays, ADC, ALU and RFID tags