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Applied Materials, Inc. today announced it has been awarded a contract by the Defense Advanced Research Projects Agency (DARPA) to develop a new type of electronic switch for artificial intelligence that mimics the way the human brain works to enable dramatic improvements in performance and power efficiency. The project is being supported by DARPA’s Electronics Resurgence Initiative, a multi-year research effort intended to achieve far-reaching improvements in electronics performance well beyond the limits of traditional Moore’s Law scaling.

Applied is working with Arm and Symetrix to develop a new neuromorphic switch based on CeRAM memory that can allow data to be stored and processed in the same material. The goal of the project is to enable a major improvement in artificial intelligence compute performance and power efficiency with the use of analog signal processing as compared to current digital approaches.

“This project is a perfect example of how new materials and architectures can be developed to enable new ways to accelerate artificial intelligence applications as classic Moore’s Law scaling slows,” said Steve Ghanayem, senior vice president of New Markets and Alliances at Applied Materials. “Applied has the industry’s broadest portfolio in materials engineering capabilities and is excited to be part of a team enabling breakthroughs for artificial intelligence.”

Today’s announcement was part of DARPA’s first annual ERI Summit in San Francisco. Applied Materials’ president and CEO, Gary Dickerson, delivered a keynote speech at the event highlighting the need for materials innovation in the AI era and calling for a new level of industry connectivity to speed progress across materials engineering, design and manufacturing.

Announced in September 2017, the ERI Materials & Integration programs seek to answer this question: Can we use the integration of unconventional electronics materials to enhance conventional silicon circuits and continue the progress in performance traditionally associated with scaling?

The Applied Materials team is part of the ERI Foundations Required for Novel Compute (FRANC) program, which seeks innovations that go beyond von Neumann compute architectures. Central is the design of circuits that leverage the properties of new materials and integration schemes to process data in ways that eliminate or minimize data movement. The novel compute topologies that come out of this effort could allow processing to happen where the data is stored with structures that are radically different from conventional digital logic processors, ultimately allowing for significant gains in compute performance.

Applied Materials, Inc. (Nasdaq:AMAT) is a developer of materials engineering solutions used to produce virtually every new chip and advanced display in the world.

Park Systems announced the opening of the Park Nanoscience Lab at the prestigious Indian Institute of Science (IISC) Bangalore India, which has been upgraded to the status of Institute of Eminence.

The Nanoscience Lab will be equipped with Park NX20 AFM at the Centre for Nano Science and Engineering (CeNSE) and will hold workshops and symposiums on the latest advancements in nanometrology and offer researchers a chance to experience the latest in AFM technology.

The official inauguration ceremony of the Park Nanoscience Lab in India will be held on Wednesday July 25, 2018 at 10 AM featuring a talk by Dr. San Joon Cho of Park Systems Corporation,who will make an official presentation, declaring the Park NanoScience Lab, a national facility where researchers will have access to Park Systems cutting-edge Atomic Force Microscopes with high resolution nanoscale imaging.The event will also include an AFM live demonstration and is open to the press and public. To register to attend go to: http://www.parksystems.com/iisc

“We are honored to have the Park Nanoscience Lab here at Indian Institute of Science,” The Director, CeNSE- Indian Institute of Science further added, “The partnership with Park Systems and their Atomic Force Microscope technology strengthens our academic and scientific community by bringing an exciting new research tool to a shared access location, supporting the growing demand for nanotechnology here in India.”

The Park Nanoscience Labwill showcase advanced atomic force microscopy systems, demonstrate a wide variety of applications ranging from materials, to chemical and biological to semiconductor and devices, and provide hands on experience, training and service, year-round.

“Increasingly, AFM is being selected for Nanotechnology research over other metrology techniques due to its non-destructive measurement and sub-nanometer accuracy,” states Dr. Sang-il Park, Park Systems Chairman and CEO. “The new Park Nanoscience Lab at Indian Institute is a tremendous step forward for researchers in India who work in the advancing fields of nano science and technology.”

Park Systems advanced AFM platform includes SmartScan, an innovative and pioneering AFM intelligence that produces high quality imaging with very few clicks. Park SmartScan’s unique design opens up the power of AFM to everyone and drastically boosts the productivity of all users.

Since going public and listing on KOSDAQ in 2016, Park Systems’ stock has quadrupled as they continue to lead the world in growing AFM market share. Park Systems, a global AFM manufacturer, has Nanoscience Centers in key cities world-wide including Santa Clara, CA, Albany NY, Tokyo, Japan, Singapore, Heidelberg, Germany, Suwon and Seoul.

By Yoichiro Ando

The Japan semiconductor manufacturing supply chain is a global semiconductor industry workhorse, producing about one third of world’s chip equipment and more than half of its semiconductor materials. In contributing the vast majority of these products, SEMI Japan member companies hold the high distinction of enabling continuous development of the worldwide semiconductor industry. Aptly, then, technology powerhouses IBM, Nissan Motors and Toshiba offered insights into the latest trends and innovations in computing and smart cars at the late-May SEMI Japan Members Days in Tokyo with 133 technologists from member companies in attendance.

As the audience discovered, chip innovation never sleeps and, as futuristic as it can be, invariably gives rise to possibilities beyond the human imagination. That was the message of kickoff presentation “Computing Reimagined – AI/Quantum/IoT” – by Dr. Shintaro Yamamichi, Senior Manager, Science & Technology at IBM Research-Tokyo. Dr. Yamamichi cited three examples of how semiconductors uncover new technology frontiers.

  • Computational materials discovery, a novel methodology, is the application of theory and computation to unearthing new materials and the key to enabling an ongoing stream of semiconductor innovation. In particular, using cognitive technology to mine huge volumes of literature reveal new insights into materials that uncover even more functionality such as greater conductivity and heat resistance. With new materials the oxygen of ever more advanced semiconductor chip manufacturing, the semiconductor industry will surely benefit from this methodology.
  • The opportunity to accelerate quantum computing innovation is now. Launched in May 2016, the IBM Quantum Experience gives students, researchers and general science enthusiasts hands-on access to IBM’s experimental cloud-enabled quantum computing platform. The online platform features a forum for discussing quantum computing topics, tutorials on how to program IBM Q devices, and other educational material about quantum computing. Dr. Yamamichi encouraged the audience to join the program.
  • The world’s tiniest computer, unveiled by IBM at the company’s Think 2018 conference in Las Vegas, packs several hundred thousand transistors and, IBM claims, the equivalent power of a 1990s x86 chip into a package smaller than a grain of salt. The computer’s small form factor (less than 1mm x 1mm) and low manufacturing cost means it can be embedded in product price tags and packages as an anti-fraud device using blockchain technology.

Vehicles need to be both electric and intelligent as countries become more populous and traffic density increases. More drivers extend average drive time, boost greenhouse emissions, devour precious energy resources and lead to more traffic congestion and accidents. Dr. Haruyoshi Kumura, fellow at Nissan Motor, highlighted these issues in stressing the importance of a new era of intelligent mobility. To mitigate these problems, Nissan is focusing on the electrification and intelligence of its vehicles:

  • Nissan’s electric vehicle, Leaf, reduces accidents with electric intelligence systems such as e-Pedal, which uses an accelerator pedal only for both acceleration and deceleration, and ProPILOT Park, a feature that automatically parks the car by using multiple cameras and ultrasonic sonars to detect pedestrians and other objects around the vehicle.

  • With more than 90 percent of traffic accidents caused by driver error, Nissan plans to introduce autonomous driving on multi-lane highways by the end of 2018 and on city streets by 2020. By 2022, the company plans to roll out full autonomous driving to reduce traffic accidents caused by inattentive drivers.
  • For full autonomous driving to materialize, sensor fusion technology must incorporate a combination of technologies – radar systems, light detection and ranging (LiDAR) systems and cameras – to identify the shapes and locations of nearby moving objects and measure their speed. Sensed information is then processed by a 3D graphic analyzer to make electric throttle, braking and steering decisions.

The outlook for automotive industry includes car sharing and more electrification – both insights from Yoshiki Hayakashi, general manager, automotive solution strategic planning division at Toshiba Electronic Devices & Storage, who offered his perspectives on trends in Japan’s automotive industry and beyond.

  • To meet the requirements of the COP21 Paris agreement, the global automotive industry is shifting to electrification. Toshiba estimates 60 percent of new cars will be electric vehicles by 2040 to meet the International Energy Agency’s global EV outlook.
  • In Japan, autonomous driving or advanced driver assistance systems (ADAS) will be offered in certain areas by 2020, the year of the Tokyo Olympic games. Growth of these advanced driving systems hinges on infrastructure development. Supporting data centers, intelligent transport systems, vehicle-to-everything connections, and smart city are all necessary components.
  • Car ownership will begin to cede ground to car sharing with technology elites such as Tesla, Apple and Google leading the way. To expand the car-sharing industry, new alliances will take shape between new and old-guard automotive companies and electronics manufacturing services (EMS) providers.
  • Autonomous driving requires precise 3D renderings of actual roadways using sensors for route mapping. While sensor fusion must be deployed for these capabilities, LiDAR offers better sensing range and space resolution precision than ultrasonic sonars, radars, and cameras.

The next SEMI Japan members day is scheduled for October 30 in Tokyo. SEMI holds similar events in most regions where SEMI and its members operate. For the members events in your region, contact the SEMI office nearest you.

Yoichiro Ando is a marketing director in SEMI Japan.

Originally published on the SEMI blog.

Rahul Goyal of Intel has been elected to a one-year term as board chair of Silicon Integration Initiative, a research and development joint venture that provides standard interoperability solutions for integrated circuit design tools. The election was held during Si2’s board meeting at the recent Design Automation Conference.

A member of the Si2 board since 2003, Goyal is vice president, Technology and Manufacturing Group and director, Research and Development Strategic Enabling for Intel. He has global responsibility for strategic sourcing, supply chain strategy, industry relations, ecosystem development, strategic collaborations, data analytics, and capacity management related to product development across Intel’s broad product portfolio. This includes software, system and semiconductor intellectual property, product development outsourcing services, electronic measurement solutions, electronic design automation software, prototyping and verification products used in all aspects of product design, validation and technology development.

Goyal joined Intel in 1989 and has held various technical and management positions in software engineering and technology development. His previous roles there include engineering director in the Design and Technology Solutions Group, director of the integrated silicon technology roadmap development in the Microprocessor Products Group, and senior engineering manager of mask operations.

Goyal holds a bachelor’s degree in electrical and electronics engineering from Birla Institute of Technology and Science, Pilani, India, and a master’s degree in computer engineering from Syracuse University, Syracuse, N.Y.

Large thin-film transistor liquid crystal display (TFT LCD) panel makers are expected to reduce production of comparatively smaller sized 32-, 40- and 43-inch panels, helping to stabilize panel prices in the third quarter of 2018. In the longer term, however, the oversupply issue still remains, eventually causing older TFT LCD fabs to be restructured, according to IHS Markit (Nasdaq: INFO).

According to the latest AMOLED and LCD Supply Demand & Equipment Tracker by IHS Markit, currently planned new factories will increase large display panel production capacity by 31 percent or 77.7M square meters from 2018 to 2021. However, based on the current demand forecast, there will be about 49 million square meters of capacity in the pipeline more than the market requires in 2021. The supply/demand glut level is expected to continue to increase from 12 percent in 2018 to 23 percent in 2021, remaining well above 10 percent or what is modeled to be a balanced market.

Between 2019 and 2021, there will be a great amount of LCD TV panel capacity built, mainly from generation Gen10.5/11 factories in China, according to IHS Markit.

“Some panel makers may be forced to reduce utilization rates, while some planned capacity may never be built,” said David Hsieh, senior director of displays at IHS Markit. “Furthermore, in the next few years, legacy factory restructuring will likely accelerate. For the TFT LCD industry to return to a balanced supply/demand level, multiple Gen 5, Gen 6 and even Gen 8 factories will likely need to be shut down.”

For example, shutting down half of all Gen 5 and Gen 6 amorphous silicon (a-Si) capacity in Taiwan would remove about 18 million square meters of production capacity, according to IHS Markit. Larger glass substrate capacity, such as Gen 8, will also likely need to be closed to bring the market back toward balance.

Possible restructuring of legacy factories may include fab shutdown, facility consolidation, or conversion to other technologies, such as active-matrix organic light-emitting diode (AMOLED) panels, ePaper backplanes and sensors.

According to the Display Production & Inventory Tracker by IHS Markit, fab restructuring can be attributed to multiple reasons, such as no longer competitive, old equipment, shifts in panel makers’ business focus, excessive overhead from under-utilized facilities and pressure on profitability.

“Oversupply is not the end of the crystal cycle. The industry has a long history of dynamically adjusting itself to balance supply and demand,” Hsieh said. “The process may create many challenges for supply chain companies. However, the delayed expansion of new factories, the restructuring of legacy fabs and the potential for faster demand growth spurred by lower panel prices will help the LCD industry to eventually return to equilibrium.”

Texas Instruments Incorporated (TI) (NASDAQ: TXN) today announced the resignation of Brian Crutcher as president, CEO and a member of the TI board. The board has named Rich Templeton, the company’s chairman, to reassume the roles of president and CEO on an ongoing, indefinite basis, in addition to continuing as chairman. Templeton’s appointment is not temporary, and the board is not searching for a replacement.

Crutcher resigned due to violations of the company’s code of conduct.  The violations are related to personal behavior that is not consistent with our ethics and core values, but not related to company strategy, operations or financial reporting.

“For decades, our company’s core values and code of conduct have been foundational to how we operate and behave, and we have no tolerance for violations of our code of conduct,” said Mark Blinn, lead director of the TI Board. “Over the past 14 years, Rich has successfully led TI to become the company it is today, and we have great confidence in his values and ability to continue to lead this company forward.”

“I have tremendous pride in this company, and passion for continuing to make TI even stronger and better,” said Rich Templeton, TI chairman, president and CEO. “I remain dedicated to moving TI forward with an unwavering commitment to operate ethically and conduct ourselves professionally in everything we do.”

TI also reported second-quarter revenue of $4.02 billion, up 9 percent from the same quarter a year ago, and earnings per share of $1.40. EPS included a 3 cent discrete tax benefit not in the company’s original guidance. TI will provide full second-quarter results and third-quarter guidance in its earnings release and conference call on July 24.

With every smartphone brand applying the 18:9 and wider aspect ratio screens to its newer models, the rate of adoption is expected to quicken in the second half of 2018. Smartphones using 18:9 and wider aspect screens are forecast to increase to 66 percent of total smartphone shipments in the third quarter of 2018, soaring up from 10 percent in the same period last year, according to business information provider IHS Markit (Nasdaq: INFO).

After Samsung Electronics and Apple released their phones last year with new wider aspect ratios of 18.5:9 and 19.5:9, respectively, most smartphone brands have similarly followed suit by applying wider aspect screens to their 2018 lineup to keep up with product differentiation.

Improvements in display technologies have hastened the expansion of the wider screen adoption in smartphones. Initially, flexible active-matrix organic light-emitting diode (AMOLED) technology was required to realize a full-screen display, and thus, 18:9 or wider screens were expected predominantly to be used in premium and high-end smartphones in 2018. However, with rapidly improving designs in liquid crystal display (LCD) cell structure, thin-film transistor (TFT) array and light-emitting diode (LED) backlight, TFT LCD can now be used in full-screen smartphones.

“With the improvement in TFT LCD technology, smartphone makers are now aggressively applying 18:9 aspect ratio of TFT LCD to their 2018 models even for mid-end and entry-level smartphones, instead of using high-priced flexible AMOLED panels,” said Hiroshi Hayase, senior director at IHS Markit.

“It would be correct to assume that smartphone displays are undergoing a quick generation change to TFT LCD-based full screens later this year,” Hayase said. “The new generation of smartphones will be expected to stimulate replacement demand in the 2019 smartphone market.”

Silicon Labs (NASDAQ: SLAB), a provider of silicon, software and solutions for a smarter, more connected world, announces two new executive appointments. Daniel Cooley has been named Senior Vice President and Chief Strategy Officer. In this new role, Mr. Cooley will focus on Silicon Labs’ overall growth strategy, business development, new technologies and emerging markets. Matt Johnson, a semiconductor veteran with more than 15 years of industry experience, joins Silicon Labs as Senior Vice President and General Manager of IoT products. Both executives will report to Tyson Tuttle, CEO.

Mr. Cooley has led Silicon Labs’ IoT business for the past four years. Under his leadership, the company built an industry-leading portfolio of secure connectivity solutions, with IoT revenue now exceeding a $100 million per quarter run rate. Mr. Cooley joined Silicon Labs in 2005 as a chip design engineer developing broadcast audio products and short-range wireless devices. Over the years, he has served in various senior management, engineering and product management roles at the company’s Shenzhen, Singapore, Oslo and Austin sites. The new role leverages Mr. Cooley’s proven talents in strategy and business development.

Mr. Johnson will lead Silicon Labs’ IoT business including the development and market success of the company’s broad portfolio of wireless products, microcontrollers, sensors, development tools and wireless software. Mr. Johnson has a track record of growing revenue and leading large global teams, and he brings a deep understanding of analog, MCU and embedded software businesses to Silicon Labs. Previously, he served as Senior Vice President and General Manager of automotive processing products and software development at NXP Semiconductors/Freescale, as well as SVP and General Manager of mobile solutions at Fairchild Semiconductor.

“With these executive appointments, we are expanding our ability to execute on large and growing market opportunities in the IoT,” said Tyson Tuttle, CEO of Silicon Labs. “Together, these two talented leaders will help Silicon Labs scale the business to the next level and focus on future growth.”

Intel to acquire eASIC


July 16, 2018

The following is an opinion editorial provided by Dan McNamara of Intel Corporation.

Intel is competing to win in the largest-ever addressable market for silicon, which is being driven by the explosion of data and the need to process, analyze, store and share it. This dynamic is fueling demand for computing solutions of all kinds. Of course Intel is known for world-class CPUs, but today we offer a broader range of custom computing solutions to help customers tackle all kinds of workloads – in the cloud, over the network and at the edge. In recent years, Intel has expanded its products and introduced breakthrough innovations in memory, modems, purpose-built ASICs, vision processing units and field programmable gate arrays (FPGAs).

FPGAs are experiencing expanding adoption due to their versatility and real-time performance. These devices can be programmed anytime – even after equipment has been shipped to customers. FPGAs contain a mixture of logic, memory and digital signal processing blocks that can implement any desired function with extremely high throughput and very low latency. This makes FPGAs ideal for many critical cloud and edge applications, and Intel’s Programmable Solutions Group revenue has grown double digits as customers use FPGAs to accelerate artificial intelligence, among other applications.

Customers designing for high-performance, power-constrained applications in market segments like wireless, networking and the internet of things (IoT) sometimes begin deployments with FPGAs for fast time-to-market and flexibility. They then migrate to devices called structured ASICs, which can be used to optimize performance and power-efficiency. A structured ASIC is an intermediary technology between FPGAs and ASICs. It offers performance and power-efficiency closer to a standard-cell ASIC, but with the faster design time and at a fraction of the non-recurring engineering costs associated with ASICs.

Today, I’m excited to announce that Intel plans to expand its programmable solutions portfolio to include structured ASICs by acquiring eASIC®, a leading structured ASICs provider headquartered in Santa Clara, California. eASIC has a proven, 19-year success record, leading products and a world-class team, which will join Intel’s Programmable Solutions Group. The addition of eASIC will help us meet customers’ diverse needs of time-to-market, features, performance, cost, power and product life cycles.

This combination brings together the best-in-class technologies from both companies to provide customers with more choice, faster time-to-market and lower development costs. Specifically, having a structured ASICs offering will help us better address high-performance and power-constrained applications that we see many of our customers challenged with in market segments like 4G and 5G wireless, networking and IoT. We can also provide a low-cost, automated conversion process from FPGAs (including competing FPGAs) to structured ASICs.

Longer term, we see an opportunity to architect a new class of programmable chip that takes advantage of Intel’s Embedded Multi-Die Interconnect Bridge (EMIB) technology to combine Intel FPGAs with structured ASICs in a system in package solution. Together with partners and customers, Intel and eASIC expect to deliver industry-leading solutions.

We expect to complete the acquisition in the third quarter of 2018 after customary closing conditions are met. We look forward to serving eASIC’s current customers and to offering Intel customers a new solution for unlocking the power of data.

Bruker Corporation today announced that it has acquired JPK Instruments AG (JPK), located in Berlin, Germany. In 2017, JPK Instruments had revenue of approximately 10 million Euro. JPK provides microscopy instrumentation for biomolecular and cellular imaging, as well as force measurements on single molecules, cells and tissues. JPK adds in-depth expertise in live-cell imaging, cellular mechanics, adhesion, and molecular force measurements, optical trapping, and biological stimulus-response characterization to Bruker. Financial details of the transaction were not disclosed.

Over the past five years, Bruker has developed a life science microscopy business that specializes in advanced technologies for neuroscience, live-cell imaging, and molecular imaging, which will be further augmented by JPK’s advanced technologies and applications. Bruker’s existing fluorescence microscopy techniques include performance-leading multiphoton microscopy, swept-field confocal microscopy, super-resolution microscopy, and single-plane illumination microscopy.

“We have been making a substantial investment in advanced technologies for life science imaging, and have built up a portfolio of fluorescence microscopy products that enable biologists in research areas that require deep, fast imaging at high resolution and at low phototoxicity,” commented Dr. Mark R. Munch, President of the Bruker NANO Group. “JPK’s products and applications capabilities nicely augment our current techniques.”

Anthony Finbow, Chairman at JPK, added: “The combination of these two businesses will enable further significant advances in life science imaging and drive the state of the industry. I am delighted that we have been able to achieve this result for JPK and for Bruker.”

“The business we have built aligns well with the new strategic direction of Bruker in life science microscopy, and we are very pleased to join them,” said Dr. Torsten Jaehnke, a JPK founder and CTO. “We plan to realize a number of valuable synergies going forward.”

JPK’s BioAFM and optical tweezer product families span a range of techniques, from imaging of biological samples to characterizing biomolecular and cellular force interactions. Its NanoWizard 4 BioScience AFM combines atomic force imaging with advanced optical fluorescence imaging and super-resolution microscopy for the ultimate combination in image resolution for molecules, membranes, and live cells. In addition, the ForceRobot enables single-molecule force spectroscopy for investigating receptor-ligand interactions or small molecule-protein binding interactions. The CellHesion product brings quantitative force measurement to live cells and tissues, enabling insights in cell-substrate and cell-cell interactions. Lastly, JPK’s NanoTracker optical tweezer provides an all-optical means for molecular and cellular force experiments.

JPK’s offerings and life science applications expertise are synergistic with Bruker’s existing portfolio of advanced fluorescence microscopy products. Bruker’s Ultima family of multiphoton microscopes features proprietary photoactivation and photostimulation capabilities and deeper penetration into biological tissues, enabling advanced brain slice and intra-vital studies. Bruker’s Opterra swept-field scanning confocal fluorescence microscope provides unique live-cell imaging capabilities with unsurpassed dynamic observation of fast cellular events. Additionally, the Vutara super-resolution single-molecule localization (SML) microscope utilizes patented Biplane Imaging technology to provide high-speed, 3D super resolution for multicolor live-cell imaging and visualization of chromosome conformation. With a leading series of single plane illumination products, such as the MuVi SPIM and InVi SPIM, Bruker offers unique performance and easiest-to-use light sheet instruments featuring the combination of low phototoxicity and high-speed imaging. The combined microscopy portfolio of the two companies will enable a unique range of correlative measurements for emerging life science applications.