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Microsemi Corporation (Nasdaq: MSCC), a provider of semiconductor solutions differentiated by power, security, reliability and performance, today announced it will be expanding its Silicon Carbide (SiC) MOSFET and SiC diode product portfolios early next quarter, including samples of its next-generation 1200-volt (V), 25 mOhm and 80 mOhm SiC MOSFET devices; next-generation 700 V, 50 A Schottky barrier diode (SBD) and corresponding die. These SiC solutions, along with other recently announced devices in the SiC SBD/MOSFET product families, will be demonstrated June 5-7 in hall 6, booth 318 at PCIM Europe 2018, held at the Exhibition Centre in Nuremberg, Germany.

As Microsemi continues to expand development efforts for its SiC product family, it has become one of the few suppliers providing a range of Si/SiC power discrete and module solutions to the market. These next-generation SiC MOSFETs are ideally suited for a number of applications within the industrial and automotive markets, including hybrid electric vehicle (HEV)/EV charging, conductive/inductive onboard chargers (OBCs), DC-DC converters and EV powertrain/traction control. They can also be used for switch mode power supplies, photovoltaic (PV) inverters and motor control in medical, aerospace, defense and data center applications.

“Fast adoption of SiC solutions for applications such as EV charging, DC-DC converters, powertrain, medical and industrial equipment, and aviation actuation demand a high degree of efficiency, safety and reliability on components used in such systems,” said Leon Gross, vice president and business unit manager for Microsemi’s Power Discretes and Modules business unit. “Microsemi’s next-generation SiC MOSFET and SiC diode families will include AEC-Q101 qualifications, which will insure high reliability while ruggedness is demonstrated by high repetitive unclamped inductive switching (UIS) capability at rated current without degradation or failures.”

According to market research firm Technavio, the global SiC market for semiconductor applications is expected to reach nearly $540.5 million by 2021, growing at a compound annual growth rate (CAGR) of more than 18 percent. The firm also forecasts the global SiC market for automotive semiconductor applications at nearly 20 percent CAGR by 2021. Microsemi is well-positioned with these trends, with its SiC MOSFET and Schottky barrier diode devices avalanche-rated with a high short-circuit withstand rating for robust operation, and the capabilities necessary to enable these growing application trends.

Microsemi’s next-generation 1200 V, 25/40/80 mOhm SiC MOSFET devices and die as well as its next-generation 1200 V and 700 V SiC SBD devices offer customers attractive benefits in comparison to competing Si/SiC diode/MOSFET and IGBT solutions, including more efficient switching at higher switching frequencies as well as higher avalanche/UIS rating and higher short-circuit withstand rating for rugged and reliable operation. For example, SiC MOSFETs are developed with an ideal balance of specific on-resistance, low gate and thermal resistances, and low gate threshold voltage and capacitance for reliable operation. Designed for high yield processes and low parameter variation across temperature, they operate at higher efficiency (in comparison to Si and IGBT solutions) across high junction temperature (175 degrees Celsius) to extend battery systems like those in HEV/EV applications.

The newly sampling devices also offer excellent gate integrity and high gate yield as verified through high temperature reverse bias (HTRB) and time-dependent dielectric breakdown (TBBD) tests, which are part of its AEC-Q101 qualification in progress. Other key features include:

  • High UIS capability, offering 1.5x to 2x higher than competitive SiC MOSFETs and GaN devices for avalanche ruggedness;
  • High short-circuit rating ranging from 1.5x to 5x higher than competitor SiC MOSFET devices for more rugged operation;
  • Up to 10x lower failure-in-time (FIT) rate than comparable Si IGBTs at rated voltage for neutron susceptibility and with comparable performance against SiC competition pertaining to neutron irradiation; and
  • Higher SiC power density versus Si, enabling smaller magnetics/transformers/DC bus capacitors and less cooling elements for more compact form factor to lower overall system costs.

Veeco Instruments Inc. (Nasdaq: VECO) announced that Lumentum Holdings Inc. has ordered the Veeco K475i™Arsenide/Phosphide (As/P) Metal Organic Chemical Vapor Deposition (MOCVD) System for production of its advanced semiconductor components which address the 3D sensing, high-speed fiber-optic communications and laser-based materials processing end-markets. Lumentum, headquartered in Milpitas, Calif., is a manufacturer of innovative optical and photonics products.

“The global communications, industrial and consumer electronics markets that our proprietary semiconductor lasers address are growing rapidly,” said Susan Wang, vice president of manufacturing at Lumentum. “We chose Veeco’s K475i system with its high capacity/throughput, uniformity of quality, repeatability and exceptional performance to help expand our capacity and better address these growth opportunities. We have a longstanding relationship with Veeco and look forward to future collaboration together.”

The K475i system incorporates proprietary TurboDisc® and Uniform FlowFlange™ MOCVD technologies. These innovations allow Veeco customers to improve compositional uniformity and dopant control while reducing cost-per-wafer by up to 20 percent compared to alternative systems through higher productivity, best-in-class yields and lower operating expenses. Application areas include lighting, solar, laser diodes, vertical-cavity surface-emitting lasers (VCSELs), pseudomorphic high electron mobility transistors (pHEMTs) and heterojunction bipolar transistors (HBTs).

“A leading player in the optical communications and commercial laser markets, Lumentum is well positioned to capitalize on the growing demand for next-generation laser and optical devices using Veeco MOCVD technology,” said Peo Hansson, Ph.D., senior vice president and general manager of MOCVD Operations at Veeco. “As customers look for technologies that enable demanding new applications in increasingly competitive markets, many leading photonics, power electronics and LED device manufacturers continue to choose our proven MOCVD systems that deliver strong wafer uniformity and the lowest cost of ownership.”

SiFive, a provider of commercial RISC-V processor IP, today welcomed Brite Semiconductor, an ASIC service company invested by SMIC, to the growing DesignShare ecosystem.

The partnership enables Brite Semiconductor to offer DDR IP, which complies with DDR2/3/4 and LPDDR2/3/4, up to 2667MT/s. Brite Semiconductor’s DDR technology will make it easier for SiFive customers to speed data transfer rates on their RISC-V based SoCs within a reduced power envelope. Brite Semiconductor’s proven silicon will not only lower costs to designers, but also enable them to shorten production time.

“Brite is committed to promote innovation in ASIC business through collaboration and ecosystem development,” said Thomas Xu, CEO of Brite Semiconductor. “The demand for open-source hardware is increasing, and DesignShare offered by SiFive is a great platform to provide designers access to what they want.”

The availability of Brite Semiconductor’s DDR IP through the DesignShare program shortens the time to market and removes common barriers to entry that have historically blocked smaller companies from developing custom silicon. Companies like SiFive, Brite Semiconductor and other ecosystem partners provide low- or no-cost IP to emerging companies, reducing the upfront engineering costs required to bring a custom chip design to realization.

“Brite Semiconductor’s DDR IP makes it simpler for engineers to use RISC-V in their future designs.” said Shafy Eltoukhy, vice president of operations and head of DesignShare for SiFive. “We’re excited to see the innovations stemming from our DesignShare ecosystem.”

Since DesignShare launched in 2017, the program has grown to include a wide range of IP solutions, from debug and trace technology to embedded memory and reconfigurable FPGA. For more information on DesignShare and to see the complete list of technologies, visit www.sifive.com/designshare.

Cadence Design Systems, Inc. (NASDAQ: CDNS) and NI (NASDAQ: NATI) today announced a broad-ranging collaboration to improve the overall semiconductor development and test process of next-generation wireless, automotive and mobile integrated circuits (ICs) and modules. To meet customers’ needs for a streamlined and comprehensive solution, Cadence and NI have pursued projects that integrate key design tool technologies into a common user environment to improve the design, analysis and testing of analog, RF and digital ICs and system-in-package (SiP) modules spanning from pre-silicon design to volume production test. To further enhance RF development, Cadence has also launched the new Virtuoso® RF Solution, which enables RF engineers to design, implement and analyze entire RF modules and RFICs from within the Virtuoso custom IC design platform.

The New Cadence Virtuoso RF Solution and AXIEM 3D Planar EM Software Integration

Traditionally, each major stage in the IC development process has operated in isolation supported by a unique and dedicated set of design tools, models, languages and data formats, which can cause design failures due to the manual translation of data between numerous disjointed tools. To address this issue and streamline the RFIC and RF module design flow, Cadence delivered the following capabilities within the new Virtuoso RF solution:

  • RFIC and RF Module co-design: Provides a robust design environment enabling simultaneous editing of multiple ICs on a complex RF module while streamlining design to manufacturing tasks
  • Single “golden” schematic: Offers schematic-driven layout implementation, EM analysis and simulation and physical verification checks of RFIC and RF module design through a single schematic source, reducing design failures
  • Smart electromagnetic (EM) simulation interface: Includes an integration between the Cadence® Sigrity™ PowerSI® 3D EM Extraction Option and the Virtuoso RF Solution, which automates hours of manual work required to run critical passive component and interconnect EM simulations so users can run multiple in-design experiments

As part of the collaboration between the two companies, the Cadence interface has been extended to include an integration with the AXIEM 3D planar EM simulator, within the Cadence Virtuoso RF Solution design environment. The AXIEM software’s fast solver technology readily addresses passive structures, transmission lines, large planar antenna and patch array problems with more than 100,000 unknowns, providing the accuracy, capacity and speed engineers need to help them ensure design integrity upon the first attempt. It also incorporates NI’s proprietary full-wave planar Method of Moments (MoM) technology that enables discrete- and fast-frequency sweeps.

The integrated Cadence and NI EM solutions equip engineers with a variety of EM analysis methods for designing RFICs and RF modules.

Common Semiconductor Models

Compatible models are critical to ensuring correlated results across different simulation tools. Cadence and NI are jointly working to deliver common transistor models, ensuring consistent simulation behavior of gallium arsenide (GaAs), gallium nitride (GaN) and silicon transistor models between Microwave Office circuit design software and the Cadence Spectre® simulation platform.

“With customers beginning to design the next generation of RF products for 5G, autonomous vehicles and other vertical markets, we saw a need to deliver a comprehensive RF solution that creates more efficiencies and drives innovation,” said Tom Beckley, senior vice president and general manager in the Custom IC & PCB Group at Cadence. “Based on the trusted Virtuoso custom IC design platform, the new Cadence Virtuoso RF Solution streamlines design and analysis for RFIC and RF modules. The collaboration between Cadence and NI and the integration of our tools can enable customers to seamlessly analyze and simulate their chip and package, reducing design cycle time and improving quality of results.”

“Our customers are continuously seeking new approaches to accelerate their product development cycles,” said Kevin Ilcisin, vice president of strategy and corporate development at NI. “The collaboration with Cadence allows us to embed our AXIEM 3D Planar EM software directly into the Virtuoso RF Solution, enabling customers to easily design analog, mixed-signal, RFIC and RF modules.”

The new Virtuoso RF Solution with the integrated AXIEM 3D planar EM solver technology will be sold and supported exclusively by Cadence to leverage years of development and customer deployment expertise. For more information, please visit www.cadence.com/go/virtuosorfni.

BY DAVID W. JIMENEZ, CEO, Wright Williams & Kelly, Inc.

For 27 years Wright Williams & Kelly, Inc. (WWK) has developed strategies and operational products and services proven to produce significant results. Over the course of nearly three decades, WWK has saved its clients over $10 billion and led the way in cost modeling, capacity planning, and operational efficiency; however, sometimes a company gets ahead of its markets. It has been 15 years since WWK launched its first online subscription-based product…and 13 years since it stopped offering it. Today, WWK returns to the cloud.

The cloud is an innovation fueled by advanced chip technology, but it has also been a model the industry hesitated to embrace. Much of this had to do with limited data protection schemes. Intellectual property (IP) is at the core of a successful integrated circuit business and letting key information leave the confines of the organization has traditionally been a forbidden proposition.

Fast forward a decade and a half and cloud-based services are now the norm. Fears over IP theft remain, but the protections have greatly improved. Further, the offerings that add value to cloud-based solutions have also greatly expanded. The move to the cloud now has less to do with a reduction in paranoia and more to do with the advantages of cloud computing. IBM breaks down the advantages into three areas; flexibility; efficiency; and strategic value.

Flexibility allows the scaling of computing power to the task at hand regardless of the local machine used to connect. Efficiency is accessing the needed applications from anywhere in the world from any connected device. Strategic value comes from being able to move faster than competitors by not being tied to existing infrastructure and the hesitancy to obsolete major IT investments. Michael Wright and Walter Ferguson in their 2005 treatise “The New Business Normal” predicted strategic advantage would accrue to those who could access, collate, analyze, and act on information faster than the competition, anywhere in the world and at any time.

WWK has leveraged these advantages by moving its complete suite of manufacturing optimization applica- tions to the cloud. In addition to the advantages inherent in cloud computing, this move provides WWK’s clients substantial cost advantages by lowering up front licensing costs and shifting from capital budgeting to more flexible expense accounting.

Cloud-based solutions: Developed with DARPA/SEMATECH, TWO COOL® is a cost of ownership (COO) and overall equipment efficiency (OEE) modeling platform designed to help equipment and process engineers as well as suppliers understand process step level impacts of changes in operating parameters.

Initially developed by Sandia National Laboratories, Factory Commander® is a cost and resource analysis platform. It analyzes overall factory and individual product costs, manufacturing capacity, and return on investment.

Factory Explorer® is an integrated capacity, cost, and discrete-event simulation tool which predicts factory capacity and bottleneck resources, product cost and gross margins, and dynamic measures such as cycle time and work-in-process.

Advantages put into practice: One advantage in moving these applications to the cloud is users benefit from a state-of-the art computing system. Modeling and simulation apps are computing power intensive. Instead of each user requiring a high-end workstation, the cloud allows users to share a virtual machine(s) (VM). When needs increase, upgrading the VM is quick and low-cost. This keeps the total cost of ownership (TCO) for IT infrastructure at a minimum.
Another advantage is updates happen behind the scenes and for all users at the same time. Traditional software maintenance costs disappear. No more scenarios where users are operating on different revision levels nor lose data due to forgotten backups.

Remote computing has always been a better solution, but there were reasons behind the slow acceptance. Even before the term cloud computing came to the fore, WWK understood this. It offered a remote server-based product before anyone knew what the cloud was. WWK was early to market, but the understanding it gained pointed it in the right direction. Like most market windows you can be early but never late. The arrival of the breadth of solutions needed to offer cloud-based applications has enabled WWK to scrap client-side software licensing and provide a robust, low cost manufacturing optimization software suite with all the advantages it envisioned 15 years ago. I guess we are back to the future.

SEMI, the global industry association representing the electronics manufacturing supply chain, today announced that the WT | Wearable Technologies Conference 2018 USA will co-locate July 11-12 with SEMICON West 2018 in San Francisco. The electronics industry’s premier U.S. event, SEMICON West — July 10-12 at Moscone North and South — will highlight engines of industry expansion including smart transportation, smart manufacturing, smart medtech, smart data, big data, artificial intelligence, blockchain and the Internet of Things (IoT). Click here to register.

“We are excited that the WT | Wearables Technologies Conference has joined SEMICON West to co-locate in 2018,” said David Anderson, president of SEMI Americas. “Our strategic partnership brings new content and more value to our extended supply chain. Every day the semiconductor industry makes chips smaller and faster with ever-higher performance. These innovations enable new wearable applications for smart living, smart medtech and healthcare that are continuously improving our lives. The WT | Wearable Technologies Conference speakers at SEMICON West 2018 will demonstrate just how they use semiconductor technology to deliver leading-edge wearables.”

“It is a great pleasure to collaborate with the leading global electronics manufacturing association and its successful SEMICON West event,” said Christian Stammel, CEO of WT | Wearables Technologies. “Since the beginning of our platform in 2006, the semiconductor industry has been a major driver of wearables and IoT innovation. All major developments in the WT application markets like healthcare (smart patches), safety and security (tracking solutions), lifestyle and sport (smartwatches and wristbands) and in the industrial field (AR / VR) were driven by semiconductor and MEMS innovations. Our program of expert speakers at SEMICON West will share the latest insights in the wearables market as the SEMI and WT ecosystems explore collaboration and innovation opportunities.”

Micron Technology, Inc. (Nasdaq:MU), and Intel Corporation today announced production and shipment of the industry’s first 4bits/cell 3D NAND technology. Leveraging a proven 64-layer structure, the new 4bits/cell NAND technology achieves 1 terabit (Tb) density per die, the world’s highest-density flash memory.

The companies also announced development progress on the third-generation 96-tier 3D NAND structure, providing a 50 percent increase in layers. These advancements in the cell structure continue the companies’ leadership in producing the world’s highest Gb/mm2 areal density.

Both NAND technology advancements—the 64-layer QLC and 96-layer TLC technologies —utilize CMOS under the array (CuA) technology to reduce die sizes and deliver improved performance when compared to competitive approaches. By leveraging four planes vs the competitors’ two planes, the new Intel and Micron NAND flash memory can write and read more cells in parallel, which delivers faster throughput and higher bandwidth at the system level.

The new 64-layer 4bits/cell NAND technology enables denser storage in a smaller space, bringing significant cost savings for read-intensive cloud workloads. It is also well-suited for consumer and client computing applications, providing cost-optimized storage solutions.

“With introduction of 64-layer 4bits/cell NAND technology, we are achieving 33 percent higher array density compared to TLC, which enables us to produce the first commercially available 1 terabit die in the history of semiconductors,” said Micron Executive Vice President, Technology Development, Scott DeBoer. “We’re continuing flash technology innovation with our 96-layer structure, condensing even more data into smaller spaces, unlocking the possibilities of workload capability and application construction.”

“Commercialization of 1Tb 4bits/cell is a big milestone in NVM history and is made possible by numerous innovations in technology and design that further extend the capability of our Floating Gate 3D NAND technology,” said RV Giridhar, Intel vice president, Non-Volatile Memory Technology Development. “The move to 4bits/cell enables compelling new operating points for density and cost in Datacenter and Client storage.”

Technavio projects the global semiconductor glass wafer market to post a CAGR of more than 6% during the forecast period. The emergence of advanced and compact consumer electronic devices is a key driver, which is expected to impact market growth.

Consumer electronic devices have witnessed a massive transformation over the last five years. Feature phones have been replaced by smartphones, PCs by laptops, and now laptops are being replaced by tablets. Cathode ray tube (CRT) TVs are being replaced by light-emitting diode (LED) TVs and organic LED (OLED) TVs. Due to increase in unit shipments of tablets and smartphones over the last five years, the demand for ICs (including MEMS devices and CMOS image sensors) used in these devices is on the rise. As semiconductor glass wafers are integral to ICs, rising demand for ICs will generate strong demand for semiconductor glass wafers over the forecast period.

In this report, Technavio highlights the growing proliferation of IoT and connected devices as one of the key emerging trends to drive the global semiconductor glass wafer market:

Growing proliferation of IoT and connected devices

IoT is a network of interrelated computing devices comprising mechanical and digital machines or objects that possess the ability to transfer data over a network without human-to-computer interaction. More than 30 billion IoT devices, generating about 50 trillion GBs of data, are expected to be connected through IoT by 2022. IoT enables devices to collect data using sensors and actuators and transmits data to a centralized location on a real-time basis, which empowers the user to take an informed decision. Thus, the adoption of IoT is increasing in several market segments, such as consumer electronics, automotive, and medical.

According to a senior analyst at Technavio for semiconductor equipment research, “Sensors and MEMS are an integral part of IoT devices and are manufactured from semiconductor glass wafers. It is projected that a total of one trillion sensors will be produced in 2020 to support the demand for IoT devices. This will require a significant production of semiconductor glass wafers, which can be met by several fabs. Growing applications of IoT will drive the construction of fabs.”

By Jay Chittooran

Jonathan Davis 3Testifying before a U.S. interagency panel weighing trade tariffs against China, a representative from the semiconductor manufacturing industry yesterday called for the removal of more than 100 products from the list of proposed tariffs, stressing that an escalation of the U.S.-Sino dispute could trigger a full-blown trade war and hasten deep, unintended damage including higher consumer prices, an expanded U.S. trade deficit, and a slowdown in U.S. economic growth.

Jonathan Davis, global vice president of industry advocacy at SEMI, the global association representing the electronics manufacturing supply chain, threw the industry’s weight behind protections for valuable intellectual property. But Davis argued that “if implemented as proposed, these tariffs will potentially cost tens of millions annually in additional taxes and lost revenue owing to reduced exports, threaten thousands of high-paying U.S. jobs, and not solve U.S. concerns with China.” Davis said the undue harm will ultimately undercut the ability of U.S. chipmakers to sell overseas, stifling innovation and curbing U.S. technological leadership.

In testimony at the hearing before the government panel that included representatives from the U.S. Trade Representative (USTR), Departments of Treasury, Commerce, State and Defense, and the Council of Economic Advisers, Davis explained that more than 100 lines – products defined for the purpose of setting import duties – of the proposed tariffs would hamstring the semiconductor supply chain. The tariff lines include fundamental components of the semiconductor manufacturing process that are oxygen for the chip industry. As part of his testimony, Davis also submitted comments on the impact of the tariffs.

Charles Gray, general counsel at Teradyne, who also testified at the hearing, explained that the tariffs will threaten growth while penalizing U.S. companies with supply chains that touch China. Gray and Davis were among more than 100 industry leaders who provided more than 3,000 comments in the May 15-17 hearing to evaluate the impact and efficacy of the proposed tariffs.

The hearing followed the Trump administration’s heated, longstanding criticism of China for what it considers unfair trade practices, focusing specifically on intellectual property violations. In recent months, the administration has begun implementing trade actions against China that will increase tariffs, restrict cross-border investment, and introduce significant uncertainty for U.S. businesses.

The Section 301 investigation that determined China’s forced transfer of technology and intellectual property discriminated against U.S. firms prompted a proposed 25 percent tariff on $50 billion in U.S. imports from China – a punitive measure that would squarely hit the semiconductor manufacturing industry.

SEMI continues to educate policymakers on the deep damage tariffs would exact on the long-term health of the semiconductor industry and the critical importance of balanced trade to the future of the semiconductor industry.

For more information on trade or how to participate in SEMI’s public policy program, please contact Jay Chittooran, SEMI public policy manager, at [email protected].

For the 20th year, a worldwide survey of semiconductor manufacturers has resulted in Plasma-Therm winning multiple awards for its systems and superior customer service.

In the annual Customer Satisfaction Survey conducted by VLSIresearch, Plasma-Therm earned a total of five awards, including two “RANKED 1st” awards. Plasma-Therm earned the highest scores of all companies in two award categories, “Etch & Clean Equipment” and “Focused Suppliers of Chip Making Equipment.”

Survey participants are asked to rate semiconductor equipment suppliers in 15 categories based on supplier performance, customer service, and product performance.

“The achievement of two ‘RANKED 1st’ awards and five awards overall is very gratifying” Plasma-Therm CEO Abdul Lateef said. “While we continue to expand our product and application portfolio, we never lose our focus on providing the best service and support. We are working harder than ever to ensure success for all our customers, from small institutions and start-ups to specialty fabs and high-volume manufacturers.”

In THE BEST Suppliers of Fab Equipment, which includes specialized manufacturers like Plasma-Therm as well as the world’s largest equipment makers, Plasma-Therm ranked higher than every other company besides ASML, the world’s largest maker photolithography supplier. Plasma-Therm also was ranked higher than all other suppliers besides ASML in THE BEST Suppliers of Fab Equipment to Specialty Chip Makers.

With this year’s awards, Plasma-Therm now has received a total of 42 awards over 20 years of participation in the Customer Satisfaction Survey. VLSIresearch received feedback from more than 94 percent of the chip market in this year’s survey, which was conducted over 2-1/2 months and in five languages. Here is the full list of awards earned by Plasma-Therm in the 2018 Customer Satisfaction Survey:

• RANKED 1st in FOCUSED SUPPLIERS OF CHIP MAKINGEQUIPMENT • RANKED 1st in ETCH & CLEAN EQUIPMENT
• 10 BEST FOCUSED SUPPLIERS OF CHIP MAKING EQUIPMENT
• THE BEST SUPPLIERS OF FAB EQUIPMENT

• THE BEST SUPPLIERS OF FAB EQUIPMENT TO SPECIALTY CHIP MAKERS About Plasma-Therm

Established in 1974, Plasma-Therm is a manufacturer of advanced plasma processing equipment for specialty semiconductor markets, including advanced packaging, wireless communication, photonics, solid-state lighting, MEMS/NEMS, nanotechnology, renewable energy, data storage, photomask, and R&D. Plasma-Therm offers etch and deposition technologies and solutions for these markets.