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Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that John Wall, corporate vice president of finance and corporate controller of Cadence, has been appointed senior vice president and chief financial officer of Cadence, effective October 1, 2017. Geoff Ribar, current CFO of Cadence, will remain with the company as a senior advisor until his previously announced retirement at the end of March 2018.

Mr. Wall, a 20-year Cadence executive, has been corporate controller for the past year-and-a-half, during which he has worked closely with Mr. Ribar to set and execute the company’s financial goals. He previously served as vice president of finance, where he was responsible for worldwide revenue accounting and sales finance, and was instrumental in development of the ratable revenue model and sales models that Cadence uses. At the beginning of his tenure with Cadence, Mr. Wall established the Cadence office in Dublin, Ireland, was European controller and implemented the company’s international tax structure.

“The Board of Directors and I are excited to appoint John Wall as the next CFO of Cadence,” said Lip-Bu Tan, president and chief executive officer of Cadence. “We are confident that John’s deep financial experience and knowledge about our business will serve us well as we build upon the important progress we have made with our System Design Enablement strategy, further expand Cadence’s position with customers and improve our financial position.”

Mr. Tan continued, “On behalf of the Board and the entire Cadence team, I want to express our deepest gratitude to Geoff Ribar for his significant contributions to Cadence’s excellent financial management over the last seven years as CFO. Geoff played a key role in building the financial foundation through which we steadily increased our operating margin and improved our performance. We look forward to continuing to benefit from his exceptional skill and leadership during the transition and wish him all the best for the future.”

Cadence has also appointed Michelle Quejado as corporate controller, reporting to Mr. Wall. Ms. Quejado was most recently interim CFO at Zynga Inc., where she also served as corporate controller and chief accounting officer. Prior to Zynga, she served in multiple financial executive positions at Lam Research Corporation, including assistant corporate controller.

Flex Logix Technologies, Inc., a supplier of embedded FPGA IP and software, today announced it has won the TSMC Open Innovation Platform’s Partner of the Year Award 2017 in the category of New IP for its EFLX embedded FPGA IP product.

“We are honored to win this prestigious award as it highlights the close alignment with TSMC that Flex Logix has achieved with its EFLX platform: EFLX embedded FPGA is available for TSMC 40nm, 28nm and 16nm process nodes with array sizes from 100 to >100K LUTs with options for DSP and any size/type of embedded RAM,” said Geoff Tate, CEO and co-founder of Flex Logix. “Flex Logix has worked closely with TSMC since the company was founded in 2014 and is proud to meet TSMC’s rigorous standards as an IP Alliance Member.”

Embedded FPGA is a new type of semiconductor IP enabling high-volume chip designers to incorporate reconfigurable logic to allow chips to be updated even in-system to adapt to new standards, new protocols, new algorithms and to customize chips for customers faster and more cost effectively than mask changes.

The award was presented during a ceremony at this year’s TSMC Open Innovation Platform Ecosystem Forum on September 13, 2017 in Santa Clara. Tate and Senior Vice President of Engineering Cheng Wang accepted the award on behalf of Flex Logix.

Lam Research Corp. (Nasdaq: LRCX), a global supplier of wafer fabrication equipment and services to the semiconductor industry, today announced it has recognized seven companies with Supplier Excellence Awards. Selected from among Lam’s extensive list of preferred global suppliers, the 2017 award winners represent partners who have demonstrated a deep commitment to collaboration and strategic operations in an evolving semiconductor industry.

“We are pleased to recognize the critical role our top suppliers play in the delivery of industry-leading products and services to our customers,” said Tim Archer, chief operating officer of Lam Research. “Lam’s business operations continue to grow—in scale, complexity, and geographic footprint. All of the suppliers recognized today demonstrate a commitment to innovation, collaboration, and partnership that will be increasingly important to our future. We are pleased to honor the achievements of these remarkable companies with our 2017 Supplier Excellence Awards.”

Award recipients were announced on September 12 at the company’s 2017 Supplier Day event, during which Lam Research focused on enhancing collaboration and renewing opportunities for mutual success with its customers and suppliers. Executives from suppliers around the world attended the event, where the following seven companies were recognized.

  • Edwards Vacuum
  • HORIBA, Ltd.
  • ILSHIN Precision Co. Ltd.
  • MKS Instruments, Inc.
  • Tokai Carbon Korea Co. Ltd.
  • TOTO, Ltd.
  • Ultra Clean Technology

SPTS Technologies, an Orbotech company and a supplier of advanced wafer processing solutions for the global semiconductor and related industries, today announced that it has been selected by Chipmore Technology Corporation Limited, an LCD driver integrated chip (IC) packaging specialist, to supply physical vapor deposition (PVD) solutions for the under bump metallization (UBM) and redistribution layers (RDL) for their flip-chip packaging line.   Chipmore chose the Sigma® fxP PVD solution for their new copper (Cu) bumping line, as it provides superior results and lowest cost of ownership over competitor systems.

“Consumer demand for high-end smartphones and other mobile devices with higher resolution screens are driving the rapid growth of advanced display driver IC’s,” stated Mr. Kevin Crofton, Corporate Vice President at Orbotech and President of SPTS Technologies. “Our Sigma fxP PVD system provides Chipmore with the most cost effective means to expand their bumping capacity to meet the demand from display-driver IC manufacturers.” 

Mr. Sampus Yang, Vice President at Chipmore stated: “Chipmore offers a range of bumping solutions for our global customers, ranging from high-end gold bumping to cost-effective copper bumping for flip chip packaging. SPTS’s Sigma fxP PVD system produces high quality copper pillars with excellent throughput and low cost of ownership, which allows us to remain competitive in a highly cost-sensitive market. The additional bumping capability will allow us to capitalize on consumers’ growing appetite for higher resolution LCD displays and strengthen our reputation as a top packaging services company.”

JoshThe Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, today announced Josh Shiode has joined the association as government affairs director. In this role, Shiode will help advance the U.S. semiconductor industry’s key legislative and regulatory priorities related to semiconductor research and technology, product security, and high-skilled immigration, among others. He also will serve as a senior representative of the industry before Congress, the White House, and federal agencies.

“The U.S. semiconductor industry is a key driver of America’s economic strength, national security, and global technology leadership,” said John Neuffer, SIA president and CEO. “Josh Shiode’s extensive knowledge, skills, and experience will make him an ideal advocate for our industry’s policy priorities in Washington, D.C. We’re thrilled to welcome him to the SIA team and look forward to his help advancing initiatives that promote growth and innovation in our industry and throughout the U.S. economy.”

Shiode most recently served as senior government relations officer at the American Association for the Advancement of Science (AAAS), where he helped guide the association’s science and technology advocacy before the executive and legislative branches. Previously, Shiode was a public policy fellow at the American Astronomical Society (AAS), where he helped develop and implement AAS’s government advocacy strategies. Shiode holds a doctorate in astrophysics from the University of California, Berkeley and a bachelor’s degree in astronomy and physics from Boston University.

Entegris Inc. (NASDAQ: ENTG), a specialty materials provider, today announced the expansion of its Taiwan Technology Center for Research and Development (TTC) in Hsinchu, Taiwan.  The expansion adds a new Microcontamination Control Lab (MCL) that focuses on filtration media development and is home to the company’s relocated Asia Applications and Development Labs (AADL) for trace metal, organic contaminant, and nanoparticle analysis. This addition to the Center’s existing R&D, formulation scale-up, and pilot production capabilities also creates a single, off-site collaboration location for our customers’ specialty chemical, CMP and liquid filtration needs.

Key facts for the $8.5 million USD investment:

  • Class 1000 cleanroom
  • 5x increase in lab space
  • Facility renovations and equipment upgrades

“Interactions and dependencies between process materials and equipment are at a critical evolution point as device scaling continues to be a leading driver for efficient construction of today’s devices. Bringing the industry’s brightest minds together in a state-of-the-art facility enhances Entegris’ unique ability to meet these needs,” offered Entegris Chief Operations Officer, Todd Edlund. “By expanding the MCL facility, we bring together core-competencies in liquid filtration, specialty chemicals, and CMP to create more holistic analytical services and technology development solutions designed to meet our customer’s Logic, DRAM, and 3D NAND device manufacturing challenges.”

For more information on the new TTC and upgraded MCL lab, please visit the Entegris product display area, booth #176, during SEMICON Taiwan, Sept. 13-15, 2017, at the Taipei Nangang Exhibition Center.

SEMI, the global industry association representing the electronics manufacturing supply chain, today reported that worldwide semiconductor manufacturing equipment billings reached US$14.1 billion for the second quarter of 2017.

Quarterly billings of US$14.1 billion represent an all-time historic record for quarterly billings, exceeding the record level set in the first quarter of this year. Billings for the most recent quarter are 8 percent higher than the first quarter of 2017 and 35 percent higher than the same quarter a year ago. Sequential regional growth was mixed for the most recent quarter with the strongest growth exhibited by Korea. Korea maintained the largest market for semiconductor equipment for the year, followed by Taiwan and China. The data are gathered jointly with the Semiconductor Equipment Association of Japan (SEAJ) from over 95 global equipment companies that provide data on a monthly basis.

The quarterly billings data by region in billions of U.S. dollars, quarter-over-quarter growth and year-over-year rates by region are as follows:

2Q2017
1Q2017
2Q2016
2Q2017/1Q2017

(Qtr-over-Qtr)
2Q2017/2Q2016

(Year-over-Year)
Korea
4.79
3.53
1.53
36%
212%
Taiwan
2.76
3.48
2.73
-21%
1%
China
2.51
2.01
2.27
25%
11%
Japan
1.55
1.25
1.05
24%
47%
North America
1.23
1.27
1.20
-3%
3%
Europe
0.66
0.92
0.37
-29%
76%
Rest of World
0.62
0.63
1.31
-1%
-53%
Total
14.11
13.08
10.46
8%
35%

Source: SEMI (http://www.semi.org) and SEAJ (http://www.seaj.or.jp)

The Equipment Market Data Subscription (EMDS) from SEMI provides comprehensive market data for the global semiconductor equipment market.

Upbeat about the growth prospects of Taiwan’s electronics sector, more than 45,000 visitors are expected to attend SEMICON Taiwan 2017 which opens tomorrow at Taipei’s Nangang Exhibition Center.  SEMICON Taiwan (September 13-15), the premier tradeshow and event for the electronics manufacturing supply chain, aims to connect the electronics manufacturing ecosystem─ both vertically and horizontally. The event will provide an overview of market trends and leading technologies in the industry, with forums and business-matching activities which will enable collaboration and new opportunities. The three-day event features 700 exhibitors covering over 1,800 booths.

Taiwan is forecast to spend US$12.3 billion in 2017, making it the second largest fab equipment spending region, according to the SEMI World Fab Forecast report just issued.  Taiwan is home to the leading share of the world’s IC foundry, and has the largest share of installed capacity ─ more than 20 percent. With 2017’s large semiconductor equipment investment, Taiwan’s semiconductor industry is booming and is also the world’s largest consumer of semiconductor materials ($9.8 billion in 2016) for the seventh consecutive year, bringing new opportunities in this increasingly critical sector.

Covering the hottest electronics topics like smart manufacturing and automation, high-tech facility, materials, laser, and emerging semiconductor technology, more than 70 presentations will be given on TechXPOT stages, providing the latest technology updates plus opportunities to meet potential partners and customers. To further connect attendees and exhibitors, SEMICON Taiwan will facilitate a series of networking events, like the Materials, High-Tech Facility, Laser, and Smart Manufacturing “Get Togethers” and the Supplier Search Program, creating business opportunities.

This year SEMICON Taiwan has added new theme pavilions including Circular Economy, Compound Semiconductor, Laser, and Opto Semiconductor.  In addition, 12 theme pavilions and eight country/region pavilions are featured.

This is the first year that the International Test Conference (ITC) will be co-located with SEMICON Taiwan 2017, also marking the first time that ITC is held in Asia. The conference will focus on the rapid growth of emerging applications like IoT and automotive electronics, and how testing technologies are challenged by rapid advancements of manufacturing processes, 3D stacking and SiP.

Also co-located with SEMICON Taiwan 2017, the SiP Global Summit will discuss three key system-in-package topics:

  •  Package Innovation in Automotive
  •  3D IC, 3D interconnection for AI and High-end Computing
  •  Innovative Embedded Substrate and Fan-Out Technology to Enable 3D-SiP Devices

The Jing Jing Lucky Draw is always an anticipated show activity with excellent prizes like the Dyson 3-in-1 smart fan, iPad Pro, and Nintendo Switch.

For more information about SEMICON Taiwan 2017, please visit http://www.semicontaiwan.org.

The eBeam Initiative, a forum dedicated to the education and promotion of new semiconductor manufacturing approaches based on electron beam (eBeam) technologies, today announced the completion of its sixth annual eBeam Initiative perceptions survey. Industry luminaries representing 40 companies from across the semiconductor ecosystem–including photomasks, electronic design automation (EDA), chip design, equipment, materials, manufacturing and research–participated in this year’s survey. The eBeam Initiative also completed its third annual mask makers’ survey with feedback from 10 captive and merchant photomask manufacturers.

Among the results of the perceptions survey, respondents are notably more optimistic about the implementation of EUV lithography for semiconductor high-volume manufacturing (HVM). In addition, expectations on the use of multi-beam mask writing technology for HVM remain high. At the same time, a solid majority of respondents believe that the throughput of variable shaped beam (VSB) mask writing systems is still adequate for the next few years. Results from the eBeam Initiative’s third annual mask makers’ survey indicate that mask write times remain consistent compared with last year’s survey, while responses to several new survey questions pointed to new requirements and challenges for mask makers. These include significantly greater mask data preparation time for finer masks, and a significant rise in the use of mask process correction (MPC) below 16-nm ground rules.

Aki Fujimura, CEO of D2S, the managing company sponsor of the eBeam Initiative, will present the results of the mask makers’ survey in an invited talk this morning at the SPIE Photomask Technology Symposium in Monterey, Calif. In addition, the complete results of both surveys will be discussed by an expert panel later today during the eBeam Initiative’s annual members meeting held in conjunction with the SPIE Photomask Technology Symposium, and will be available for download following the meeting at www.ebeam.org.

Highlights from eBeam Initiative Perceptions Survey

  • 75 percent of respondents predict that EUV will be used in HVM by the end of 2020.
  • The belief that actinic mask inspection for EUV will eventually be used grew significantly, with only 7 percent of respondents indicating it would never be used in HVM, compared to 21 percent of respondents in last year’s survey.
  • 74 percent of respondents predicted that multi-beam technology will be used in mask writing for HVM by the end of 2019. While the weighted average of the expected time for HVM implementation shifted 10 months compared to what last year’s respondents predicted, expectation of multi-beam adoption increased over last year’s survey.
  • While the majority of respondents agree that multi-beam mask writing will be adopted soon, 61 percent also believe that the throughput of current VSB mask writing systems is still adequate for the next few years.
  • 70 percent of respondents believe that inverse lithography technology (ILT) is being used in at least a few critical layers of leading-edge-node production chips today (2017).

Highlights from Mask Makers Survey (data from July 2016 to June 2017)

  • Mask write times have remained consistent compared with last year.
  • At the same time, the weighted average of the mask turnaround time (TAT) is significantly greater for more critical layers, approaching 12 days for 7-nm to 10-nm ground rules.
  • Data prep error was the leading cause of mask returns (28 percent) identified by respondents.
  • The weighted average of mask data preparation time is also significantly greater for finer masks, exceeding 21 hours for 7-nm to 10-nm ground rules.
  • MPC is being applied to over one-third of all masks at 11-nm to 15-nm ground rules. With sub-7-nm ground rules, this increased to 72 percent of all masks reported by respondents.

“We would like to thank everyone for their participation in this year’s annual perceptions survey and mask makers’ survey,” stated Fujimura. “Every year, interest in these surveys continue to grow from throughout the mask-making and semiconductor ecosystem. Participation in the perceptions survey grew from 30 to 40 companies this year, while the mask makers’ survey continues to include leading-edge mask makers from around the globe.”

Added Fujimura, “In the perceptions survey, feedback clearly indicates that EUV has turned a corner, with nearly all respondents anticipating that it will be used in semiconductor HVM at some point in the future. This marks a sizeable shift from only three years ago, when one-third of survey respondents believed that EUV would never see HVM adoption. Also interesting are the responses related to multi-beam technology, where confidence remains high but predictions of its expected insertion point have been extended by nearly a year. In the mask makers’ survey, a new question validated a clear trend on the use of MPC below 16-nm ground rules, partially resulting in the significant increases in data preparation time for masks with finer ground rules.”

EV Group (EVG), a supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced it has received multiple orders for its comprehensive portfolio of manufacturing equipment and services designed to address the burgeoning demand for wafer-level optics (WLO) and 3D sensing. The market-leading portfolio comprises the EVG 770 automated UV-nanoimprint lithography (UV-NIL) stepper for step-and-repeat master stamp fabrication, the IQ Aligner UV imprinting system for wafer-level lens molding and stacking, and the EVG 40 NT automated measurement system for alignment verification. EVG’s WLO solutions are supported by the company’s NILPhotonics Competence Center, which leverages field-proven process and equipment know-how to support emerging photonic applications and significantly shorten time to market through fast process implementation and optimization, as well as through customized equipment design.

Using imprint lithography and bond-alignment technologies to fabricate microlenses, diffractive optical elements and other optical components at the wafer-level provides numerous benefits. These include lowering cost of ownership through highly parallel fabrication processes, as well as enabling smaller form factors of the final devices through stacking. EVG is both a pioneer and market leader in nanoimprint lithography and micromolding with the largest installed base of tools worldwide.

“We are seeing a steep increase in the demand for equipment enabling wafer-level optics,” confirmed Dr. Thomas Glinsner, corporate technology director for EV Group. “Since the beginning of this year alone, we have shipped multiple systems for lens molding and stacking as well as metrology to major WLO manufacturers for high-volume production. Such orders are further strengthening EVG’s position as the market leader in this area, while creating a wealth of new opportunities in emerging applications.”

Industry-leading device makers have recently announced plans to broaden their business targets in the sensing space to help address customers’ increasingly aggressive time-to-market windows. According to market research and strategy consulting firm Yole Développement, more than a dozen types of sensors are being designed into next-generation smartphones. These include 3D sensing cameras, fingerprint sensors, iris scanners, laser diode emitters, laser rangers and biosensors. Overall, the optical hub is expected to grow from $10.6 billion in 2016 to $18 billion by 2021, showing a compound annual growth rate of more than 11 percent.

Demand for EVG’s WLO manufacturing solutions is driven in part by the need for novel optical sensing solutions and devices for mobile consumer electronics products. Key examples include 3D sensing (essential for more authentic virtual and augmented reality (VR/AR) user experiences), biometric sensing (increasingly critical for security applications), environmental sensing, infrared (IR) sensing and camera arrays. Other applications include additional optical sensors in smartphones for advanced depth sensing to improve camera autofocus performance, and micro displays.

“There is undoubtedly a highly sustainable trend emerging in wafer-level optics and 3D sensing,” stated Markus Wimplinger, EV Group’s corporate technology development and IP director. “We foresee even broader adoption of this technology in the near future due to the large number of ongoing customer projects supported by our NILPhotonics Competence Center located at our corporate headquarters.”