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eVaderis, a semiconductor IP start-up that provides design solutions to improve the functionality, power efficiency and performance of its customers’ semiconductor chips, has successfully demonstrated a fully functioning design platform through an ultra-low-power microcontroller (MCU) in Beyond Semiconductor‘s BA2X product line. The software, system and memory IP developed by eVaderis make Beyond Semiconductor’s new MCU ideally suited for battery-powered applications in IoT and wearable electronics.

By incorporating the latest perpendicular, spin-transfer-torque magnetoresistive random-access memory (STT-MRAM) technology from international R&D institute Imec, Beyond Semiconductor’s new MCU can achieve non-volatile operation with high-speed read/write and low voltage. In addition, the device is designed for manufacturability using GLOBALFOUNDRIES’ 40-nm low-power CMOS production process.

“The tape-out of this innovative MRAM-based, memory-centric MCU demonstrates our proficiency in disruptive, non-volatile embedded IP design and flow for low-power, digital devices,” said Virgile Javerliac, deputy CEO and head of technology and marketing at eVaderis. “We now plan to license the underlying IP to semiconductor manufacturers making sub-40-nm chips.”

“Power consumption is still the key challenge for any battery-powered device,” said Matjaz Breskvar, Beyond Semiconductor’s CEO. “We have been working with eVaderis since the company’s inception to jointly realize a vision of battery-powered, always-on devices with unprecedented energy efficiencies.”

Three megabits (3 Mb) of on-chip memory are fully distributed across the system though different instances, covering different functions such as working memory, configuration, state retention, code execution and data storage. eVaderis’ memory IP architectures are built to be compiler-friendly, helping chip makers to achieve faster time to market.

eVaderis’ innovative memory-centric architecture based on embedded MRAM technology allows a MCU to achieve power, performance and functional gains at the system and software levels. These gains include for instance energy-efficient, non-volatile checkpointing or normally-off/instant-on operation with near zero latency boot.

The SEMI European 3D Summit will make its Dresden, Germany, debut  22-24 January, 2018, featuring a broader scope of 3D topics driving innovation and business opportunities in the 3D market. The event will highlight the latest 3D technologies including 3DIC Through-Silicon-Via (TSV), 2.5D, 3D FO-WLP/ e-WLB, glass interposers, thermal management and 3D alternative technologies for heterogeneous integration and high-density systems.

A market briefing on the latest business challenges and opportunities in the 3D sector will kick off the summit, with 3D and packaging industry experts presenting their exclusive business and market insights and analysis confirming the huge forecast growth of advanced packaging. Keynotes and presentations on the current adoption of 3D applications such as high-end memory, performance, mobile, imaging and automotive will highlight this 6th edition of SEMI European 3D Summit.

Sold-out for five years straight, the European 3D Summit will showcase the leading names in 3D integration microelectronics manufacturing and offer numerous networking opportunities including a gala dinner and cocktail hour, along with frequent coffee and lunch break mixers. In addition, attendees will meet emerging new talent engaged in the future of 3D integration including Sabrina Fadloun, PhD student and senior field process engineer, SPTS Technologies, and September 2017 winner of the international competition “My Thesis in 180 Seconds.”

The European 3D Summit will showcase speakers from companies such as Third Millennium Test Solutions (3MTS), Amkor Technology, CEA-Leti, Chipworks, Epcos, Fraunhofer, GLOBALFOUNDRIES, Hewlett Packard, Huawei, IBM, IMEC, Intel, ProPrincipia, Qualcomm, Silex, ST Microelectronics, SMIC, TechSearch, Tessera Xperi, Université de Sherbrooke, Western Digital, X-Fab and Yole Développement.

Featuring a huge supplier base, Dresden is home to some of Europe’s largest fabs, from GLOBALFOUNDRIES, Infineon, and X-FAB to a new 300mm BOSCH fab.

Premium Sponsors of the European 3D Summit are SPTS Technologies (platinum sponsor), ASE Group (gold sponsor), Suss MicroTec Group (silver sponsor), EV Group and Trymax (event sponsor)

Please find more registration information at www.semi.org/eu/European-3D-Summit-2018-Register. For more information on the show, please visit www.semi.org/eu/european-3d-summit-2018 or contact Mr. Michael Kaiser, Senior Manager Business Development, SEMI Europe (email: [email protected] or tel. +49 30 3030 8077 10).

United Microelectronics Corporation (NYSE:UMC;TWSE:2303) (“UMC”), a global semiconductor foundry, today announced the availability of the company’s 40nm process platform that incorporates Silicon Storage Technology’s (SST) embedded SuperFlash non-volatile memory. The newly available 40nm SST process features a >20% reduction in eFlash cell size and 20-30% macro area over UMC’s mass production 55nm SST technology. Toshiba Electronic Devices & Storage Corporation has started studying technical feasibility of UMC’s 40nm SST for their microcontroller (MCU) ICs.

“We expect that UMC’s 40nm SST will improve the performance of our MCU products,” said Toshiya Matsui, Vice President, Mixed Signal IC Division of Toshiba Electronic Devices & Storage Corporation “Working with UMC will also allow us to maintain a robust business continuity plan (BCP) through stable manufacturing supply and flexible capacity support based on our production requirements.”

More than 20 customers and products are in various stages of 55nm SST eFlash production at UMC, including those for SIM card, banking, automotive, IOT, MCU and other applications.

Wenchi Ting, Associate VP of Specialty Technology division at UMC said, “Since qualifying SST’s embedded flash technology on our popular 55nm process in 2015, we have received tremendous interest from customers looking to further utilize the low power, high reliability, superior data retention and high endurance characteristics of this process platform for their automotive, industrial, consumer and IoT applications. We are pleased to introduce this eNVM solution on our 40nm platform, and look forward to bringing the high speed and high reliability benefits of SST to Toshiba and our other foundry customers.”

UMC’s robust SST process performs according to JEDEC standards, with 100k endurance and more than 10 years of data retention at 85C and an operating-temperature range of -40C to 125C. In addition to the 40nm SST process, UMC has over 20 customers in production using the foundry’s 55nm SST for a broad range of product applications.

Researchers at the Center for Integrated Nanostructure Physics, within the Institute for Basic Science (IBS), have shown that defects in monolayer molybdenum disulfide (MoS2) exhibit electrical switching, providing new insights into the electrical properties of this material. As MoS2 is one of the most promising 2D semiconductors, it is expected that these results will contribute to its future use in opto-electronics.

The study on 2-D molybdenum disulfide (MoS2) defects employed low frequency noise measurements and conductive atomic force microscopy (C-AFM). The enlarged image shows an AFM cantilever tip pointing to an area with one sulfur monovacancy (area shaded red). As current flows through the AFM tip and the sample, switching events between different ionization states (neutral and charged -1) are measured. With a radius of around 25 nanometers, the AFM tip covers an area that contains around 1-8 sulfur monovacancies. Credit: IBS, published on Nature Communications

The study on 2-D molybdenum disulfide (MoS2) defects employed low frequency noise measurements and conductive atomic force microscopy (C-AFM). The enlarged image shows an AFM cantilever tip pointing to an area with one sulfur monovacancy (area shaded red). As current flows through the AFM tip and the sample, switching events between different ionization states (neutral and charged -1) are measured. With a radius of around 25 nanometers, the AFM tip covers an area that contains around 1-8 sulfur monovacancies. Credit: IBS, published on Nature Communications

Defects can cause major changes in the properties of a material, leading to either desirable or unwanted effects. For example, petrochemical industry has long taken advantage of the catalytic activity of MoS2edges, characterized by the presence of a high concentration of defects, to produce petroleum products with reduced sulfur dioxide (SO2) emissions. On the other hand, having a pristine material is a must in electronics. Currently, silicon rules the industry, because it can be prepared in a virtually defect-free manner. In the case of MoS2, its suitability for electronic applications is currently limited by the presence of naturally occurring defects. So far, the precise link between these defects and the degraded properties of MoS2 has been an open question.

In IBS, a team of physicists, material scientists, and electrical engineers worked closely together to explore the electronic properties of sulfur vacancies in MoS2 monolayers, using a combination of atomic force microscopy (AFM) and noise analysis. The scientists used a metallic AFM tip to measure the noise signal, i.e., the variation of electrical current passing through a single layer of MoS2 placed on a metal substrate.

The most common defects in MoS2 are instances of missing single sulfur atoms, also known as sulfur monovacancies. In a perfect sample, each sulfur atom has two valence electrons that bind to two molybdenum electrons. However, where a sulfur atom is missing, these two molybdenum electrons are left unsaturated, defining the neutral state (0 state) of the defect. However, the team observed rapid switching events in their noise measurements, indicating the state of the vacancy switched between neutral (0 state) and charged (-1 state).

“The switching between 0 and -1 is happening continuously. While an electron resides at the vacancy for a while, it is missing from the current, such that we observe a current drop,” explains Michael Neumann, one of the co-first authors of the study. “This goes a long way towards understanding the known anomalies of MoS2, and it is very interesting that sulfur vacancies alone are enough to explain these anomalies, without requiring more complex defects.” According to the experiments and earlier calculations, two electrons can be also trapped at the vacancy (-2 state), but this does not seem to be energetically favored.

The new observation that sulfur vacancies can be charged (-1 and -2 states) sheds light on several MoS2 anomalies, including its reduced electron mobility observed in MoS2 monolayer samples: electrons move following the direction of an applied voltage, but get scattered by charged defects. “The -1 state is occupied around 50% of the time, which would lead to scattering of electrons, and thus explain why MoS2 has such poor mobility,” clarifies Neumann. Other MoS2 characteristics which can be explained by this study are the n-type doping of MoS2, and the unexpectedly large resistance at the MoS2-metal junction.

“This research opens up the possibility of developing a new noise nanospectroscopy device capable of mapping one or more defects on a nanoscale scale over a wide area of a 2D material,” concludes the corresponding author Young Hee Lee.

The full study is available on Nature Communications.

In today’s “internet of things,” devices connect primarily over short ranges at high speeds, an environment in which surface acoustic wave (SAW) devices have shown promise for years, resulting in the shrinking size of your smartphone. To obtain ever faster speeds, however, SAW devices need to operate at higher frequencies, which limits output power and can deteriorate overall performance. A new SAW device looks to provide a path forward for these devices to reach even higher frequencies.

A team of researchers in China has demonstrated a SAW device that can achieve frequencies six times higher than most current devices. With embedded interdigital transducers (IDTs) on a layer of combined aluminum nitride and diamond, the team’s device was also able to boost output significantly. Their results are published this week in Applied Physics Letters, from AIP Publishing.

“We have found the acoustic field distribution is quite different for the embedded and conventional electrode structures,” said Jinying Zhang, one of the paper’s authors. “Based on the numerical simulation analysis and experimental testing results, we found that the embedded structures bring two benefits: higher frequency and higher output power.”

Surface acoustic wave devices transmit a high-frequency signal by converting electric energy to acoustic energy. This is often done with piezoelectric materials, which are able to change shape in the presence of an electric voltage. IDT electrodes are typically placed on top of piezoelectric materials to perform this conversion.

Ramping up the operational frequency of IDTs — and the overall signal speed — has proven difficult. Most current SAW devices top out at a frequency of about 3 gigahertz, Zhang said, but in principle it is possible to make devices that are 10 times faster. Higher frequencies, however, demand more power to overcome the signal loss, and in turn, some features of the IDTs need to be increasingly small. While a 30 GHz device could transmit a signal more quickly, its operational range becomes limited.

“The major challenge is still the fabrication of the IDTs with such small feature sizes,” Zhang said. “Although we made a lot of efforts, there are still small gaps between the side walls of the electrodes and the piezoelectric materials.”

To ensure that the transducers had the proper feature size, Zhang’s team needed a material with a high acoustic velocity, such as diamond. They then coupled diamond, a material that changes its shape very little with electric voltage, with aluminum nitride, a piezoelectric material, and embedded the IDT inside their new SAW device.

The resulting device operated at a frequency of 17.7 GHz and improved power output by 10 percent compared to conventional devices using SAWs.

“The part which surprised us most is that the acoustic field distribution is quite different for the embedded and conventional electrode structures,” Zhang said. “We had no idea at all about it before.”

Zhang said she hopes this research will lead to SAW devices used in monolithic microwave integrated circuits (MMICs), low-cost, high-bandwidth integrated circuits that are seeing use in a variety of forms of high speed communications, such as cell phones.

The coldest chip in the world


December 20, 2017

Physicists at the University of Basel have succeeded in cooling a nanoelectronic chip to a temperature lower than 3 millikelvin. The scientists from the Department of Physics and the Swiss Nanoscience Institute set this record in collaboration with colleagues from Germany and Finland. They used magnetic cooling to cool the electrical connections as well as the chip itself. The results were published in the journal Applied Physics Letters.

Even scientists like to compete for records, which is why numerous working groups worldwide are using high-tech refrigerators to reach temperatures as close to absolute zero as possible. Absolute zero is 0 kelvin or -273.15°C. Physicists aim to cool their equipment to as close to absolute zero as possible, because these extremely low temperatures offer the ideal conditions for quantum experiments and allow entirely new physical phenomena to be examined.

A chip with a Coulomb blockade thermometer on it is prepared for experiments at extremely low temperatures. Credit: University of Basel, Department of Physics

A chip with a Coulomb blockade thermometer on it is prepared for experiments at extremely low temperatures. Credit: University of Basel, Department of Physics

Cooling by turning off a magnetic field

The group led by Basel physicist Professor Dominik Zumbühl had previously suggested utilizing the principle of magnetic cooling in nanoelectronics in order to cool nanoelectronic devices to unprecedented temperatures close to absolute zero. Magnetic cooling is based on the fact that a system can cool down when an applied magnetic field is ramped down while any external heat flow is avoided. Before ramping down, the heat of magnetization needs to be removed with another method to obtain efficient magnetic cooling.

A successful combination

This is how Zumbühl’s team succeeded in cooling a nanoelectronic chip to a temperature below 2.8 millikelvin, thereby achieving a new low temperature record. Dr Mario Palma, lead author of the study, and his colleague Christian Scheller successfully used a combination of two cooling systems, both of which were based on magnetic cooling. They cooled all of the chip’s electrical connections to temperatures of 150 microkelvin – a temperature that is less than a thousandth of a degree away from absolute zero.

They then integrated a second cooling system directly into the chip itself, and also placed a Coulomb blockade thermometer on it. The construction and the material composition enabled them to magnetically cool this thermometer to a temperature almost as low as absolute zero as well.

“The combination of cooling systems allowed us to cool our chip down to below 3 millikelvin, and we are optimistic than we can use the same method to reach the magic 1 millikelvin limit,” says Zumbühl. It is also remarkable that the scientists are in a position to maintain these extremely low temperatures for a period of seven hours. This provides enough time to conduct various experiments that will help to understand the properties of physics close to absolute zero.

EPC announces the EPC2049 power transistor for use in applications including point of load converters, LiDAR, envelope tracking power supplies, class-D audio, and low inductance motor drives. The EPC2049 has a voltage rating of 40 V and maximum RDS(on) of 5 mΩ with a 175 A pulsed output current.

The chip-scale packaging of The EPC2049 handles thermal conditions far better than the plastic packaged MOSFETs since the heat is dissipated directly to the environment with chip-scale devices, whereas the heat from the MOSFET die is held within a plastic package. It measures a mere 2.5 mm x 1.5 mm (3.75 mm2). Designers no longer have to choose between size and performance – they can have both!

“The EPC2049 demonstrates how EPC and gallium nitride transistor technology is increasing the performance and reducing the cost of eGaN devices. The EPC2049 is further evidence that the performance and cost gap of eGaN technology with MOSFET technology continues to widen,” said Alex Lidow, EPC’s co-founder and CEO.

Intel today announced the availability of the Intel Stratix 10 MX FPGA, the industry’s first field programmable gate array (FPGA) with integrated High Bandwidth Memory DRAM (HBM2). By integrating the FPGA and the HBM2, Intel Stratix 10 MX FPGAs offer up to 10 times the memory bandwidth when compared with standalone DDR memory solutions. These bandwidth capabilities make Intel Stratix 10 MX FPGAs the essential multi-function accelerators for high-performance computing (HPC), data centers, network functions virtualization (NFV), and broadcast applications that require hardware accelerators to speed-up mass data movements and stream data pipeline frameworks.

In HPC environments, the ability to compress and decompress data before or after mass data movements is paramount. HBM2-based FPGAs can compress and accelerate larger data movements compared with stand-alone FPGAs. With High Performance Data Analytics (HPDA) environments, streaming data pipeline frameworks like Apache Kafka and Apache Spark Streaming require real-time hardware acceleration. Intel Stratix 10 MX FPGAs can simultaneously read/write data and encrypt/decrypt data in real-time without burdening the host CPU resources.

“To efficiently accelerate these workloads, memory bandwidth needs to keep pace with the explosion in data,” said Reynette Au, vice president of marketing, Intel Programmable Solutions Group. “We designed the Intel Stratix 10 MX family to provide a new class of FPGA-based multi-function data accelerators for HPC and HPDA markets.”

The Intel Stratix 10 MX FPGA family provides a maximum memory bandwidth of 512 gigabytes per second with the integrated HBM2. HBM2 vertically stacks DRAM layers using silicon via (TSV) technology. These DRAM layers sit on a base layer that connects to the FPGA using high density micro bumps. The Intel Stratix 10 MX FPGA family utilizes Intel’s Embedded Multi-Die Interconnect Bridge (EMIB) that speeds communication between FPGA fabric and the DRAM. EMIB works to efficiently integrate HBM2 with a high-performance monolithic FPGA fabric, solving the memory bandwidth bottleneck in a power-efficient manner.

Intel is shipping several Intel Stratix 10 FPGA family variants, including the Intel Stratix 10 GX FPGAs (with 28G transceivers) and the Intel Stratix 10 SX FPGAs (with embedded quad-core ARM processor). The Intel Stratix 10 FPGA family utilizes Intel’s 14 nm FinFET manufacturing process and incorporates packaging technology, including EMIB.

 

Researchers from North Carolina State University have found that the transfer of triplet excitons from nanomaterials to molecules also creates a feedback mechanism that returns some energy to the nanocrystal, causing it to photoluminesce on long time scales. The mechanism can be adjusted to control the amount of energy transfer, which could be useful in optoelectronic applications.

Pyrenecarboxylic acid-functionalized CdSe quantum dots undergo thermally activated delayed photoluminescence. Credit: Cedric Mongin

Pyrenecarboxylic acid-functionalized CdSe quantum dots undergo thermally activated delayed photoluminescence. Credit: Cedric Mongin

Felix N. Castellano, Goodnight Innovation Distinguished Chair of Chemistry at NC State, had previously shown that semiconductor nanocrystals could transfer energy to molecules, thereby extending their excited state lifetimes long enough for them to be useful in photochemical reactions.

In a new contribution, Castellano and Cédric Mongin, a former postdoctoral researcher currently an assistant professor at École normale supérieure Paris-Saclay in France, have shown that not only does the transfer of triplet excitons extend excited state lifetimes, but also that some of the energy gets returned to the original nanomaterial in the process.

“When we looked at triplet exciton transfers from nanomaterials to molecules, we noticed that after the initial transfer the nanomaterial would still luminesce in a delayed fashion, which was unexpected,” says Castellano. “So we decided to find out what exactly was happening at the molecular level.”

Castellano and Mongin utilized cadmium selenide (CdSe) quantum dots as the nanomaterial and pyrenecarboxylic acid (PCA) as the acceptor molecule. At room temperature, they found that the close proximity of the relevant energy levels created a feedback mechanism that thermally repopulated the CdSe excited state, causing it to photoluminesce.

Taking the experiment one step further, the researchers then systematically varied the CdSe-PCA energy gap by changing the size of the nanocrystals. This resulted in predictable changes to the resultant excited state lifetimes. They also examined this process at different temperatures, yielding results consistent with a thermally activated energy transfer mechanism.

“Depending on relative energy separation, the system can be tuned to behave more like PCA or more like the CdSe nanoparticle,” says Castellano. “It’s a control dial for the system. We can make materials with unique photoluminescent properties simply by controlling the size of the nanoparticle and the temperature of the system.”

More materials for electronic applications could be identified, thanks to the discovery of a new metal-organic framework (MOF) that displays electrical semiconduction with a record high photoresponsivity, by a global research collaboration involving the University of Warwick.

Research published today in Nature Communications shows how high photoconductivity and semiconductor behaviour can be added to MOFs – which already have a huge international focus for their applications in gas storage, sensing and catalysis.

The new work, conducted by Universities in Brazil, the United Kingdom and France – including researchers at Warwick’s Department of Chemistry – found that the new MOF has a photoresponsivity of 2.5 × 105 A.W-1- the highest ever observed.

The MOF has been prepared using cobalt (II) ions and naphthalene diimides and acid as ligands. The structure shows anisotropic redox conduction, according to the directions of the crystal lattice. The conduction mechanism is sensitive to light, and may be modified or modulated according to the incident wavelength.

Photoactive and semiconducting MOFs are rare but desirable for electrical and photoelectrical devices.

These results are the first of this kind concerning MOFs and are the starting point for the possibility of discovery of even more functional materials, displaying properties suitable for practical applications.

The potential for use in electronic components and photoconversion devices, such as solar cells and photocatalysts provides a very exciting future for such materials.

Professor Richard Walton, from Warwick’s Department of Chemistry, commented:

“The material we have discovered paves the way for new applications of a topical family of materials in many areas ranging from technology to energy conversion. We illustrate how MOFs that combine organic and inorganic components can produce unique functional materials from readily available chemicals.

“Our work was underpinned by Warwick’s strengthening collaborative links with Brazilian universities and our exceptional equipment for materials analysis “