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Eutelsat Communications (NYSE Euronext Paris: ETL),a satellite operator, and STMicroelectronics (NYSE: STM) have achieved a new milestone with a new-generation chip that will power Eutelsat’s SmartLNB interactive terminal.

ST’s advanced, low-power System-on-Chip (STiD337) represents a big step down in the overall cost of interactive satellite terminals. The STiD337’s first adoption is in Eutelsat’s SmartLNB, lowering cost, upgrading service, and significantly reducing power consumption.

The SmartLNB is an electronic feed that replaces the traditional Ku-band reception of DTH satellite signals, embedding one or more satellite tuners/demodulators directly inside the LNB (low-noise block) and adding a narrowband return link optimized for transmissions of IP packets. The SmartLNB enables a wide range of connected TV applications, providing a transparent bidirectional IP link compatible with existing services. Not limited to the TV and broadcast market, applications also cover the exploding sector of connected objects (Machine-to-Machine, Internet of Things, SCADA, home-automation, Smart Buildings, etc.) with a cost-effective solution via satellite.

ST has employed its very low-power 28nm FD-SOI (Fully Depleted Silicon on Insulator) process technology that enables deep sleep and auto wake up for the system. With a maximum 3.5W power dissipation at full speed and less than 50mW (typical) during sleep, the STiD337 is the most power-efficient device available today to take the SmartLNB to a new level of performance and efficiency.

The STiD337 adds the latest DVB-S2X satellite standard for the forward link, as well as GSE (Generic Stream Encapsulation) for efficient data handling; it can achieve throughput of over 100Mb/sec. The return path implements a software-radio approach that is optimized for the enhanced spread-spectrum technique with asynchronous access typically used for the SmartLNB. The device also includes the full complement of hardware mechanisms to support real-time multiple-access techniques. The return modulation is calculated on the internal processors. The platform includes a dual ARM Cortex-A9 core with NEON co-processors and four ST231 DSP offload coprocessors to enhance its compute power and ensure complete flexibility in the choice of return-channel modulation type.

The new SoC will be available in secure and standard versions. The secure version includes pre-loaded encryption keys, serial numbers, safe-boot, and many other features to increase the level of protection of data-delivering and gathering operations by the SmartLNB.

“We wanted a step change in the cost and performance for the next generation of our SmartLNB interactive service. We know from our customers that security is a major concern and we wanted to address that head on. Furthermore, with satellite terminals becoming more ubiquitous and employed in a greater range of use cases we needed to pay even greater attention to power consumption,” said Antonio Arcidiacono, Director of Innovation at Eutelsat. “The design objectives we set have all been met and we’re aiming to roll out higher-performance, lower-cost, secure, and above all, lower-power consumption SmartLNB terminals based on ST’s new satellite SoC by the end of 2017.”

“Working closely with Eutelsat, we’ve developed the lowest-cost, lowest-power, secure, and most advanced interactive satellite-modem SoC to date,” said Jocelyne Garnier, Group VP, General Manager, Aerospace, Defense, and Legacy Division, STMicroelectronics. “From the outset we knew we could bring innovations to the market that played to many of the strengths we have in ST, especially in digital satellite systems, our system-on-chip experience, our low-power technologies, and of course, our security IP.”

ST provides a hardware evaluation platform, a Linux-based operating system, and a basic driver set. Final production samples of the STiD337 are available now and full production is scheduled for May 2017. Further information is available on ST.com and under NDA.

Leti, a research institute of CEA Tech, today announced it has developed a shield that can help protect electronic devices against physical attacks from the chips’ backside. Integrated circuits (ICs) embedded in connected objects, smart cards or other systems dealing with sensitive data would benefit from this technology, which brings more privacy, safety and security to the users.

Physical attacks may occur when hackers have access to the device and can exploit weaknesses of the embedded IC to steal sensitive information or to corrupt its functioning. The shield proposed by Leti protects chips from invasive and semi-invasive attacks by infrared lasers, focused ion beams (FIB), chemicals and other means.

The shield consists of a metal serpentine sandwiched between two polymers, one being opaque to infrared and serving as a physical barrier against FIB attacks. It also hides the design of the chips’ serpentine and combines with the polymer underneath to detect chemical attacks. Altering the serpentine typically triggers the IC to delete sensitive data.

The shield is fabricated using standard packaging processes, which demonstrates that hardware cybersecurity can be implemented at low additional cost. Leti’s research results will be presented at this week’s Device Packaging Conference inFountain Hills, Arizona, in a paper entitled “Backside Shield against Physical Attacks for Secure ICs”.

“Implementation of multiple hardware and software countermeasures is making integrated circuits more secure, but the backside of a chip is still considered to be vulnerable to physical attacks,” said Alain Merle, Leti’s Security Strategic Marketing Manager. “Our team designed, fabricated and tested a novel protection structure combining several elements that will trigger an alert if hackers use the backside of a chip to access the active parts of the IC.”

Surface roughness reduction is a really big deal when it comes to fundamental surface physics and while fabricating electronic and optical devices. As transistor dimensions within integrated circuits continue to shrink, smooth metallic lines are required to interconnect these devices. If the surfaces of these tiny metal lines aren’t smooth enough, it substantially reduces their ability to conduct electrical and thermal energy — decreasing functionality.

A group of engineers at the University of Massachusetts Amherst are now reporting an advance this week in Applied Physics Letters, from AIP Publishing, in the form of modeling results that establish electrical surface treatment of conducting thin films as a physical processing method for reducing surface roughness.

Sequence of snapshots from a computer simulation of electric-field-driven morphological evolution of a copper thin film, demonstrating current-induced smooth surface. Credit: Du and Maroudas

Sequence of snapshots from a computer simulation of electric-field-driven morphological evolution of a copper thin film, demonstrating current-induced smooth surface. Credit: Du and Maroudas

“We’ve been thinking hard about this roughness problem for many years, since showing that electric currents can be used to inhibit surface cracking,” said Dimitrios Maroudas, co-author and a professor in the Department of Chemical Engineering. “So as soon as we developed the computational tools to attack the full film roughness problem, we got to work.”

The group’s work focused on using a copper film on a silicon nitride layer to quantify the model parameters for their simulations and make comparisons with available experimental findings, which they were able to reproduce.

“Surface electromigration is the key physical concept involved,” Maroudas explained. “It’s the directed transport of atoms on the metal surface due to the so-called electron wind force, which expresses the transfer of momentum from the electrons of the metal moving under the action of an electric field to the atoms (ions) — biasing atomic migration.”

Think of it as akin to the diffusion of ink in flowing water. “Electromigration’s role in the transport of surface atoms is analogous to that of convection due to flow on the transport of ink within the water,” Maroudas said. “The combined effects of a well-controlled applied electric field and rough surface geometry drive the atoms on the metal surface to move from the hills of the rough surface morphology to the neighboring valleys, which eventually smooth away the rough surfaces.”

This work is significant, particularly within the microelectronics realm, because it establishes the electrical treatment of metallic (conducting) films as a viable physical processing strategy for reducing their surface roughness.

“Our approach is qualitatively different than traditional mechanical polishing or ion-beam irradiation techniques,” said Lin Du, co-author and a doctoral student working with Maroudas. “It directly influences the driven diffusion of surface atoms precisely, which affects surface atomic motion and enables a smooth surface all the way down to the atomic level.”

The required electric field action can be conveniently controlled macroscopically: simply choose a direction, adjust the voltage, and flip a switch “on.”

“While studying the phenomenon, we discovered that a sufficiently strong electric field can bring the metallic surface to an atomically smooth state,” Du said. “The required electric field strength depends largely on the field direction and surface material properties of the metallic film — such as film texture and surface diffusional anisotropy, because in surfaces of crystalline materials diffusion is faster along certain preferred directions.”

A true irony here is that “electromigration is best known for its damaging effects within metallic interconnects — underlying crucial materials reliability problems in many generations of microelectronics,” Maroudas said.

As far as applications, since this work establishes the principles to create smoother conducting material surfaces, “it can be used for fabricating and processing nanoscale-thick metallic components within electronic and optical devices, which require atomic-scale smoothness,” Maroudas said. “The ability to reduce the surface roughness of metallic components, such as interconnects within integrated circuits, will significantly improve their performance as well as durability and reliability.”

What’s the next step for the engineers? “We’re currently exploring how the effectiveness of the method depends on the metallic film texture (or surface crystallographic orientation), the film’s wetting of the substrate, and the electric field direction with respect to certain surface crystallographic directions,” Maroudas said.

The group’s immediate goal is “to optimize the electrical treatment technique, and to identify the conditions for minimizing the required electric field strength, as well as the cost of applying this technique,” he added. “Our next natural step should be a partnership with an experimental laboratory with the proper expertise to carry out tests that will help us move from proof of concept to an enabling technology.”

Imec, the research and innovation hub in nano-electronics and digital technologies, today announced that their 200mm gallium nitride-on-silicon (GaN-on-Si) e-mode power devices with a pGaN gate architecture showed no degradation after heavy ion and neutron irradiation. The irradiation tests were performed in collaboration with Thales Alenia Space, a leader in innovative space systems. The results demonstrate that imec’s 200mm GaN-on-Si platform delivers state-of-the-art GaN-based power devices for earth as well as for space applications.

GaN-on-silicon transistors operate at higher voltages, frequencies and temperatures than their silicon counterparts. This makes them the ideal candidates for power conversion devices as they show less power losses in electricity conversion. First-generation GaN-based power devices are used today and will play a key role in the power conversion of future electronic devices such as battery chargers, smartphones, computers, servers, automotive, lighting systems and photovoltaics.

Imec has been  developing the next-generation of GaN-based power devices with improved performance and reliability. Imec’s latest 200mm GaN-on-Si platform shows good  wafer-to-wafer reproducibility and low dynamic Rdson. The platform is currently available for dedicated development or technology transfer to imec’s current and future partners.

imec Ron

Imec’s latest generation of  200mm GaN-on-Si e-mode pGaN devices were irradiated with heavy ions (Xenon) and neutrons. Pre and post irradiation tests revealed that there was no permanent degradation of transistor characteristics: no shifts in threshold voltage nor gate rupture. The excellent radiation hardness of imec’s devices is important, as it enables applications in space, where fluxes of heavy ions and neutrons can damage electronic circuits in satellites and space stations.

Thales Alenia Space Belgium has surveyed, since many years, the evolution in the field of wide band gap devices. These family of components is promising for a significant increase in performances. But, robustness to space radiation is mandatory for electronic devices in our equipment’s. The result obtained with Imec’s GaN-on-Si devices is an important step in the way to space based power conversion applications.

“These results are important to start using this promising technology for space applications. Also, it demonstrates that our 200mm GaN-on-Si platform has reached a high level of technology readiness and can be adopted by industry,” stated Rudi Cartuyvels, Executive Vice President at imec. “At imec, we use 200mm silicon substrates for GaN epitaxy and this technology can be used on 200mm CMOS-compatible infrastructure. Thanks to innovations in transistor architecture and substrate technology, we’ve succeeded in making GaN devices on larger wafer diameters than used today, which brings lower cost perspectives for the second generation of GaN-on-Si power devices. Imec is also looking beyond today’s technology, exploring novel substrates, higher level of integrations and novel devices.”

These results were achieved in the framework of the European Space Agency (ESA) project “ESA AO/1-7688/13/NL/RA”, GaN devices for space based DC-DC power conversion applications.

Andrew Barnes ESA Technical Officer overseeing the project stated: “GaN is a critical technology for future space missions with a wide range of potential applications, including smaller size, higher efficiency DC-DC power conversion subsystems. These results, obtained from the first phase of an ESA GSTP project, are important and show that the p-GaN devices developed by imec offer excellent radiation robustness for operation in space. In the second phase of the project it is planned to industrialize this technology in readiness for a future space qualification program”. The European Space Agency (ESA) is Europe’s gateway to space. Its mission is to shape the development of Europe’s space capability and ensure that investment in space continues to deliver benefits to the citizens of Europe and the world.

A chance observation of crystals forming a mark that resembled the stain of a coffee cup left on a table has led to the growth of customized polycrystals with implications for faster and more versatile semiconductors.

Thin-film semiconductors are the foundation of a vast array of electronic and optoelectronic devices. They are generally fabricated by crystallization processes that yield polycrystals with a chaotic mix of individual crystals of different orientations and sizes.

Significant advances in controlling crystallization has been made by a team led by Professor Aram Amassian of Material Science and Engineering at KAUST. The group included individuals from the KAUST Solar Center and others from the University’s Physical Science and Engineering Division in collaboration with Cornell University. Amassian said, “There is no longer a need to settle for random and incoherent crystallization.”

Crystallization behavior can be controlled locally, creating regions with different crystal patterns. Credit: KAUST 2017

Crystallization behavior can be controlled locally, creating regions with different crystal patterns. Credit: KAUST 2017

The team’s recent discovery began when Dr. Liyang Yu of the KAUST team noticed that a droplet of liquid semiconductor material dried to form an outer coffee-ring shape that was much thicker than the material at the center. When he induced the material to crystallize, the outer ring crystallized first.

“This hinted that local thickness matters for initiating crystallization,” said Amassian, which went against the prevailing understanding of how polycrystal films form.

This anomaly led the researchers to delve deeper. They found that the thickness of the crystallizing film could be used to manipulate the crystallization of many materials (see top image). Most crucially, tinkering with the thickness also allowed fine control over the position and orientation of the crystals in different regions of a semiconductor.

“We discovered how to achieve excellent semiconductor properties everywhere in a polycrystal film,” said Amassian. He explained that seeding different patterns of crystallization at different locations also allowed the researchers to create bespoke arrays that can now be used in electronic circuits (see bottom image).

This is a huge improvement to the conventional practice of making do with materials whose good properties are not sustained throughout the entire polycrystal nor whose functions at different regions can be controlled.

“We can now make customized polycrystals on demand,” Amassian said.

Amassian hopes that this development will lead to high-quality, tailored polycrystal semiconductors to promote advances in optoelectronics, photovoltaics and printed electronic components. The method has the potential to bring more efficient consumer electronic devices, some with flexible and lightweight parts, new solar power generating systems and advances in medical electronics. And all thanks to the chance observation of an odd pattern in a semiconductor droplet.

The team will now explore ways to move their work beyond the laboratory through industry partnerships and research collaborations.

At the CS International Conference (Brussels, March 7-8), imec will present promising device results with a InGaAs-only TFET (tunnel field-effect transistor). Achieving a sub-60 mV/decade sub-threshold swing at room temperature, these devices are promising candidates to replace MOSFET transistors in future chip generations for ultralow-power applications operating on ultralow supply voltages.

TFETs exploit a different mechanism to inject carriers than MOSFETs, the most dominant transistor type today. While MOSFETs introduce carriers from the source into the conducting channel by thermal injection, a TFET works through band-to-band tunneling (BTBT). With that, they promise sub-threshold swings smaller than 60mV/dec, which is below the limit of what is possible with MOSFETs. This would allow operating them at ultralow supply voltages (below 0.5V).

The device developed at imec is an InGaAs homojunction TFET. It shows a minimum sub-threshold swing of 54mV/dec at 100pA/mm. The sub-threshold swing remains sub-60mV/dec over 1.5 orders of magnitude of current at room temperature. The EOT of the devices is 0.8nm, which plays a major role in achieving the desired sub-60 mV/dec performance.

“We have entered an era where new chip technologies require making trade-offs between power, performance, cost and area. And these trade-offs will be considered separately for different application domains,” says Nadine Collaert, distinguished member of technical staff at imec. “TFETs will most probably find their place in the ultralow-power segment. Many applications in the future require transistors to work at low power and low voltage, such as the many Internet of Things applications.

At CS International, imec’s expert Nadine Collaert will discuss the progress made and challenges ahead in processing TFETs, focusing on the materials and integration, but also on the impact of using TFETs in electronic circuits.

A new optical nanosensor enabling more accurate measurement and spatiotemporal mapping of the brain also shows the way forward for design of future multimodal sensors and a broader range of applications, say researchers in an article published in the current issue of Neurophotonics. The journal is published by SPIE, the international society for optics and photonics.

Neuronal activity results in the release of ionized potassium into extracellular space. Under active physiological and pathological conditions, elevated levels of potassium need to be quickly regulated to enable subsequent activity. This involves diffusion of potassium across extracellular space as well as re-uptake by neurons and astrocytes.

Measuring levels of potassium released during neural activity has involved potassium-sensitive microelectrodes, and to date has provided only single-point measurement and undefined spatial resolution in the extracellular space.

With a fluorescence-imaging-based ionized-potassium-sensitive nanosensor design, a research team from the University of Lausanne was able to overcome challenges such as sensitivity to small movements or drift and diffusion of dyes within the studied region, improving accuracy and enabling access to previously inaccessible areas of the brain.

The work by Joel Wellbourne-Wood, Theresa Rimmele, and Jean-Yves Chatton is reported in “Imaging extracellular potassium dynamics in brain tissue using a potassium-sensitive nanosensor.” The article is freely available for download.

“This is a technological breakthrough that promises to shed new light — both literally and figuratively — on understanding brain homeostasis,” said Neurophotonics associate editor George Augustine, of Duke University. “It not only is much less invasive than previous methods, but it adds a crucial spatial dimension to studies of the role of potassium ions in brain function.”

This potassium-sensitive nanosensor is likely to aid future investigations of chemical mechanisms and their interactions within the brain, the authors note. The spatiotemporal imaging created by collected data will also allow for investigation into the possible existence of potassium micro-domains around activated neurons and the spatial extent of these domains. The study confirms the practicality of the nanosensor for imaging in the extracellular space, and also highlights the range of possible extensions and applications of the nanosensor strategy.

The darkest form of ultraviolet light, known as UV-C, is unique because of its reputation as a killer – of harmful organisms.

With wavelengths of between 200 and 280 nanometers, this particular form of UV light penetrates the membranes of viruses, bacteria, mold and dust mites, attacking their DNA and killing them. Sanitization with UV-C light has been around for more than 100 years, following Niels Finsen’s discovery of UV light as an antidote to tuberculosis, which won the Faroese-Danish physician the 1903 Nobel Prize for Medicine.

Currently, most deep-UV lamps are mercury-based. They pose a threat to the environment, and are bulky and inefficient. A Cornell research group led by Huili (Grace) Xing and Debdeep Jena, along with collaborators from the University of Notre Dame, has reported progress in creating a smaller, more earth-friendly alternative.

Using atomically controlled thin monolayers of gallium nitride (GaN) and aluminum nitride (AlN) as active regions, the group has shown the ability to produce deep-UV emission with a light-emitting diode (LED) between 232 and 270 nanometer wavelengths. Their 232- nanometer emission represents the shortest recorded wavelength using GaN as the light-emitting material. The previous record was 239 nanometers, by a group in Japan.

“MBE-grown 232-270 nm deep-UV LEDs using monolayer thin binary GaN/AlN quantum heterostructures” was published online Jan. 27 in Applied Physics Letters.

Postdoctoral researcher SM (Moudud) Islam, the lead author, said: “UV-C light is very attractive because it can destroy the DNA of species that cause infectious diseases, which cause contamination of water and air.”

One of the major challenges with ultraviolet LEDs is efficiency, which is measured in three areas: injection efficiency – the proportion of electrons passing through the device that are injected into the active region; internal quantum efficiency (IQE) – the proportion of all electrons in the active region that produce photons or UV light; and light extraction efficiency – the proportion of photons generated in the active region that can be extracted from the device and are actually useful.

“If you have 50 percent efficiency in all three components … multiply all of these and you get one-eighth,” Islam said. “You’re already down to 12 percent efficiency.”

In the deep-UV range, all three efficiency factors suffer, but this group found that by using gallium nitride instead of conventional aluminum gallium nitride, both IQE and light extraction efficiency are enhanced.

Injection efficiency is improved through the use of a polarization-induced doping scheme for both the negative (electron) and positive (hole) carrier regions, a technique the group explored in previous work.

Now that the group has proven its concept of enhanced deep-UV LED efficiency, its next task is packaging it in a device that could one day go on the market. Deep-UV LEDs are used in food preservation and counterfeit currency detection, among other things.

Further study will include packaging both the new technology and existing technologies in otherwise similar devices, for the purpose of comparison.

“In terms of quantifying the efficiency, we do want to package it within the next few months and test it as if it was a product, and try to benchmark it against a product with one of the available technologies,” Jena said.

Seoul Semiconductor Europe, a subsidiary of Seoul Semiconductor Co. Ltd. today announced the availability of reference modules based on its package-free Wicop LEDs.

“We found that offering module solutions, based on our highly innovative technologies, will allow our customers to evaluate the technology and its benefits easily, enabling them to realize their solutions faster than by just using LED components”, Mr. Andreas Weisl, CEO Seoul Semiconductor Europe and Vice President Sales, explained. “Resources at our customers are often limited, so they need powerful, reliable and easy to handle solutions to meet their requirements. As a solution provider, we help them to be ahead of competition and to achieve a fast time-to-market, also by creating customized modules in our Munich-based lab, we are able to offer,” he added.

This first release includes reference modules for the Wicop Y19, Y22 and Y22P LEDs. The Y19 module consists of four clusters of 2 x 2 LEDs with a combined typical flux of 4,650 lumens, while the Y22 and Y22P modules achieve 1,268 lumens with four single LEDs each. They all feature a Color Rendering Index (CRI) of 70 and a Correlated Color Temperature (CCT) of 4,000 K.

All modules announced today are tailored to common customer needs and follow the outlines given in book 15 of the Zhaga specification, which defines the location and pitch of the LEDs and the position and size of the alignment holes for optical lenses. The boards feature standard power connectors and are easy to assemble and easy to use together with commercially available lenses, like the new Wilma lens-array from LEDiL.

Wicop LEDs with their luminous efficiency of up to 210 lm/W at 350 mA are well suited as light-source for applications for example such as wall washers or floodlights in the architectural space and lighting in warehouses or production sites in the industrial area. Outdoor they can be used for example for street lighting, in tunnels or for the illumination of stadiums, harbors, airports or railway stations, as well as for security applications.

Their compact footprint makes these LEDs several times smaller and much brighter than conventional LEDs, enabling cost savings at the system level. This is achieved through its state of the art chip design with the phosphor film directly attached to the chip surface, making the previously needed packaging with frames and gold wires obsolete. This way, Wicop LEDs are also suitable for applications, where a small form factor is needed.

The three reference modules introduced today are available from Seoul Semiconductor Europe. Production quantities can be provided on request. If necessary, they can also be customized by Seoul Semiconductor’s regional labs for special requirements.

In cooperation with Okmetic Oy and the Polish ITME, researchers at Aalto University have studied the application of SOI (Silicon On Insulator) wafers, which are used as a platform for manufacturing different microelectronics components, as a substrate for producing gallium nitride crystals. The researchers compared the characteristics of gallium nitride (GaN) layers grown on SOI wafers to those grown on silicon substrates more commonly used for the process. In addition to high-performance silicon wafers, Okmetic also manufactures SOI wafers, in which a layer of silicon dioxide insulator is sandwiched between two silicon layers. The objective of the SOI technology is to improve the capacitive and insulating characteristics of the wafer.

The researchers used Micronova's cleanrooms and, in particular, a reactor designed for gallium nitride manufacturing. The image shows a six-inch substrate in the MOVPE reactor before manufacturing. Credit: Aalto University / Jori Lemettinen

The researchers used Micronova’s cleanrooms and, in particular, a reactor designed for gallium nitride manufacturing. The image shows a six-inch substrate in the MOVPE reactor before manufacturing. Credit: Aalto University / Jori Lemettinen

“We used a standardised manufacturing process for comparing the wafer characteristics. GaN growth on SOI wafers produced a higher crystalline quality layer than on silicon wafers. In addition, the insulating layer in the SOI wafer improves breakdown characteristics, enabling the use of clearly higher voltages in power electronics. Similarly, in high frequency applications, the losses and crosstalk can be reduced”, explains Jori Lemettinen, a doctoral candidate from the Department of Electronics and Nanoengineering.

‘GaN based components are becoming more common in power electronics and radio applications. The performance of GaN based devices can be improved by using a SOI wafer as the substrate’, adds Academy Research Fellow Sami Suihkonen.

SOI wafers reduce the challenges of crystal growth

Growth of GaN on a silicon substrate is challenging. GaN layers and devices can be grown on substrate material using metalorganic vapor phase epitaxy (MOVPE). When using silicon as a substrate the grown compound semiconductor materials have different coefficients of thermal expansion and lattice constants than a silicon wafer. These differences in their characteristics limit the crystalline quality that can be achieved and the maximum possible thickness of the produced layer.

‘The research showed that the layered structure of an SOI wafer can act as a compliant substrate during gallium nitride layer growth and thus reduce defects and strain in the grown layers”, Lemettinen notes. GaN based components are commonly used in blue and white LEDs. In power electronics applications, GaN diodes and transistors, in particular, have received interest, for example in frequency converters or electric cars. It is believed that in radio applications, 5G network base stations will use GaN based power amplifiers in the future. In electronics applications, a GaN transistor offers low resistance and enables high frequencies and power densities.