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Research included in the April Update to the 2018 edition of IC Insights’ McClean Report shows that the world’s leading semiconductor suppliers significantly increased their marketshare over the past decade. The top-5 semiconductor suppliers accounted for 43% of the world’s semiconductor sales in 2017, an increase of 10 percentage points from 10 years earlier (Figure 1).  In total, the 2017 top-50 suppliers represented 88% of the total $444.7 billion worldwide semiconductor market last year, up 12 percentage points from the 76% share the top 50 companies held in 2007.

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Figure 1

As shown, the top 5, top 10, and top 25 companies’ share of the 2017 worldwide semiconductor market each increased from 10-12 percentage points over the past decade.  With the surge in mergers and acquisitions expected to continue over the next few years (e.g., Qualcomm and NXP), IC Insights believes that consolidation will raise the shares of the top suppliers to even loftier levels.

As shown in Figure 2, Japan’s total presence and influence in the IC marketplace has waned significantly since 1990, with its IC marketshare (not including foundries) residing at only 7% in 2017.  Once-prominent Japanese names missing from the top IC suppliers list are NEC, Hitachi, Mitsubishi, and Matsushita. Competitive pressures from South Korean IC suppliers—especially in the memory market—have certainly played a significant role in changing the look of the IC marketshare figures over the past 27 years. Moreover, depending on the outcome of the sale of Toshiba’s NAND flash division, the Japanese-companies’ share of the IC market could fall even further from its already low level.

Figure 2

Figure 2

With strong competition reducing the number of Japanese IC suppliers, the loss of its vertically integrated businesses, missing out on supplying ICs for several high-volume end-use applications, and its collective shift toward the fab-lite IC business model, Japan has greatly reduced its investment in new semiconductor wafer fabs and equipment.  In fact, Japanese companies accounted for only 5% of total semiconductor industry capital expenditures in 2017 (two points less than the share of the IC market they held last year), a long way from the 51% share of spending they represented in 1990.

MarketResearch.biz has published a new report titled Global Internet of Things Market by Components (Hardware, Software, and Services), Application, and Region – Global Forecast to2026., which offers a holistic view of the global internet of things market through systematic segmentation that covers every aspect of the target market. The first five-year cumulative revenue (2017-2021) is projected to be US$ 7,760.8 billion, which is expected to increase rather significantly over the latter part of the five-year forecast period.

Internet of things (IoT) is combination of information technology (IT) with operational technology (OP) connected via virtual intelligence and interface used in various sectors to send, control, and receive data with/without human intervention. The technology simplifies human efforts and reduces need for manual interference. IoT is an interconnected system of mechanical systems, computing devices, and digital technology, devices, and human beings.

Rising demand for wireless technology, increasing adoption of smart wearables, and shift to automation by various industries are major factors driving growth of the global internet of things market. Increasing adoption of connected devices, smart wearables, and increasing number of high speed internet providers are further fueling growth of the global internet of things market.

In addition, increasing adoption of big data analytics and cloud based services and solutions in various sectors such as consumer electronics, manufacturing, healthcare, etc. are some other factors fueling growth of the global internet of things market. Increasing deployment of augmented reality and virtual reality in gaming is another factor expected to further propel growth of the global internet of things market.

Rising concerns related to data privacy and data security, leading to data theft and leakage is a major factor expected to hamper growth of the global internet of things market over the forecast period.  In addition, relatively increasing incidence of cyber-attacks and cyber breaches, and lack of standards for deployment IoT devices and products, and as the technology is in nascent stage there are complexities related to integration and interoperability of these technologies. This are some other factors hampering growth of the global internet of things market.

Development of smart cities by various government across the globe is another factor driving growth of the global internet of things market. This trend is expected to further drive growth of the global internet of things market to a significant extent over the forecast period. Moreover, technological advancements in related technologies & towards product development, and rising investment in IoT technology can create lucrative business opportunities for key vendors and major service providers in the global internet of things market over the forecast period.

The comprehensive research report comprises a complete forecast of the global internet of things market based on factors affecting the market and their impact in the foreseeable future. According to the forecast projections, revenue from the global internet of things market is expected to expand at a CAGR of 21.6% during the forecast period.

The research report on the global Internet of things market includes profiles of major companies such as Google Inc., Cisco Systems, Inc., IBM, Fujitsu Ltd., HP Inc., Dell Inc., Arm Limited, Intel Corporation, Infineon Technologies AG, and Infosys Limited.

The GaN power business was worth about US$12 million in 2016, but at Yole, analysts project that the market will reach US$460 million by 2022, with an impressive 79% CAGR. Amongst the numerous applications, the market research company mentions Lidar, wireless power and envelope tracking. They are high-end low/medium voltage applications. Today GaN technology is the only existing solution to meet their specific requirements.

“The GaN power market remains small compared to the US$30 billion silicon power semiconductor market,” said Dr. Hong Lin, Technology & Market Analyst at Yole Développement (Yole). “However, it has an enormous potential in the short term due to its suitability for high performance and high frequency solutions.”

Although today only a few players are showing commercial GaN activities, many firms have GaN activities. Therefore, the power GaN supply chain prepares for production. During the 2016-2017 period, Yole’s analysts identified lot of investments that are clearly supporting development and implementation of GaN devices.

Yole differentiates GaN power supply chain into two main models: IDM and foundry. Both models will co-exist while there are different needs on the market, for example in consumer and industrial applications, explain Yole’s analysts in the Power GaN report (1).

GaN manufacturers continue developing new products and provide samples to costumers, as is the case with EPC and its wireless charging line. Indeed EPC is still the current market leader today. Other players including GaN systems sell also low voltage GaN transistors.

System Plus Consulting, part of Yole Group of Companies, reveals a detailed comparison of GaN-on-Silicon transistors in its new report, GaN-on-Silicon Transistor Comparison. The company analyzes the existing GaN-on-Silicon offers. This overview is the state of the art of GaN-on-Silicon HEMT. Indeed it highlights the differences between the design and manufacturing processes, the impacts at epitaxy, device and packaging level and related production costs. Devices analyzed by System Plus Consulting have been developed by the leading companies: EPC, Texas Instruments, Panasonic, GaN Systems and Transphorm.

“The current GaN device market is mainly dominated by devices <200V. 600V devices are expected to take off and keep growing. But the <200V market share will increase again when GaN begins to replace MOSFETs in different applications and enables new applications,” comments Dr. Elena Barbarini, Project Manager, Power Electronics and Compound Semiconductors at System Plus Consulting. And she adds: “GaN-on-Silicon has been a promising solution since the very beginning as its potential of CMOS compatibility and reduced cost”.

Both companies Yole and System Plus Consulting will attend a selection of key conferences during the next months.

At CS International, Dr. Hong Lin will present the latest results focused on the GaN industry. She will describe the GaN-on-Silicon landscape including power electronics, RF and lighting market segments. “GaN on Si Market and industry development” presentation will take place on April 10 at 3:35 PM. During the conference, Yole also proposes another presentation focused on the microLED technologies.

By Jamie Girard, Sr. Director, Public Policy, SEMI

Although many months past due, Congress on March 23 finalized the federal spending for the remainder of fiscal year (FY) 2018, only hours before a what would have been the third government shutdown of the year. Congressional spending has been allocated in fits and starts since the end of FY 2017 last September, with patchwork deals keeping things running amid pervasive uncertainty. While this clearly isn’t an ideal way to fund the federal government, the end result will make many in the business of research and development pleased with the addition of more resources for science and innovation.

There was grave concern over the future of federal spending with the release of the president’s FY 2018 budget, which would have cut the National Science Foundation (NSF) budget by 11 percent and National Institutes of Standards & Technology (NIST) spending by 30 percent. Relief came with early drafts from Congress that whittled those cuts down to between 2-9 percent. But the real boost was a February bipartisan Congressional agreement that lifted self-imposed spending caps and introduced a generous dose of non-defense discretionary spending, increasing NSF spending 3.9 percent over the previous year and the NIST budget an astounding 25.9 percent over FY 2017 levels.

SEMI applauds this much-needed support for basic research and development (R&D) at these agencies after their budgets were cut or flat-funded for multiple cycles. It is well understood that federal R&D funding is critical to U.S. competitiveness and future economic prosperity. With the stakes that high, full funding of R&D programs at the NSF and NIST should be a bipartisan national priority backed by a strong and united community of stakeholders and advocates in the business, professional, research, and education communities.

With the work for FY 2018 completed, Congress will now turn to FY 2019 spending – already behind schedule due to the belated completion of the previous year’s budget. With 2018 an election year, Congress will likely begin work on the FY 2019 budget in short order, but probably won’t complete its work prior to the November elections.  SEMI will continue to work with lawmakers to support the R&D budgets at the agencies and their important basic science research. If you’d like to know how you can be more involved with SEMI’s public policy work, please contact Jamie Girard, Sr. Director, Public Policy at [email protected].

Silicon solar cells dominate the global photovoltaic market today with a share of 90 percent. With ever new technological developments, research and industry are nearing the theoretical efficiency limit for semiconductor silicon. At the same time, they are forging new paths to develop a new generation of even more efficient solar cells.

The Fraunhofer researchers achieved the high conversion efficiency of the silicon-based multi-junction solar cell with extremely thin 0.002 mm semiconductor layers of III-V compound semiconductors, bonding them to a silicon solar cell. To compare, the thickness of these layers is less than one twentieth the thickness of a human hair. The visible sunlight is absorbed in a gallium-indium-phosphide (GaInP) top cell, the near infrared light in gallium-arsenide (GaAs) and the longer wavelengths in the silicon subcell. In this way, the efficiency of silicon solar cells can be significantly increased.

Silicon-based multi-junction solar cell consisting of III-V semiconductors and silicon. The record cell converts 33.3 percent of the incident sunlight into electricity.  © Fraunhofer ISE/Photo: Dirk Mahler

Silicon-based multi-junction solar cell consisting of III-V semiconductors and silicon. The record cell converts 33.3 percent of the incident sunlight into electricity.
© Fraunhofer ISE/Photo: Dirk Mahler

“Photovoltaics is a key pillar for the energy transformation,” says Dr. Andreas Bett, Institute Director of Fraunhofer ISE. “Meanwhile, the costs have decreased to such an extent that photovoltaics has become an economically viable competitor to conventional energy sources. This development, however, is not over yet. The new result shows how material consumption can be reduced through higher efficiencies, so that not only the costs of photovoltaics can be further optimized but also its manufacture can be carried out in a resource-friendly manner.

Already in November 2016, the solar researchers in Freiburg together with their industry partner EVG demonstrated an efficiency of 30.2 percent, increasing it to 31.3 percent in March 2017. Now they have succeeded once again in greatly improving the light absorption and the charge separation in silicon, thus achieving a new record of 33.3 percent efficiency. The technology also convinced the jury of the GreenTec Awards 2018 and has been nominated among the top three in the category “Energy.”

The Technology

For this achievement, the researchers used a well-known process from the microelectronics industry called “direct wafer bonding” to transfer III-V semiconductor layers, of only 1.9 micrometers thick, to silicon. The surfaces were deoxidized in a EVG580® ComBond® chamber under high vacuum with a ion beam and subsequently bonded together under pressure. The atoms on the surface of the III-V subcell form bonds with the silicon atoms, creating a monolithic device. The complexity of its inner structure is not evident from its outer appearance: the cell has a simple front and rear contact just as a conventional silicon solar cell and therefore can be integrated into photovoltaic modules in the same manner.

EVG ComBond automated high-vacuum wafer bonding platform  (Photo courtesy of EV Group).

EVG ComBond automated high-vacuum wafer bonding platform
(Photo courtesy of EV Group).

The III-V / Si multi-junction solar cell consists of a sequence of subcells stacked on top of each other. So-called “tunnel diodes” internally connect the three subcells made of gallium-indium-phosphide (GaInP), gallium-arsenide (GaAs) and silicon (Si), which span the absorption range of the sun’s spectrum. The GaInP top cell absorbs radiation between 300 and 670 nm. The middle GaAs subcell absorbs radiation between 500 and 890 nm and the bottom Si subcell between 650 and 1180 nm, respectively. The III-V layers are first epitaxially deposited on a GaAs substrate and then bonded to a silicon solar cell structure. Here a tunnel oxide passivated contact (TOPCon) is applied to the front and back surfaces of the silicon. Subsequently the GaAs substrate is removed, a nanostructured backside contact is implemented to prolong the path length of light. A front side contact grid and antireflection coating are also applied.

On the way to the industrial manufacturing of III-V / Si multi-junction solar cells, the costs of the III-V epitaxy and the connecting technology with silicon must be reduced. There are still great challenges to overcome in this area, which the Fraunhofer ISE researchers intend to solve through future investigations. Fraunhofer ISE’s new Center for High Efficiency Solar Cells, presently being constructed in Freiburg, will provide them with the perfect setting for developing next-generation III-V and silicon solar cell technologies. The ultimate objective is to make high efficiency solar PV modules with efficiencies of over 30 percent possible in the future.

Project Financing

Dr. Roman Cariou, the young scientist and first author, was supported through the European Union with a Marie Curie Stipendium (HISTORIC, 655272). The work was also supported by the European Union within the NanoTandem project (641023) as well as by the German Federal Ministry for Economic Affairs and Energy BMWi in the PoTaSi project (FKZ 0324247).

Correction: A previous version of this article incorrectly state “imec” in the headline, instead of Fraunhofer ISE. Solid State Technology regrets the error.

The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, today announced worldwide sales of semiconductors reached $36.8 billion for the month of February 2018, an increase of 21.0 percent compared to the February 2017 total of $30.4 billion. Global sales in February were 2.2 percent lower than the January 2018 total of $37.6 billion, reflecting typical seasonal market trends. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average.

“The global semiconductor market continued to demonstrate substantial and consistent growth in February, notching its 19th consecutive month of year-to-year sales increases and growing by double-digit percentages across all major regional markets,” said John Neuffer, president and CEO, Semiconductor Industry Association. “The Americas stood out once again, with sales increasing nearly 40 percent compared to last year, and sales were up year-to-year across all major semiconductor product categories.”

Year-to-year sales increased significantly across all regions: the Americas (37.7 percent), Europe (21.7 percent), China (16.4 percent), Asia Pacific/All Other (16.2 percent), and Japan (15.5 percent). Month-to-month sales increased slightly in Europe (0.9 percent), but fell somewhat in Japan (-0.9 percent), Asia Pacific/All Other (-1.5 percent), China (-2.6 percent), and the Americas (-4.3 percent).

For comprehensive monthly semiconductor sales data and detailed WSTS Forecasts, consider purchasing the WSTS Subscription Package. For detailed data on the global and U.S. semiconductor industry and market, consider purchasing the 2017 SIA Databook.

Feb 2018

Billions

Month-to-Month Sales                              

Market

Last Month

Current Month

% Change

Americas

8.63

8.26

-4.3%

Europe

3.40

3.43

0.9%

Japan

3.21

3.18

-0.9%

China

12.01

11.70

-2.6%

Asia Pacific/All Other

10.35

10.19

-1.5%

Total

37.60

36.75

-2.2%

Year-to-Year Sales                         

Market

Last Year

Current Month

% Change

Americas

6.00

8.26

37.7%

Europe

2.82

3.43

21.7%

Japan

2.75

3.18

15.5%

China

10.05

11.70

16.4%

Asia Pacific/All Other

8.77

10.19

16.2%

Total

30.38

36.75

21.0%

Three-Month-Moving Average Sales

Market

Sep/Oct/Nov

Dec/Jan/Feb

% Change

Americas

8.77

8.26

-5.8%

Europe

3.42

3.43

0.1%

Japan

3.21

3.18

-1.0%

China

11.90

11.70

-1.7%

Asia Pacific/All Other

10.39

10.19

-1.9%

Total

37.69

36.75

-2.5%

 

Fueled by heavy government investment, IC packaging and testing in China generated $29 billion in revenue in 2017, making China the world’s largest consumer of packaging equipment and materials, according to SEMI’s recent China Semiconductor Packaging Industry Outlook report. The report, based on research conducted between July 2017 through the end of January 2018, also revealed that China’s IC packaging and testing industry is more mature than its IC manufacturing and design sectors, though IC packaging and testing revenue growth has slowed in recent years.

SEMI surveyed 87 semiconductor packaging- and assembly-related companies for the research report, including key semiconductor packaging manufacturers in China. More than 100 companies compete in China’s packaging and assembly market, including leading multinational companies and emerging domestic players. More than half of China’s packaging companies are located in the Yangzi delta region, while midwestern China has emerged as a hotbed for packaging plants.

Additional report highlights:

  • Compared to other world regions, China’s investments in IC packaging and testing saw the fastest growth over the past decade, with domestic manufacturers securing strong support from both national and local governments to ramp capacity and technical capabilities.
  • The top three domestic packaging companies – JCET, Huatian, and TFME – all entered the top 10 global OSAT rankings following expansions and acquisitions from 2012 to early 2016.
  • Packaging companies such as SPIL, TFME, NCAP continue to build new plants.
  • As a major manufacturing region for LED products, China has become more prominent within the semiconductor packaging industry. China’s LED product sector grew to $13.4 billion (half of IC packaging) in 2017.
  • In 2017, China accounted for about 26 percent of the global packaging materials market, with China’s packaging materials revenue forecast to exceed $5.2 billion in 2018.
  • In 2017, the China assembly equipment market reached $1.4 billion in revenue, remaining the world’s largest with 37 percent share.
  • In 2017, assembly equipment manufactured in China (including assembly equipment made by foreign-owned companies and JVs) accounted for 17 percent of China’s assembly equipment market.
  • With the fast growth in the semiconductor packaging market, domestic packaging materials suppliers are expanding with the industry and now starting to serve leading international packaging houses.

The SEMI report also elucidates the importance of both central and local government support, guidelines and policies on China’s semiconductor industry. The National Fund and local IC funds, created in 2014, and the Made in China 2025 policy provided a second boost to China’s IC industry growth. For packaging and testing enterprises, maintaining strong communications and relations with relevant government bodies and industry associations is essential to securing both political and financial support, in part because China’s semiconductor manufacturers and IC assembly and packaging companies are expected to purchase equipment and materials made in China.

 

The semiconductor industry closed out 2017 in blockbuster fashion, posting the highest year-over-year growth in 14 years. Global semiconductor revenue grew 21.7 percent, reaching $429.1 billion in 2017, according to IHS Markit (Nasdaq: INFO).

Recording year-over-year growth of 53.6 percent, and its highest semiconductor revenue ever, Samsung replaced Intel as the new market leader of the semiconductor industry in 2017. Intel was followed by SK Hynix, in third position.

“2017 was quite a memorable year,” said Shaun Teevens, semiconductor supply chain analyst, IHS Markit. “Alongside record industry growth, Intel, which had led the market for 25 years, was supplanted by Samsung as the leading semiconductor supplier in the world.”

Among the top 20 semiconductor suppliers, SK Hynix and Micron enjoyed the largest year-over-year revenue growth, growing 81.2 percent and 79.7 percent, respectively. “A very favorable memory market with strong demand and high prices was mainly responsible for the strong growth of these companies,” Teevens said.

Qualcomm remained the top fabless company in 2017, followed by nVidia, which moved into the second position, after growing 42.3 percent over the previous year. Among the top 20 fabless companies, MLS enjoyed the highest market share gain, moving from number 20 to number 15 in the IHS Markit revenue ranking.

Figure 1

Figure 1

Memory was the strongest industry category

Memory integrated circuits proved to be the strongest industry category, growing 60.8 percent in 2017 compared to the previous year. Within the category, DRAM grew 76.7 percent and NAND grew 46.6 percent — the highest growth rate for both memory subcategories in 10 years. Much of the revenue increase was based on higher prices and increased demand for memory chips, relative to tight supply.

“The technology transition from planar 2D NAND to 3D NAND drove the market into an unbalanced supply-demand environment in 2017, driving prices higher throughout the year,” said Craig Stice, senior director, memory and storage, IHS Markit. “Entering 2018, the 3D NAND transition is now almost three-quarters of the total bit percent of production, and it is projected to provide supply relief for the strong demand coming from the SSD and mobile markets. Prices are expected to begin to decline aggressively, but 2018 could still be a record revenue year for the NAND market.”

Excluding memory, the remainder of the semiconductor industry grew 9.9 percent last year, largely due to solid unit-sales growth and strong demand across all applications, regions and technologies. Notably, semiconductors used for data processing applications expanded 33.4 percent by year-end. Intel remained the market leader in this category, with sales almost two times larger than second-ranked Samsung.

 

Combined sales for optoelectronics, sensors and actuators, and discrete semiconductors (known collectively as O-S-D) increased 11% in 2017—more than 1.5 times the average annual growth rate in the past 20 years—to reach an eighth consecutive record-high level of $75.3 billion, according to IC Insights’ new 2018 O-S-D Report—A Market Analysis and Forecast for Optoelectronics, Sensors/Actuators, and Discretes. Total O-S-D sales growth is expected to ease back in 2018 but still rise by an above average rate of 8% in 2018 to $81.1 billion, based on the five-year forecast of the new 375-page annual report, which became available this week.

In 2017, optoelectronics sales recovered from a rare decline of 4% in 2016, rising 9% to $36.9 billion, while the sensors/actuators market segment registered its second year in a row of 16% growth with revenues climbing to $13.8 billion, and discretes strengthened significantly, increasing 12% to $24.6 billion.  The new O-S-D Report forecast shows optoelectronics sales growing 8% in 2018, sensors/actuators rising 10%, and discretes growing 5% this year (Figure 1).

Figure 1

Figure 1

Between 2017 and 2022, sales in optoelectronics are projected to increase by a compound annual growth rate (CAGR) of 7.3% to $52.4 billion, while sensors/actuators revenues are expected to expand by a CAGR of 8.9% to $21.2 billion, and the discretes segment is seen as rising by an annual rate of 3.1% to $28.7 billion in the final year of the report’s forecast.  In the five-year forecast period, O-S-D growth will continue to be driven by strong demand for laser transmitters in optical networks and CMOS image sensors in embedded cameras, image recognition, machine vision, and automotive applications as well as the proliferation of other sensors and actuators in intelligent control systems and connections to the Internet of Things (IoT).  Power discretes (transistors and other devices) are expected to get a steady lift from the growth in mobile and battery-operated systems as well as good-to-modest global economic growth in most of the forecast years through 2022, the report says.

Combined sales of O-S-D products accounted for about 17% of the world’s $444.7 billion in total semiconductor sales compared to less than 15% in 2007 and under 13% in 1997.  Since the mid-1990s, total O-S-D sales growth has outpaced the much larger IC market segment because of strong and relatively steady increases in optoelectronics and sensors. However, this trend was reversed recently mostly due to a 77% surge in sales of DRAMs and 54% jump in NAND flash memory in 2017.

The 2017 increase for total O-S-D sales was the highest growth rate in the market group since the 37% surge in the strong 2010 recovery year from the 2009 semiconductor downturn.  In addition, 2017 was the first year since 2011 when all three O-S-D market segments reached individual record-high sales, says IC Insights’ new report.  The 2018 O-S-D Report also shows that sales of sensor and actuator products made with microelectromechanical systems (MEMS) technology grew 18% in 2017 to a record-high $11.5 billion.

There are many different situations in which special attention to color choices provide the potential to improve the manufacturing results of multi-patterned masks.

BY DAVID ABERCROMBIE and ALEX PEARSON, Mentor Graphics, Wilsonville, OR

Multi-patterning design rules don’t care about color (mask assignments). As long as all the spacing and alternation constraints are met, any coloring arrangement is legal. In the beginning of multi-patterning, all possible color combinations that passed the design rule checks (DRC) were considered and treated as equal. As the technology moves into more advanced nodes, however, that is no longer the case.

As it turns out, one legal coloring choice can, in fact, be significantly better than another when it comes to manufacturing success and chip performance. Designers working on multi-patterned layouts need to understand the issues and conditions that affect their color choices, so they can determine the optimal coloring scheme for their designs.

Color density

In multi-patterned designs, each color assignment represents a different manufacturing mask. Each mask is processed through a lithography operation, and the pattern is etched onto the wafer. Once all the masks are processed, the goal is to have all the shapes created from all the masks act as if they were all generated from one mask, with very similar process biases and variations.
To ensure that type of consistency, all the masks need to resemble each other in terms of the total area and distribution of shapes. Clumping shapes in one area of one mask, while distributing shapes evenly across another, is going to result in very different process bias behavior and results. Balancing the color density across each mask provides the best manufacturing result.

To explain why, let’s look at a standard cell library design. Because power rails are typically much wider than the routing tracks inside the cells, they constitute a large portion of the polygon area inside the standard cell design block. The number of tracks in the library force the power rails into certain color pairings (FIGURE 1). In the first case, the power rails are forced to opposite colors, while in the second, they are forced to the same color.

Screen Shot 2018-03-28 at 7.41.28 AM

The color ratio distribution charts tell the story of the two designs. When the power rails alternate color, the distribution of the color density ratio is well-centered around the 50% point. However, forcing the power rails to be a single color can dramatically shift the color ratio towards that single color. This distribution is more problematic to manufacture.

But uniform color density isn’t just a chip-wide, global issue—even local differences can have negative impacts, because local areas with excessive or insufficient color density can impact the biases of nearby shapes during processing. In FIGURE 2, both coloring options are legal, but the polygons within each connected component are not equal in area, so the choice of G-B-G-B vs. B-G-B-G affects how much area of each color ultimately exists within this local region. The second coloring choice results in a more uniform area density of each color.

Screen Shot 2018-03-28 at 7.41.35 AM

However, some layouts contain polygon configurations that inherently make it almost impossible to balance colors simply by changing color choices. For example, sometimes you have a very large area polygon in the midst of your layout (FIGURE 3). No matter what color you assign to the large polygon, it will dominate the color density in this region. Changing color selections in the nearby polygons doesn’t help, because they can’t all be assigned to the other color.

Screen Shot 2018-03-28 at 7.41.42 AM

In this case, a new (and perhaps unexpected) solution is needed. Placing evenly distributed polygons of the opposite color in a grid on top of the large area polygon (known as reverse tone overlay fill) adds shapes to the opposite color mask in a region that would otherwise have been empty (FIGURE 4). The smaller polygons on top don’t create openings (they merely “double” block the etch), so they have no real purpose in terms of the final wafer shape. In that regard, they are similar to dummy fill. This technique ensures the two masks have more similar color densities in this region.

Screen Shot 2018-03-28 at 7.41.49 AM

Color regularity

Specific configurations, such as those found in memory applications, may also need strongly controlled, repetitive coloring patterns to help the optical proximity correction (OPC) process generate more consistent results. FIGURE 5 shows three vertical instantiations of a repetitive pattern with horizontal color alternation constraints. On the left, a density-balanced legal coloring assignment is shown. However, by adding a few extra coloring constraints, you can also achieve a regular repetitive coloring pattern, as shown on the right. By introducing this color regularity, you can increase the chances of consistency in the post-OPC results.

Screen Shot 2018-03-28 at 7.41.58 AM

Layout symmetry is another aspect of design that benefits from color regularity. When there is a significant amount of symmetry around a central point, such as a sensitive analog circuit, the most desirable coloring solution maintains x and y axis symmetry around the central point. In FIGURE 6, the constrained coloring solution on the right adds constraints for x and y axis symmetry to generate a mirrored coloring pattern.

Screen Shot 2018-03-28 at 7.42.12 AM

DFM-aware coloring

In design for manufacturing (DFM) optimization, weak lithographic configurations are often captured as process hotspot patterns, which can be used with DFM and/or resolution enhancement technology (RET) processes to minimize the chance of a hotspot forming during manufacturing. As it turns out, the coloring of these patterns in multi-patterned designs can influence whether or not a pattern becomes a hotspot, or actually change the hotspot severity or impact of a particular pattern. If a hotspot pattern is consistently colored in all its instantiations, it may prevent that hotspot from forming, or allow a carefully tuned OPC recipe to be applied.

In FIGURE 7, a different, but still legal, coloring is applied to a rotated/reflected pattern. Because the OPC process will now affect each instance differently, the rotated pattern may become a lithographic hotspot, while the original pattern does not.

Screen Shot 2018-03-28 at 7.42.04 AM

FIGURE 8 shows the same legal coloring applied to both pattern instances, which allows the same OPC to be applied to the layout in both locations, because the coloring is the same, and the polygons that end up on each mask are consistent.

Screen Shot 2018-03-28 at 7.42.21 AM

Sometimes there are cases where information from other layers indicate a color preference for certain shapes. These preferences are typically the result of analysis on another layer, or from information the designer provides, such as for critical or high voltage nets. While these preferences may sometimes conflict with each other for neighboring shapes in the same component, applying these preferences whenever possible helps drive an optimal coloring solution. In FIGURE 9, the red markers indicate a preference for placing those shapes on the green mask. In this case, there is one component that cannot comply, but placing three of the four tagged polygons on the preferred mask maximizes the preferred placements, making this optimal coloring solution.

Screen Shot 2018-03-28 at 7.42.26 AM

Conclusion

In advanced process nodes, achieving the best performance and yield requires moving beyond the minimum requirements of the design rules to optimizing the layout. This optimization is a fundamental principle of all design for manufacturing (DFM) activities, including multi-patterning decomposition. There are many different situations in which special attention to color choices provide the potential to improve the manufacturing results of multi-patterned masks. Designers involved with generating the decomposed mask data before tapeout can expect to see more emphasis on color optimizations as the industry continues to refine and enhance multi-patterning processes.