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Intel continued to top all other chip companies in R&D expenditures in 2016 with spending that reached $12.7 billion and represented 22.4% of its semiconductor sales last year.  Intel accounted for 36% of the top-10 R&D spending and about 23% of the $56.5 billion total worldwide semiconductor R&D expenditures in 2016, according to the 20th anniversary 2017 edition of The McClean Report that was released in January 2017.  Figure 1 shows IC Insights’ ranking of the top semiconductor R&D spenders based on semiconductor manufacturers and fabless suppliers with $1 billion or more spent on R&D in 2016.

Figure 1

Figure 1

Intel’s R&D spending is lofty and exceeded the combined R&D spending of the next three companies on the list. However, the company’s R&D expenditures increased 5% in 2016, below its 9% average increase in spending per year since 2011 and less than its 8% annual growth rate since 2001, according to the new report.

Underscoring the growing cost of developing new IC technologies, Intel’s R&D-to-sales ratio has climbed significantly over the past 20 years.  In 2010, Intel’s R&D spending as a percent of sales was 16.4%, compared to 22.4% in 2016. Intel’s R&D-to-sales ratios were 14.5% in 2005, 16.0% in 2000, and just 9.3% in 1995.

Among other top-10 R&D spenders, Qualcomm—the industry’s largest fabless IC supplier—remained the second-largest R&D spender, a position it first achieved in 2012.  Qualcomm’s semiconductor-related R&D spending was down 7% in 2016 compared to an adjusted total in 2015 that included expenditures by U.K.-based CSR and Ikanos Communications in Silicon Valley, which were acquired in 2015.  Broadcom Limited—which is the new name of Avago Technologies after it completed its $37 billion acquisition of U.S-based Broadcom Corporation in early 2016—was third in the R&D ranking. Excluding Broadcom’s expenditures in 2015, Avago by itself was ranked 13th in R&D spending that year (at nearly $1.1 billion).

Memory IC leader Samsung was ranked fourth in R&D spending in 2016 with expenditures increasing 11% from 2015. Among the $1 billion-plus “R&D club,” the South Korean company had the lowest investment-intensity level with 6.5% of its total semiconductor revenues going to chip-related research and development in 2016, which was up from just 6.2% in 2015.

Toshiba in Japan moved up two positions to fifth as it aimed its R&D spending at 3D NAND flash memories.  Foundry giant Taiwan Semiconductor Manufacturing Co. (TSMC) was sixth with a 7% increase in 2016 R&D spending, followed by fabless IC supplier MediaTek in Taiwan, which moved up one position to seventh with 13% growth in R&D expenditures. U.S.-based memory supplier Micron Technology advanced from ninth to eighth in the ranking with its research and development spending rising 5% in 2016.

Rounding out the top 10, NXP in Europe was ninth in 2016, slipping from sixth in 2015 and SK Hynix grew its R&D spending 9% to complete the list.   Fabless Nvidia just missed the cut with a 10% increase in expenditures for research and development.

Semiconductor consolidation played a factor in industry R&D spending rising just 1% in 2016 to a record-high $56.5 billion after a 1% increase in 2015 to $56.2 billion.  The slowdown in industry-wide R&D spending growth also corresponded with weakness in worldwide semiconductor sales, which declined 1% in 2015 and then recovered with a low single-digit increase in 2016.

According to Yole Développement (Yole), the solid-state IC technologies applied to medical imaging applications including CCD, CIS, a-Si FPD, a-Se FPD, SiPM and now cMUT and pMUT are step by step penetrating the medical imaging industry. Yole’s analysts announced a US$350 million in 2016 with a comfortable 8.3% CAGR9 until 2022. In a US$35 billion medical imaging equipment market in 2016 with a 5.5% CAGR until 2022, solid-state IC players are clearly changing the medical imaging landscape by offering competitive disruptive technologies.

The “More than Moore” market research and strategy consulting company, Yole confirmed the growing interest of solid-state technologies in medical imaging applications: in this field, companies aim to reach challenges of minimally invasive solutions, safety of patient and early diagnostic, remote diagnostic and cost effectiveness through miniaturization, low power consumption and serial production.

Under this context, Yole released a new technology & market report entitled Solid-State Medical Imaging. Yole analyzes the medical imaging ecosystem and proposes a relevant overview of solid-state technologies and technological trends. From components to systems, Yole’s MedTech team reviews for each types of equipment the major companies in the supply chains from the sensors to the equipment. Solid-state disruptive solutions bring better performances for existing technologies and pave the way for new market opportunities. Yole’s MedTech analysts offer you today a snapshot of the solid-state IC technologies for medical imaging applications.

medical system

“For some technologies and applications, wafer volume growth is very significant,” explains Yole’s Activity Leader, Pierre Cambou. “For example, the development of SiPM7 in the field of molecular imaging will multiply in quantity by more than 6x over the next five years. This massive transformation from photomultiplier tubes to solid-state IC was derived from the need of multimodal equipment (PET/MRI10) but it’s going to have a direct consequence in the field of PET/CT11 and spread all the way to SPECT12 imaging.”

In the case of endoscopy the switch toward solid-state IC technologies started a decade ago and has completely transformed the landscape. The digitization process is almost complete. The new technological trend is now to move from CCD to CMOS image sensors offering higher image quality and miniaturization perspectives. Small-diameter fiberscope is the last endoscopy domain making the transition.

The medical imaging equipment market is led by 4 major players representing more than 75% of the market share. Indeed Siemens Healthineers, GE Healthcare, Philips Healthcare and Canon/Toshiba medical systems are manufacturing the high end imaging equipment including PET/MRI, PET/CT, SPECT and CT Scanners. But it is an evolving market and several players are focused on smaller systems and are leader on their market. Olympus, Fujifilm or Sirona are covering imaging markets with endoscopy and dental X-Ray equipment for example.

Medical industry and furthermore medical imaging applications require strong competences and knowledge to meet challenges of performances and patient safety from component to the system. Solid-state sensors are based on semiconductor technologies and processes with huge initial investment. Solid-state technologies impose a new paradigm in the supply chain from highly integrated companies to a horizontal network of specialized suppliers.

Yole’s report describes the major players’ position in the supply chain and how, among other, TowerJazz or Hamamatsu are working with Teledyne Dalsa, Perkin Elmer, or Zeiss, as well as large system manufacturers, to provide the best imaging solutions. It is worth noting that the medical imaging industry is also still consolidating through tremendous mergers and acquisitions. A total of US$35 billion of strategic acquisition has been made in the 2 last years at various level of the chain showing an exciting activity of the industry. Most of the companies are expanding field of competences through acquisitions:

Varex acquiring Perkin Elmer x-ray detector field, Canon and Toshiba Medical Systems to meet Canon growth strategy, as well as the US$25 billion acquisition of St. Jude Medical by Abbott.

“In our report, forecasts are paired with each modality’s technology and application overview, since some key players have made significant moves via solid-state technology,” highlights Dr Benjamin Roussel, Business Unit Manager, MedTech at Yole.

“The technologies and related use-cases are constantly evolving, providing space for innovators to differentiate themselves,” comments Jérôme Mouly, Technology & Market Analyst at Yole. And he adds: “Numerous new solid-state innovations are ready to enter the market.”

Worldwide semiconductor wafer foundry leader GLOBALFOUNDRIES published its global manufacturing business expansion plan today. The company will continue investing in its wafer plants in the United States and Germany, expand its capacity in Singapore, and construct a facility to produce 12–inch wafers in Chengdu, China in order to satisfy Chinese and global demands for the company’s 22FDX technology.

According to the cooperation plan of the two parties, the Chengdu plant will start production in Q4 of 2018, with fabrication of the advanced 22FDX to begin in Q4 of 2019.

CEO of GLOBALFOUNDRIES, Sanjay Jha, indicated that, “From the world-class RF-SOI platform used for wireless Internet devices, to the technical roadmaps of the state-of-the-art FD-SOI and FinFET, they all serve as evidence of the market’s tremendous demands for our main staple and progressive technologies. The construction of the 12–inch wafer plant in the High and New Technology Development Area of Chengdu will be conducive to accelerating our expansion in the Chinese market.”

The High and New Technology Development Area of Chengdu is home to one of China’s most prominent IT industry clusters, hosting a plethora of global IT giants including Intel, Texas Instrument, AMD, MediaTek, Dell, Lenovo and Foxconn, as well as 115 of the Fortune Global 500 companies. In 2016, the High and New Technology Development Area posted total trade amounting to USD 24.9 billion.

On the same day, GLOBALFOUNDRIES also unveiled its brand new trade name for the Chinese market: “Ge Xin“, and announced the establishment of a new joint venture — Gexin (Chengdu) Integrated Circuit Manufacturing Co., Ltd. In Chinese, the name “Ge Xin” shares the same pronunciation as the Chinese word for “innovation” and signifies rebirth, reinvigoration and reform.

GLOBALFOUNDRIES yesterday announced plans to expand its global manufacturing footprint in response to growing customer demand for its comprehensive and differentiated technology portfolio. The company is investing in its existing leading-edge fabs in the United States and Germany, expanding its footprint in China with a fab in Chengdu, and adding capacity for mainstream technologies in Singapore.

“We continue to invest in capacity and technology to meet the needs of our worldwide customer base,” said GF CEO Sanjay Jha. “We are seeing strong demand for both our mainstream and advanced technologies, from our world-class RF-SOI platform for connected devices to our FD-SOI and FinFET roadmap at the leading edge. These new investments will allow us to expand our existing fabs while growing our presence in China through a partnership in Chengdu.”

In the United States, GF plans to expand 14nm FinFET capacity by an additional 20 percent at its Fab 8 facility in New York, with the new production capabilities to come online in the beginning of 2018. This expansion builds on the approximately $13 billion invested in the United States over the last eight years, with an associated 9,000 direct jobs across four locations and 15,000 jobs within the regional ecosystem. New York will continue to be the center of leading-edge technology development for 7nm and extreme ultraviolet (EUV) lithography, with 7nm production planned for Q2 2018.

In Germany, GF plans to build up 22FDX 22nm FD-SOI capacity at is Fab 1 facility in Dresden to meet demand for the Internet of Things (IoT), smartphone processors, automotive electronics, and other battery-powered wirelessly connected applications, growing the overall fab capacity by 40 percent by 2020. Dresden will continue to be the center for FDX technology development. GF engineers in Dresden are already developing the company’s next-generation 12FDX technology, with customer product tape-outs expected to begin in the middle of 2018.

In China, GF and the Chengdu municipality have formed a partnership to build a fab in Chengdu. The partners plan to establish a 300mm fab to support the growth of the Chinese semiconductor market and to meet accelerating global customer demand for 22FDX. The fab will begin production of mainstream process technologies in 2018 and then focus on manufacturing GF’s commercially available 22FDX process technology, with volume production expected to start in 2019.

In Singapore, GF will increase 40nm capacity at its 300mm fab by 35 percent, while also enabling more 180nm production on its 200mm manufacturing lines. The company will also add new capabilities to produce its industry-leading RF-SOI technology.

“GF has had a strong foundry relationship with Qualcomm Technologies for many years across a wide range of process nodes,” said Roawen Chen, senior vice president, QCT global operations, Qualcomm Technologies, Inc. “We are excited to see GF making these new investments in differentiated technology and expanding global capacity to support Qualcomm Technologies in delivering the next wave of innovation across a range of integrated circuits that support our business.”

“Collaborative foundry partnerships are critical for us to differentiate ourselves in the competitive market for mobile SoCs,” said Min Li, chief executive officer of Rockchip. “We are pleased to see GF bringing its innovative 22FDX technology to China and investing in the capacity necessary to support the country’s growing fabless semiconductor industry.”

“As our customers increasingly demand more from their mobile experiences, the need for a strong manufacturing partner is greater than ever,” said Joe Chen, co-chief operating officer of MediaTek. “We are thrilled to have a partner like GF that invests in the global capacity we need to deliver powerful and efficient mobile technologies for markets ranging from networking and connectivity to the Internet of Things.”

Intel Corporation yesterday announced plans to invest more than $7 billion to complete Fab 42, a project Intel had previously started and then left vacant. The high-volume factory is in Chandler, Ariz., and is targeted to use the 7 nanometer (nm) manufacturing process. The announcement was made by U.S. President Donald Trump and Intel CEO Brian Krzanich at the White House.

Intel Corporation on Tuesday, Feb. 8, 2017, announced plans to invest more than $7 billion to complete Fab 42. On completion, Fab 42 in Chandler, Ariz., is expected to be the most advanced semiconductor factory in the world. (Credit: Intel Corporation)

Intel Corporation on Tuesday, Feb. 8, 2017, announced plans to invest more than $7 billion to complete Fab 42. On completion, Fab 42 in Chandler, Ariz., is expected to be the most advanced semiconductor factory in the world. (Credit: Intel Corporation)

According to Intel’s official press release, the completion of Fab 42 in 3 to 4 years will directly create approximately 3,000 high-tech, high-wage Intel jobs for process engineers, equipment technicians, and facilities-support engineers and technicians who will work at the site. Combined with the indirect impact on businesses that will help support the factory’s operations, Fab 42 is expected to create more than 10,000 total long-term jobs in Arizona.

Mr. Trump said of the announcement: “The people of Arizona will be very happy. It’s a lot of jobs.”

There will be no incentives from the federal government for the Intel project, the White House said.

Context for the investment was outlined in an e-mail from Intel’s CEO to employees.

“Intel’s business continues to grow and investment in manufacturing capacity and R&D ensures that the pace of Moore’s law continues to march on, fueling technology innovations the world loves and depends on,” said Krzanich. “This factory will help the U.S. maintain its position as the global leader in the semiconductor industry.”

“Intel is a global manufacturing and technology company, yet we think of ourselves as a leading American innovation enterprise,” Krzanich added. “America has a unique combination of talent, a vibrant business environment and access to global markets, which has enabled U.S. companies like Intel to foster economic growth and innovation. Our factories support jobs — high-wage, high-tech manufacturing jobs that are the economic engines of the states where they are located.”

Intel is America’s largest high-technology capital expenditure investor ($5.1 billion in the U.S. 2015) and its third largest investor in global R&D ($12.1 billion in 20151). The majority of Intel’s manufacturing and R&D is in the United States. As a result, Intel employs more than 50,000 people in the United States, while directly supporting almost half a million other U.S. jobs across a range of industries, including semiconductor tooling, software, logistics, channels, OEMs and other manufacturers that incorporate our products into theirs.

The 7nm semiconductor manufacturing process targeted for Fab 42 will be the most advanced semiconductor process technology used in the world and represents the future of Moore’s Law. In 1968, Intel co-founder Gordon Moore predicted that computing power will become significantly more capable and yet cost less year after year.

The chips made on the 7nm process will power the most sophisticated computers, data centers, sensors and other high-tech devices, and enable things like artificial intelligence, more advanced cars and transportation services, breakthroughs in medical research and treatment, and more. These are areas that depend upon having the highest amount of computing power, access to the fastest networks, the most data storage, the smallest chip sizes, and other benefits that come from advancing Moore’s Law.

After the announcement, President Trump tweeted his thanks to Krzanich, calling the factory a great investment in jobs and innovation. In his email to employees, Krzanich said that he had chosen to announce the expansion at the White House to “level the global playing field and make U.S. manufacturing competitive worldwide through new regulatory standards and investment policies.”

“When we disagree, we don’t walk away,” he wrote. “We believe that we must be part of the conversation to voice our views on key issues such as immigration, H1B visas and other policies that are essential to innovation.”

During Mr. Trump’s presidential campaign, Krzanich had reportedly planned a Trump fundraiser event and then cancelled following numerous controversial statements from Trump regarding his proposed immigration policies. Intel has continued to be critical of the Trump administration’s immigration policies, joining over 100 other companies to file a legal brief challenging President Trump’s January 27 executive order which blocked entry of all refugees and immigrants from seven predominantly Muslim countries. Recently, Krzanich took to Twitter to criticize the order, voicing the company’s support of lawful immigration.

In 2012, Paul Otellini, then Intel’s CEO, made a similar promise about Fab 42 in the company of Obama, during a visit to Hillsboro, Oregon.

IC Insights’ 20th anniversary, 2017 edition of The McClean Report shows that since 2010, worldwide economic growth has been the primary influencer of IC industry growth.  In this “global economy-driven” IC industry, factors such as interest rates, oil prices, and fiscal stimulus are the primary drivers of IC market growth.  This is much different than prior to 2010, when capital spending, IC industry capacity, and IC pricing characteristics drove IC industry cycles.

Figure 1 plots the actual annual growth rates for worldwide GDP and the IC market from 1992 and includes IC Insights’ 2017 forecast.  As shown, both of these categories displayed extremely volatile behavior from 1992 through 2010 before registering much more subdued growth rates from 2011 through 2016.  Moreover, IC Insights forecasts similar restrained annual growth rates for worldwide GDP and the IC market through 2021.

Figure 1

Figure 1

Some observations regarding worldwide economic growth (GDP) include the following.

•    Since 1980, the annual worldwide GDP growth has averaged 2.8%. The average annual worldwide GDP growth rate has declined every decade since the 1960s with a slight rebound forecast to be registered in the first seven years of the current decade.

•    Worldwide GDP growth of 2.5% or less is currently considered by most economists to be indicative of a global recession, which puts 2016’s growth right at the threshold.  The 2017 global growth rate is forecast to come in only slightly better at 2.6%.  Prior to the late 1990s, when emerging markets like China and India represented a much smaller share of the worldwide economy, a global recession was typically defined as 2.0% or less growth.  The global recession threshold has never been a “hard and fast” rule, but the guidelines discussed here are useful for this analysis.

Figure 2 compares the actual annual growth rates of worldwide GDP and the worldwide IC market from 2011 through IC Insights’ 2017 forecast.  It is worth mentioning that the same scale used in Figure 1 for both worldwide GDP growth (-2% to 5%) and IC market growth (-40% to 50%) was used for this chart.  It is clear when looking at this specific timeperiod and using the historical growth rate scale end points, that IC market and worldwide GDP growth volatility from 2011 through 2017 is expected to be much more tame than in the past.

Figure 2

Figure 2

Worldwide GDP growth rates are expected to range from 2.5% to 3.0% from 2016 through 2021.  IC Insights’ expects the IC market to mirror the narrow range of worldwide GDP growth with forecasted growth rates ranging from a low of 2% to a high of 7% through 2021.

Given the tight correlation between annual worldwide GDP growth rates and IC market growth rates, IC Insights believes that a significant and noticeable IC market cycle will not occur through 2021 unless there is a significant departure from trend, up or down, for worldwide GDP growth (e.g., <2% growth on the low side and >3.0% growth on the high side).

Worldwide silicon wafer area shipments increased 3 percent in 2016 when compared to 2015 area shipments according to the SEMI Silicon Manufacturers Group (SMG) in its year-end analysis of the silicon wafer industry, while worldwide silicon revenues increased by 1 percent in 2016 compared to 2015.

Silicon wafer area shipments in 2016 totaled 10,738 million square inches (MSI), up from the previous market high of 10,434 million square inches shipped during 2015. Revenues totaled $7.21 billion, one percent higher from the $7.15 billion posted in 2015. “Annual semiconductor silicon volume shipments reached record levels for the third year in a row,” said Chungwei (C.W.) Lee, chairman SEMI SMG and Corporate Development VP of GlobalWafers. “However, despite historical shipment highs, the same cannot be said about silicon revenue. The market remains well below pre-downturn levels.”

Annual Silicon* Industry Trends

2007

2008

2009

2010

2011

2012

2013

2014

2015

2016
Area Shipments (MSI)

8,661

8,137

6,707

9,370

9,043

9,031

9,067

10,098

10,434

10,738
Revenues ($B)

12.1

11.4

6.7

9.7

9.9

8.7

7.5

7.6

7.2

7.2

*Shipments are for semiconductor applications only and do not include solar applications

Silicon wafers are the fundamental building material for semiconductors, which in turn, are vital components of virtually all electronics goods, including computers, telecommunications products, and consumer electronics. The highly engineered thin round disks are produced in various diameters (from one inch to 12 inches) and serve as the substrate material on which most semiconductor devices or “chips” are fabricated.

All data cited in this release is inclusive of polished silicon wafers, including virgin test wafers and epitaxial silicon wafers, as well as non-polished silicon wafers shipped by the wafer manufacturers to the end-users.

NXP Semiconductors N.V. (NASDAQ:NXPI) today announced that Marcel Pelgrom is the recipient of the 2017 Gustav Robert Kirchhoff Award from the IEEE. The long-time NXP researcher and inventor was recognized for “seminal contributions to systematic analysis of random offsets in semiconductor devices and their impact on circuits,” where his theories on random component variation led to the Pelgrom Law, widely acknowledged as a critical enabler of design efficiency in analog chip design.

The Kirchhoff Award, given at the 2017 edition of the International Solid-State Circuits Conference (ISSCC), is sponsored by the IEEE Circuits & Systems Society. Notably, this is the first time in the award’s history that the honoree comes from the commercial electronics industry, with previous recipients coming from academia and research.

“Marcel’s work literally transformed generations of chip designs and is a linchpin in the advancement of a wide range of circuitry that forms the foundation of devices that touch our lives every day,” said Lars Reger, CTO, Automotive at NXP. “His significant contributions helped NXP establish a leadership position in high-performance, mixed-signal circuits and we continue to make use of his insights in virtually every technology we use, both analog and digital. More significantly, it inspired and enabled thousands of engineers throughout the world, and sparked a broader movement in understanding statistical phenomena across the semiconductor industry. I deeply admire his work.”

Pelgrom is most known for his formulation of the random variation (mismatch) behavior between two otherwise identical components. His work is the starting point for proper analysis of matching, essential for accurate analog circuits. The Pelgrom Law or “Pelgrom Model” has been accepted by the global device and design community as an elegant description for mismatch. His 1989 prediction still holds after more than 12 technology generations. The general formulation of the model has allowed applications to other devices, like bipolar devices, resistors and capacitors.

Pelgrom’s contribution has had a dramatic impact on the design efficiency of analog designers, allowing engineers to optimize designs for lowest power and highest yield. Pelgrom’s mismatch model has become an essential performance metric for technology optimization, serving as the key element of communication between the technologists and device physicists on one hand and the design community on the other.

“I am incredibly honored to be recognized by the IEEE and included in such prestigious company of past Kirchhoff Award winners. The namesake of the award is a true pioneer and personal inspiration to me, so it is especially meaningful,” said Pelgrom. “I am also extremely grateful for the opportunities Philips and NXP have given me over the years to pursue my research and provide a practical means to see it implemented to benefit actual chip designers and product developers. The freedom and resources to research and be surrounded with such gifted fellow engineers has been an essential factor in our ability to advance our findings. I am happy to see my colleagues continuing and expanding this research field to keep our company at the forefront of high performance circuits.”

After earning degrees from the Arnhem Polytechnical School (BEE with honors) and the University of Twente (MEE with honors and a Ph.D), Pelgrom began his a career in 1979 at Philips Research, which later became part of NXP. In addition to his groundbreaking research, during that time he wrote three books on AD conversion and taught this topic to generations of R&D engineers at NXP. He retired from NXP in 2013 and is still active as an advisor, consultant and trainer. He regularly teaches classes at TU Delft, University of Twente and Stanford University and serves as honorary professor at the KU Leuven.

The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, today announced the global semiconductor industry posted sales totaling $338.9 billion in 2016, the industry’s highest-ever annual sales and a modest increase of 1.1 percent compared to the 2015 total. Global sales for the month of December 2016 reached $31.0 billion, equaling the previous month’s total and bettering sales from December 2015 by 12.3 percent. Fourth quarter sales of $93.0 billion were 12.3 percent higher than the total from the fourth quarter of 2015 and 5.4 percent more than the third quarter of 2016. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average.

“Following a slow start to the year, the global semiconductor market picked up steam mid-year and never looked back, reaching nearly $340 billion in sales in 2016, the industry’s highest-ever annual total,” said John Neuffer, president and CEO, Semiconductor Industry Association. “Market growth was driven by macroeconomic factors, industry trends, and the ever-increasing amount of semiconductor technology in devices the world depends on for working, communicating, manufacturing, treating illness, and countless other applications. We expect modest growth to continue in 2017 and beyond.”

2016 worldwide revenue

Several semiconductor product segments stood out in 2016. Logic was the largest semiconductor category by sales with $91.5 billion in 2016, or 27.0 percent of the total semiconductor market. Memory ($76.8 billion) and micro-ICs ($60.6 billion) – a category that includes microprocessors – rounded out the top three segments in terms of total sales. Sensors and actuators was the fastest growing segment, increasing 22.7 percent in 2016. Other product segments that posted increased sales in 2016 include NAND flash memory, which reached $32.0 billion in sales for a 11.0 percent annual increase, digital signal processors ($2.9 billion/12.5 percent increase), diodes ($2.5 billion/8.7 percent increase), small signal transistors ($1.9 billion/7.3 percent), and analog ($47.8 billion/5.8 percent increase).

Regionally, annual sales increased 9.2 percent in China, leading all regional markets, and in Japan (3.8 percent). All other regional markets – Asia Pacific/All Other (-1.7 percent), Europe (-4.5 percent), and the Americas (-4.7 percent) – saw decreased sales compared to 2015.

“A strong semiconductor industry is strategically important to U.S. economic growth, national security, and technological leadership,” said Neuffer. “We urge Congress and the new administration to enact polices in 2017 that spur U.S. job creation, and innovation and allow American businesses to compete on a more level playing field with our competitors abroad. We look forward to working with policymakers in the year ahead to further strengthen the semiconductor industry, the broader tech sector, and our economy.”

A team of scientists from the Nanoelectronic Materials Laboratory (NaMLab gGmbH) and the Cluster of Excellence Center for Advancing Electronics Dresden (cfaed) at the Dresden University of Technology have demonstrated the world-wide first transistor based on germanium that can be programmed between electron- (n) and hole- (p) conduction. Transistors based on germanium can be operated at low supply voltages and reduced power consumption, due to the low band gap compared to silicon. Additionally, the realized germanium based transistors can be reconfigured between electron and hole conduction based on the voltage applied to one of the gate electrodes. This enables to realize circuits with lower transistor count compared to state-of-the-art CMOS technologies.

Energy-efficient germanium nanowire transistor with programmable p- and n- conduction is shown. Transmission electron microscope image of cross section. Credit: NaMLab gGmbH

Energy-efficient germanium nanowire transistor with programmable p- and n- conduction is shown. Transmission electron microscope image of cross section. Credit: NaMLab gGmbH

Today´s digital electronics are dominated by integrated circuits built by transistors. For more than four decades transistors have been miniaturized to enhance computational power and speed. Recent developments aim to maintain this trend by employing materials having higher mobility than silicon in the transistor channel, like germanium and indium-arsenide. One of the limitations in using those materials is the higher static power loss in the transistor´s off-state, also originating from their small band gaps. The scientist team around Jens Trommer and Dr. Walter Weber from NaMLab in cooperation with cfaed succeeded in solving this issue by conceiving the germanium-nanowire transistor with independent gating regions. Dr. Weber who leads cfaed’s Nanowire Research Group points out: “For the first time the results demonstrate the combination of low operation voltages with reduced off-state leakage. The results are a key enabler for novel energy efficient circuits.”

The work has been published in the journal ACS Nano.