Tag Archives: letter-pulse-top

The Internet of Things (IoT) is a technology concept that is currently transforming and redefining virtually all markets and industries in fundamental ways. In fact, IHS forecasts that the IoT market will grow from an installed base of 15.4 billion devices in 2015 to 30.7 billion devices in 2020 and 75.4 billion in 2025, according to “IoT Platforms: Enabling the Internet of Things” a new white paper available as a free download from IHS Inc. (NYSE: IHS), a global source of critical information and insight.

An important sign of the fundamental significance of the IoT concept is that most major information and communication technology vendors are now strategically developing IoT offerings. Companies that sit at the heart of the telecom, networking, industrial infrastructure, enterprise system, and cloud computing sectors are now offering platforms to facilitate the broader economy’s transformation to pervasive connectivity. Over the past five years, fragmented efforts to connect machines and sensors in industry-specific ways are now coalescing into a comprehensive vision of connectivity permeating the global physical environment.

“IoT platforms serve to remove the complexity when developing, deploying, and managing applications over the application lifecycle,” said Sam Lucero, senior principal analyst, IHS Technology. “Moreover, these underlying platforms provide operators flexibility to choose various strategic approaches to the IoT beyond simple managed connectivity offers. IoT platforms enable new value-added services for developers and implementers, while providing complete, end-to-end IoT solutions directly to the market.”

The transistor is the most fundamental building block of electronics, used to build circuits capable of amplifying electrical signals or switching them between the 0s and 1s at the heart of digital computation. Transistor fabrication is a highly complex process, however, requiring high-temperature, high-vacuum equipment.

Now, University of Pennsylvania engineers have shown a new approach for making these devices: sequentially depositing their components in the form of liquid nanocrystal “inks.”

Their new study, published in Science, opens the door for electrical components to be built into flexible or wearable applications, as the lower-temperature process is compatible with a wide array of materials and can be applied to larger areas.

The researchers’ nanocrystal-based field effect transistors were patterned onto flexible plastic backings using spin coating but could eventually be constructed by additive manufacturing systems, like 3-D printers.

The study was lead by Cherie Kagan, the Stephen J. Angello Professor in the School of Engineering and Applied Science, and Ji-Hyuk Choi, then a member of her lab, now a senior researcher at the Korea Institute of Geoscience and Mineral Resources. Han Wang, Soong Ju Oh, Taejong Paik and Pil Sung Jo of the Kagan lab contributed to the work. They collaborated with Christopher Murray, a Penn Integrates Knowledge Professor with appointments in the School of Arts & Sciences and Penn Engineering; Murray lab members Xingchen Ye and Benjamin Diroll; and Jinwoo Sung of Korea’s Yonsei University.

The researchers began by taking nanocrystals, or roughly spherical nanoscale particles, with the electrical qualities necessary for a transistor and dispersing these particles in a liquid, making nanocrystal inks.

Kagan’s group developed a library of four of these inks: a conductor (silver), an insulator (aluminum oxide), a semiconductor (cadmium selenide) and a conductor combined with a dopant (a mixture of silver and indium). “Doping” the semiconductor layer of the transistor with impurities controls whether the device transmits a positive or negative charge.

“These materials are colloids just like the ink in your inkjet printer,” Kagan said, “but you can get all the characteristics that you want and expect from the analogous bulk materials, such as whether they’re conductors, semiconductors or insulators.

“Our question was whether you could lay them down on a surface in such a way that they work together to form functional transistors.”

The electrical properties of several of these nanocrystal inks had been independently verified, but they had never been combined into full devices.

“This is the first work,” Choi said, “showing that all the components, the metallic, insulating, and semiconducting layers of the transistors, and even the doping of the semiconductor could be made from nanocrystals.”

Such a process entails layering or mixing them in precise patterns.

First, the conductive silver nanocrystal ink was deposited from liquid on a flexible plastic surface that was treated with a photolithographic mask, then rapidly spun to draw it out in an even layer. The mask was then removed to leave the silver ink in the shape of the transistor’s gate electrode. The researchers followed that layer by spin-coating a layer of the aluminum oxide nanocrystal-based insulator, then a layer of the cadmium selenide nanocrystal-based semiconductor and finally another masked layer for the indium/silver mixture, which forms the transistor’s source and drain electrodes. Upon heating at relatively low temperatures, the indium dopant diffused from those electrodes into the semiconductor component.

“The trick with working with solution-based materials is making sure that, when you add the second layer, it doesn’t wash off the first, and so on,” Kagan said. “We had to treat the surfaces of the nanocrystals, both when they’re first in solution and after they’re deposited, to make sure they have the right electrical properties and that they stick together in the configuration we want.”

Because this entirely ink-based fabrication process works at lower temperatures than existing vacuum-based methods, the researchers were able to make several transistors on the same flexible plastic backing at the same time.

“Making transistors over larger areas and at lower temperatures have been goals for an emerging class of technologies, when people think of the Internet of things, large area flexible electronics and wearable devices,” Kagan said. “We haven’t developed all of the necessary aspects so they could be printed yet, but because these materials are all solution-based, it demonstrates the promise of this materials class and sets the stage for additive manufacturing.”

Samsung Electronics Co., Ltd. announced today that it has begun mass producing the industry’s first 10-nanometer (nm) class, 8-gigabit (Gb) DDR4 (double-data-rate-4) DRAM chips and the modules derived from them. DDR4 is quickly becoming the most widely produced memory for personal computers and IT networks in the world, and Samsung’s latest advancement will help to accelerate the industry-wide shift to advanced DDR4 products.

Samsung 10nm-class DRAM-Group_002

Samsung opened the door to 10nm-class DRAM for the first time in the industry after overcoming technical challenges in DRAM scaling. These challenges were mastered using currently available ArF (argon fluoride) immersion lithography, free from the use of EUV (extreme ultra violet) equipment.

Samsung’s roll-out of the 10nm-class (1x) DRAM marks yet another milestone for the company after it first mass produced 20-nanometer (nm) 4Gb DDR3 DRAM in 2014.

“Samsung’s 10nm-class DRAM will enable the highest level of investment efficiency in IT systems, thereby becoming a new growth engine for the global memory industry,” said Young-Hyun Jun, President of Memory Business, Samsung Electronics. “In the near future, we will also launch next-generation, 10nm-class mobile DRAM products with high densities to help mobile manufacturers develop even more innovative products that add to the convenience of mobile device users.”

Samsung’s leading-edge 10nm-class 8Gb DDR4 DRAM significantly improves the wafer productivity of 20nm 8Gb DDR4 DRAM by more than 30 percent.

The new DRAM supports a data transfer rate of 3,200 megabits per second (Mbps), which is more than 30 percent faster than the 2,400Mbps rate of 20nm DDR4 DRAM. Also, new modules produced from the 10nm-class DRAM chips consume 10 to 20 percent less power, compared to their 20nm-process-based equivalents, which will improve the design efficiency of next-generation, high-performance computing (HPC) systems and other large enterprise networks, as well as being used for the PC and mainstream server markets.

The industry-first 10nm-class DRAM is the result of Samsung’s advanced memory design and manufacturing technology integration. To achieve an extremely high level of DRAM scalability, Samsung has taken its technological innovation one step further than what was used for 20nm DRAM. Key technology developments include improvements in proprietary cell design technology, QPT (quadruple patterning technology) lithography, and ultra-thin dielectric layer deposition.

Unlike NAND flash memory, in which a single cell consists of only a transistor, each DRAM cell requires a capacitor and a transistor that are linked together, usually with the capacitor being placed on top of the area where the transistor rests. In the case of the new 10nm-class DRAM, another level of difficulty is added because they have to stack very narrow cylinder-shaped capacitors that store large electric charges, on top of a few dozen nanometer-wide transistors, creating more than eight billion cells.

Samsung successfully created the new 10nm-class cell structure by utilizing a proprietary circuit design technology and quadruple patterning lithography. Through quadruple patterning, which enables use of existing photolithography equipment, Samsung also built the core technological foundation for the development of the next-generation 10nm-class DRAM (1y).

In addition, the use of a refined dielectric layer deposition technology enabled further performance improvements in the new 10nm-class DRAM. Samsung engineers applied ultra-thin dielectric layers with unprecedented uniformity to a thickness of a mere single-digit angstrom (one 10 billionth of a meter) on cell capacitors, resulting in sufficient capacitance for higher cell performance.

Based on its advancements with the new 10nm-class DDR4 DRAM, Samsung expects to also introduce a 10nm-class mobile DRAM solution with high density and speed later this year, which will further solidify its leadership in the ultra-HD smartphone market.

While introducing a wide array of 10nm-class DDR4 modules with capacities ranging from 4GB for notebook PCs to 128GB for enterprise servers, Samsung will be extending its 20nm DRAM line-up with its new 10nm-class DRAM portfolio throughout the year.

The Semiconductor Industry Association (SIA) today announced worldwide sales of semiconductors reached $26.0 billion for the month of February 2016, a decrease of 3.2 percent compared to the previous month’s total of $26.9 billion and 6.2 percent lower than the February 2015 total of $27.7 billion. Sales into the Americas fell sharply, decreasing 19.3 percent year-to-year, while year-to-year sales into China increased 3.5 percent. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average.

Global semiconductor sales slipped somewhat in February, due to normal seasonal trends, demand softening, and unfavorable macroeconomic conditions,” said John Neuffer, president and CEO, Semiconductor Industry Association. “Most regional markets have struggled to overcome these headwinds, and sales have dipped across the majority of semiconductor product categories.”

Regionally, sales decreased nearly across the board: China (-4.6 percent month-to-month/+3.5 percent year-to-year), Europe(-0.9 percent/-6.3 percent), Japan (-0.8 percent/-3.5 percent), Asia Pacific/All Other (-0.7 percent/-6.3 percent), and the Americas (-7.0 percent/-19.3 percent).

Sales also decreased across most major semiconductor product categories, with the notable exception of microprocessors, which increased year-to-year by 3.4 percent.

February 2016

Billions

Month-to-Month Sales                               

Market

Last Month

Current Month

% Change

Americas

5.41

5.03

-7.0%

Europe

2.72

2.70

-0.9%

Japan

2.49

2.46

-0.8%

China

8.42

8.03

-4.6%

Asia Pacific/All Other

7.85

7.80

-0.7%

Total

26.89

26.02

-3.2%

Year-to-Year Sales                          

Market

Last Year

Current Month

% Change

Americas

6.23

5.03

-19.3%

Europe

2.88

2.70

-6.3%

Japan

2.55

2.46

-3.5%

China

7.76

8.03

3.5%

Asia Pacific/All Other

8.32

7.80

-6.3%

Total

27.74

26.02

-6.2%

Three-Month-Moving Average Sales

Market

Sep/Oct/Nov

Dec/Jan/Feb

% Change

Americas

6.07

5.03

-17.1%

Europe

2.93

2.70

-8.1%

Japan

2.68

2.46

-8.0%

China

8.67

8.03

-7.4%

Asia Pacific/All Other

8.53

7.80

-8.6%

Total

28.88

26.02

-9.9%