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SUNY Polytechnic Institute (SUNY Poly) and GLOBALFOUNDRIES today announced the establishment of a new Advanced Patterning and Productivity Center (APPC), which will be located at the Colleges of Nanoscale Science and Engineering (CNSE) in Albany, N.Y.

The $500 million, 5-year program will accelerate the introduction of Extreme Ultraviolet (EUV) lithography technologies into manufacturing. The center is anchored by a network of international chipmakers and material and equipment suppliers, including IBM and Tokyo Electron, and will generate 100 jobs.

“This advanced new partnership between SUNY Poly and GLOBALFOUNDRIES demonstrates how Governor Cuomo’s strategic investments in SUNY are bolstering the system’s research capacity, leveraging private dollars, and creating exciting new opportunities at our campuses for students and faculty,” said SUNY Chancellor Nancy L. Zimpher. “SUNY Poly’s nanotechnology expertise coupled with the governor’s innovative public-private partnership model has positioned New York as a global leader in computer chip research, development, and manufacturing. SUNY System Administration strongly applauds Dr. Kaloyeros for his leadership in bringing the Advanced Patterning and Productivity Center to Albany.”

“Today’s announcement is a direct result of Governor Cuomo’s innovation driven economic development model. His strategic investments supporting the state’s world class nanotechnology infrastructure and workforce have made us uniquely suited to host the new APPC, which will enable the continuation of Moore’s Law and unlock new capabilities and opportunities for the entire semiconductor industry,” said Dr. Alain Kaloyeros, President and CEO of SUNY Polytechnic Institute. “In partnership with GLOBALFOUNDRIES, IBM and Tokyo Electron, we will leverage our combined expertise and technological capabilities to meet the critical needs of the industry and advance the introduction of this complex technology.”

“GLOBALFOUNDRIES is committed to an aggressive research roadmap that continually pushes the limits of semiconductor technology. With the recent acquisition of IBM Microelectronics, GLOBALFOUNDRIES has gained direct access to IBM’s continued investment in world-class semiconductor research and has significantly enhanced its ability to develop leading-edge technologies,” said Dr. Gary Patton, CTO and Senior Vice President of R&D at GLOBALFOUNDRIES. “Together with SUNY Poly, the new center will improve our capabilities and position us to advance our process geometries at 7nm and beyond.”

EUV lithography is a next-generation semiconductor manufacturing technique that produces short wavelengths (14-nanometers and below) of light to create minuscule patterns on integrated circuits. The technology is critical to achieve the cost, performance, and power improvements needed to meet the industry’s anticipated demands in cloud computing, Big Data, mobile devices, and other emerging technologies.

The APPC will tackle the challenges associated with commercializing EUV lithography technology. A key component of the center will be the installation of the ASML NXE:3300 EUV scanner, a state-of-the-art tool for the development and manufacturing of semiconductor process technologies at 7nm and beyond. This installation follows the installation of the IBM supported ASML NXE:3300B EUV scanner already in place at SUNY Poly.

The center aims to bring mask and materials suppliers together to extend the capabilities of EUV lithography through exploring fundamental aspects of the patterning process. Other projects will be focused on enhancing productivity, in preparation for implementing EUV lithography in the manufacturing of leading-edge products in GLOBALFOUNDRIES’ production facility in Malta, NY.

Through the APPC, members will have access to SUNY Poly’s patterning infrastructure, which includes state-of-the-art film deposition and etch capability, leading-edge patterning systems, EUV mask infrastructure, and world-class EUV imaging capabilities.

“IBM is committed to providing high-performance computing solutions for the cloud and cognitive era through continued leadership and collaboration in semiconductor technology research,” said Mukesh Khare, Vice President at IBM Research. “SUNY Poly CNSE’s investment in the APPC and new ASML tool will accelerate maturity of EUV technology towards manufacturing, which will allow us to build on the innovations that enabled an IBM Research-led alliance to deliver the industry’s first 7nm test chip demonstration earlier this year. Through the vision and leadership of the Governor and CSNE, leading-edge partnerships such as this one are possible.”

“EUV technology has emerged from R&D and the new center will meet the rising demand to commercialize this technology and put it in the hands of end users,” said Gishi Chung, SVP & GM, Head of SPE Development Division from TEL. “TEL is proud to be partnering with SUNY Poly at its Albany NanoTech Complex as we continue our work with fellow industry leaders to advance cutting edge innovations in semiconductor process technology.”

A new 5D solution utilizes multiple types of metrology systems to identify and control fab-wide sources of pattern variation, with an intelligent analysis system to handle the data being generated.

BY ROBERT CAPPEL and CATHY PERRY-SULLIVAN, KLA-Tencor Corp., Milpitas, CA

In order to produce IC devices at sub-16nm design nodes, semiconductor manufacturers are integrating many novel technologies, including multiple patterning, spacer pitch splitting, 3D logic and memory structures, new materials and complex reticles. The challenges associated with these innovative technologies place huge cost strains on the semiconductor industry. In this environment, high yields and fast ramps play critical roles in helping semiconductor manufacturers maintain profitability.

Process control has helped IC manufacturers accelerate yield over the last 30 years, providing the inspection and metrology technologies necessary for early identification of critical process issues. As IC device design nodes shrunk over time, process control systems kept pace through the implementation of innovative technologies that enabled detection of defects and process variations that inhibited yield and reliability. For example, KLA-Tencor’s optical wafer inspection systems have evolved over the past 30 years from using a tungsten-halogen light source, off-the-shelf microscope objectives and an off-the-shelf sensor to utilizing a laser-pumped broadband light source that is brighter than the sun, optics that are as complex as those used in steppers and custom sensors that are 1,000 times faster than a digital camera. Today’s broadband plasma optical patterned wafer inspectors are now capable of detecting 10nm defects—only four times larger than the diameter of a DNA strand. Moreover, the detection of these defects across all die on a 300mm wafer is equivalent to finding hundreds of coins dispersed across an area the size of the state of California from many miles in space—in an hour.

The multiple technologies used to produce today’s leading-edge devices create challenges for process control. Inspection and metrology systems need to be able to extract signal from smaller defects and process/ pattern variations, often on complex 3D structures with high-aspect ratio features. With novel materials and increased process variability, this signal extraction needs to happen in an environment of increased background noise. In addition, with multiple patterning and more process steps, inspection and metrology tools need to provide increased productivity to enable sufficient production monitoring to detect excursions. For example, FinFETs produced using multiple patterning techniques require process control strategies that utilize advanced inspection and metrology systems that integrate design information and produce the sensitivity necessary to help address smaller critical defects, 3D structures and narrow process windows. In addition, the inspection and metrology solutions must also provide improved productivity to help cost-effectively monitor and control the increased number of process steps associated with fabricating the FinFETs using multiple patterning.

These challenges drive the innovation that produces the unique process control technologies and solutions that find design, patterning or process issues early. This capability is essential for IC manufacturers as it enables production of today’s leading-edge and future technologies with maximum yield and device performance at reduced risk and cost.

The value of process control

The inspection and metrology systems at the core of process control are not used to fabricate IC devices, as they do not add or remove materials or create patterns. However, rather than being superfluous steps in IC manufacturing, process control is critical for making high-yielding, reliable devices. By finding defects and measuring critical parameters, inspection and metrology systems monitor the hundreds of steps required to manufacture a device. These process control measurements help fab engineers identify and troubleshoot process issues when there is an excursion. Process control is fundamentally tied to yield as it would be near impossible for fabs to pinpoint process issues that affect yield without inspection and metrology.

Achieving a fast yield ramp to get products to market quickly is essential for chipmakers—any delay in yield ramp affects revenue [1] and can affect future investment in R&D and the release of next-gener- ation products. By taking steps such as implementing capable process control strategies, a fab can attain shorter development times, faster manufacturing ramps and improved production yield. In fact, the value chipmakers can attain from process control is realized in many forms, including: strong return on investment; lower manufacturing costs and risks; increased revenues; faster time to money; improved cycle times; greater profits; and, business continuity.

In order to provide deeper insight into the value of process control, the ten fundamental truths of process control (FIGURE 1) were compiled. Each of the fundamental truths has been introduced in a series of Process Watch articles [2-10], including details on the applications of these truths to semiconductor IC manufacturing. By understanding the fundamental nature of process control through these ten truths, fabs can implement strategies to identify critical defects, find excursions and reduce sources of variation.

Yield 1

Given the increasing complexity of advanced devices and process integration, one of the most critical fundamental truths that fabs must account for going forward is: Process control requirements increase with each design rule [9]. As FIGURE 2 shows, the number of process steps increases dramatically starting with the 16/14nm design node. As the number of process steps increases, all steps must be held to a higher standard for excursions, defect density and variability. If the per-step yield stays constant at the level achieved for the 28nm node, then the predicted cumulative yield will drop with each smaller design node (FIGURE 3). Because of this compounding nature of yield loss, fabs must obtain tighter controls and lower defect density at each individual process step. This drives the need for new process control strategies that not only detect yield- critical defects and subtle process variations, but also allow engineers to increase inspection and metrology sampling. Such process control capability enables direct monitoring of the increased number of process steps and quick detection of excursions that can have a tremendous impact on wafer manufacturing costs.

Yield 2

FIGURE 3. With increasing process steps, the predicted cumulative yield will drop for advanced design nodes if the per- step yield stays constant at 28nm levels.

FIGURE 3. With increasing process steps, the predicted cumulative yield will drop for advanced design nodes if the per- step yield stays constant at 28nm levels.

 

Strategy for future process control challenges

In moving to sub-16nm design nodes, semiconductor manufacturers are faced with many challenges to Moore’s Law. On the technical side, there are the complexities associated with the integration of novel technologies (e.g., multiple patterning, 3D structures, new materials, complex reticles, increased number of process steps). On the economic side, the convergence of these multiple technologies creates increased pressure on fabs to maintain control of costs. Transistor costs are related to the scaling factor, manufacturing costs and yields. With rising fab, design, development and lithography costs, the best solution semiconductor manufacturers have to achieving the cost goals of Moore’s Law is accelerating yield.

In trying to achieve faster yield ramps, IC manufacturers must confront the many issues surrounding the robustness of their design and process window. On the design side, engineers must be able to find and assess design weak points in order to drive improvements that ensure the device design and fabrication techniques are stable for production. At the sub-16nm design nodes, the required pattern overlay budgets are ≤4.5nm, critical dimension specifications are ~2nm and process windows are extremely narrow. In order to drive the changes necessary to achieve these tight patterning specifications (FIGURE 4), engineers need to understand fab-wide sources of patterning error and the impact of variations on process windows. In this environment of tackling difficult technical challenges within cost targets, process control is essential.

FIGURE 4. For advanced multi-patterning technologies, the sources of patterning errors are fab-wide—occurring both inside and outside the lithography cell. In order to meet the incredibly tight specifications for overlay and critical dimensions, engineers must look at reducing the fab-wide sources of process variation.

FIGURE 4. For advanced multi-patterning technologies, the sources of patterning errors are fab-wide—occurring both inside and outside the lithography cell. In order to meet the incredibly tight specifications for overlay and critical dimensions, engineers must look at reducing the fab-wide sources of process variation.

Developing the necessary process control solutions is challenging—requiring both tremendous innovation and close collaboration among multiple sectors within the semiconductor industry. Not only is it necessary to develop novel technologies that provide advanced inspection and metrology system performance, it is also essential to pursue innovation towards comprehensive process control solutions—strategies that tie process control systems together, so they work in concert in the fab with intelligent analysis systems handling the complex, high-volume data being generated. These process control “system of systems” can help fabs achieve faster yield ramp through quick design verification and process window discovery, expansion and control.

Two examples of process control solutions are shown in FIGURE 5. With defect discovery the goal is to detect and identify yield-critical defects that highlight design issues during development and process drift during production. The discovery system leverages design information through NanoPoint technology on the 2920 Series broadband plasma optical defect inspection systems to find critical pattern defects that affect yield the most dramatically. The Surfscan SP5 unpatterned wafer inspection system aids in preventing yield issues by detecting tiny substrate defects that can distort the subsequent films and pattern structures on advanced 3D devices, such as FinFETs and vertical NAND flash. Finally, the eDR-7110 e-beam review and classification system identifies the defects detected by the 2920 Series and Surfscan inspectors. By producing comprehensive information on critical nanoscale defects, the defect discovery solution helps fab engineers characterize, optimize and monitor their advanced processes to accelerate time-to-market.

FIGURE 5. The future of process control involves “system of systems” solutions which tie together multiple inspection and metrology systems with intelligent data analysis. Shown are two examples of process control solutions: KLA-Tencor’s defect discovery solution on the left and KLA-Tencor’s 5D patterning control solution on the right.

FIGURE 5. The future of process control involves “system of systems” solutions which tie together multiple inspection and metrology systems with intelligent data analysis. Shown are two examples of process control solutions: KLA-Tencor’s defect discovery solution on the left and KLA-Tencor’s 5D patterning control solution on the right.

FIGURE 5. The future of process control involves “system of systems” solutions which tie together multiple inspection and metrology systems with intelligent data analysis. Shown are two examples of process control solutions: KLA-Tencor’s defect discovery solution on the left and KLA-Tencor’s 5D patterning control solution on the right.

The goal of the 5D patterning control solution [11, 12] is to help IC manufacturers obtain optimal patterning on advanced devices. With today’s complex multiple patterning and spacer pitch splitting technologies, patterning errors are no longer tied to the lithography cell. Patterning errors can come from fab-wide sources, such as wafer distortion caused by CMP that directly relates to scanner focus errors. The 5D solution utilizes multiple types of metrology systems to identify and control fab-wide sources of pattern variation, with an intelligent analysis system to handle the data being generated. A critical component of this system solution is the ability to feed back and feed forward metrology data (FIGURE 6). Feedback loops have been utilized for many design nodes. For example, Archer 500LCM overlay metrology systems identify patterning errors and feed back information to the lithography module and scanner to improve the patterning of future lots. But, there is also the opportunity to feed forward information that can further improve patterning. For example the Wafer-Sight PWG patterned wafer geometry measurement system can measure wafer shape after processes such as etch and CMP and this data can be fed forward to the scanner to improve patterning [13 – 15]. Overall, this 5D solution—utilizing fab-wide, comprehensive measurements and an intelligent combination of feedback and feed forward control loops—can help fab engineers expand their process windows, reduce variation within those windows, and ultimately obtain better patterning results.

FIGURE 6. KLA-Tencor’s 5D patterning control solution implements multiple data loops to help optimize patterning. Existing feedback loops (blue) have existed for several design nodes and detect and compensate for process variations. New, optimized feedback loops (green) provide earlier detection of process changes. Innovative feed forward loops (orange) utilize metrology systems to measure variations at the source, then feed that data forward to subsequent process steps.

FIGURE 6. KLA-Tencor’s 5D patterning control solution implements multiple data loops to help optimize patterning. Existing feedback loops (blue) have existed for several design nodes and detect and compensate for process variations. New, optimized feedback loops (green) provide earlier detection of process changes. Innovative feed forward loops (orange) utilize metrology systems to measure variations at the source, then feed that data forward to subsequent process steps.

These comprehensive process control solutions are a critical part of IC industry success, enabling high yields and fast ramps by allowing engineers to more quickly and cost-effectively address a broad range of process issues. Going forward, it is essential to maintain an ecosystem of innovation and collaboration that ensures novel process control systems and solutions are developed that address IC process and cost challenges.

References

1. “The Chip Insider,” VLSI research, March 26, 2013.
2. PriceandSutherland,“Process Watch:You Can’t Fix What You Can’t Find,” Solid State Technology, July 2014. http://electroiq.com/blog/2014/07/process-watch-the-10-fundamental-truths-of-
process-control-for-the-semiconductor-ic-industry/
3. PriceandSutherland,“Process Watch:Sampling Matters,”
Semiconductor Manufacturing and Design, September 2014. http://semimd.com/blog/2014/09/15/process-watch-sampling-matters/
4. PriceandSutherland,“Process Watch:The Most Expensive Defect,” Solid State Technology, December 2014. http:// electroiq.com/blog/2014/12/the-most-expensive-defect/
5. Sutherland and Price, “Process Watch: Fab Managers Don’t Like Surprises,” Solid State Technology, December 2014. http:// electroiq.com/blog/2014/12/process-watch-fab-managers-dont- like-surprises/
6. Sutherland and Price, “Process Watch: Know Your Enemy,” Solid State Technology, March 2015. http://electroiq.com/ blog/2015/03/process-watch-know-your-enemy/
7. SutherlandandPrice,“Process Watch:Time is The Enemy of Profitability,” Solid State Technology, May 2015. http://electroiq.com/blog/2015/05/process-watch-time-is-the-enemy-of-profitability/
8. Price and Sutherland, “Process Watch: The Most Expensive Defect, Part 2,” Solid State Technology, July 2015. http://electroiq.com/blog/2015/07/process-watch-the-most-expensive-defect-part-2/
9. Price and Sutherland, “Process Watch: Increasing Process Steps and the Tyranny of Numbers,” Solid State Technology, July 2015. http://electroiq.com/blog/2015/07/process-watch-increasing-process-steps-and-the-tyranny-of-numbers/
10. Sutherland and Price, “Process Watch: Risky Business,” Solid State Technology, September 2015. http://electroiq.com/blog/2015/09/process-watch-risky-business/
11. Korczynski, “Overlay Metrology Suite for Multiple Patterning,” Semiconductor Manufacturing and Design, August 2014. http://semimd.com/blog/2014/08/26/overlay-metrology-suite-for-multiple-patterning/
12. Moyer, “Feed It Forward (And Back),” Electronic Engineering Journal, September 2014. http://www.eejournal.com/archives/ articles/20140915-klat5d/
13. Lee et al, “Improvement of Depth of Focus Control using Wafer Geometry,” Proc. of SPIE, Vol. 9424, 942428, 2015.
14. Tran et al, “Process Induced Wafer Geometry Impact on Center and Edge Lithography Performance for Sub 2X nm Nodes,” 26th Annual SEMI Advanced Semiconductor Manufacturing Conference, 2015.
15. Morgenfeld et al, “Monitoring process-induced focus errors using high resolution flatness metrology,” 26th Annual SEMI Advanced Semiconductor Manufacturing Conference, 2015.

ROBERT CAPPEL is Senior Director and CATHY PERRY-SULLIVAN is Technical Marketing Manager, Global Customer Organization, KLA-Tencor Corporation Milpitas, CA.

By Deborah Geiger, SEMI

The application that world’s largest contract chipmaker TSMC submitted to set up a 12-inch wafer plant in China will likely be green-lighted before Chinese New Year’s rolls around on February 8, according to the China Post on January 26.

The recent Solid State Technology article  “China Semiconductor Acquisitions Surge, SEMICON China Brings the New Market into Focus (SEMI) on January 26 discusses semiconductor equipment spending in 2016 ─  expected to be $5.3 billion, 9 percent above 2015 spending. In 2016, total spending on semiconductor materials in China will be $6.2 billion. Programs such as “Build China’s IC Manufacturing Ecosystem” and “Tech Investment Forum-China 2016” will be offered at the upcoming SEMICON China.

The Shanghai Integrated Circuit Investment Fund (SICIF) announced a plan to invest 20 billion yuan (about $3 billion) in foundry SMIC and two other China chip manufacturers, according to Peter Clarke from the EE Times.

The Taiwan minister of economic affairs, John Deng, says Taiwan’s chip designers “are keen to accept investment from China, but the higher reaches of the semiconductor industry remain off limits.”  In the article “Minister Deng says Chip Designers Need China” by Cheng Ting-Fang and Debby Wu of the Nikkei Asian Review, Deng says that he intends to lobby the new parliament to get the ban lifted.

The article in the Economist “Chips on their Shoulders: China Wants to become a Superpower in Semiconductors” on January 23 discusses how China wants to become a superpower in semiconductors and is planning on spending “colossal sums” to achieve this.

Solid State Technology‘s Ed Korczynski writes about “Imagining China’s IC Fab Industry in 2035 on January 22, noting that China has been investing in technology to reach global competitiveness for many decades. Intel’s Fab68 in Dalian began production of logic chips in 2010, Samsung’s Fab in Xian began production of V-NAND chips in 2014, and TSMC announced it is seeking approval to build a wholly-owned 300mm foundry in Nanjing.  How and why is the pace escalating?

The Nikkei Asian Review article on “U.S. Opposition Scuppers Philips’ $3.3B Sale of Lumileds to Chinese Buyers” by Jennifer Lo on January 22 talks about how Royal Philips had to scrap a $3.3 billion deal to sell its lighting components units to a consortium of Chinese buyers due to opposition by U.S. regulators over national security concerns.

EE Times Silicon Valley Bureau chief Rick Merritt reports from the SEMI Industry Strategy Symposium (ISS) in an article primarily on SMIC on January 20. Merritt postulates that China’s Big Fund is like the Powerball lottery, “A lot of money is at stake so everybody wants to play, but no one knows how to win.” Some say that $100 billion in government and private funds are available.

For a more comprehensive list of articles related to the China market and the semiconductor industry, visit China Market Central which helps you navigate the unfolding China market dynamics — China policy and market developments.

The health of the IC industry is increasingly tied to the health of the worldwide economy. Rarely can there be strong IC market growth without at least a “good” worldwide economy to support it. Consequently, IC Insights expects annual global IC market growth rates to closely track the performance of worldwide GDP growth. In the recently released The McClean Report 2016, IC Insights forecasts 2.7% global GDP growth for 2016, only marginally ahead of what is considered to be the recession threshold of 2.5% growth.

Figure 1 puts the worldwide electronics and semiconductor industries into perspective. The top figure, worldwide GDP, represents all global economic activity. Essentially, the worldwide total available market (TAM) for business (i.e., GDP) was $78.4 trillion in 2015.

In many areas of the world, local economies have slowed. For example, economic growth in China slipped below 7% in 2015. China, which is the leading market for personal computers, digital TVs, smartphones, new commercial aircraft, and automobiles, is forecast to lose more economic momentum in 2016. Its GDP is forecast to increase 6.3% in 2016, which continues a slide in that country’s annual GDP growth rate that started in 2010.

While the U.S. economy is far from perfect, it is currently one of the most significant positive driving forces in the worldwide economy. The U.S. accounted for 22% of worldwide GDP in 2015. U.S. GDP is forecast to grow 2.5% in 2016. Given its size and strength, the U.S. economy greatly influences overall global GDP growth. An improving employment picture and the low price of oil are factors that should positively impact the U.S. economy in 2016.

Other noteworthy industry highlights from the 2016 edition of The McClean Report include the following:

Global semiconductor sales decreased 1% in 2015 but are forecast to grow 4% in 2016. IC Insights expects the worldwide IC market to increase 4% in 2016, and sales of optoelectronics, sensors, and discrete (OSD) devices collectively to register 5% growth.

Figure 1

Figure 1

• Total semiconductor unit shipments (including IC and OSD devices) reached almost 840-billion units in 2015 and are expected to exceed one trillion units in 2018. After increasing 4% in 2015, IC unit shipments are forecast to grow 5% in 2016. Analog devices are forecast to account for 53% of total IC unit shipments in 2016.

• A stable IC pricing environment is expected through 2020 due in part to fewer suppliers in various IC markets (i.e., DRAM, MPU, etc.), lower capital spending as a percent of sales, and no significant new IC manufacturers entering the market in the future (the surge of Chinese IC companies that entered the market in the early 2000’s is assumed to be the last large group of newcomers.

Semiconductor industry capital spending grew to $65.9 billion in 2015. IC Insights forecasts semiconductor capital spending will decrease 1% in 2016. Spending on flash memory and within the foundry segment is forecast to increase in 2016 but spending for all other market segments, including DRAM, is expected to decline. Semiconductor capital spending as a percent of sales is forecast to remain in the mid- to high-teens range through 2020. IC Insights believes spending at this level will not lead to an industry-wide overcapacity during the forecast period.

Semiconductor R&D spending increased 1% in 2015 to new record high of $56.4 billion. Intel dedicated $12.1 billion to R&D in 2015 (24.0% of sales) to remain the largest semiconductor R&D spender in 2015. R&D spending at TSMC, the industry’s biggest pure-play foundry rose 10% in 2015, ranking it 5th among top R&D spenders. TSMC joined the group of top-10 R&D spenders for the first time in 2010, giving an indication of just how important TSMC and other pure-play foundries have become to the IC industry with continuing technological progress.

Further trends and analysis relating to the IC market are covered in the main 400-plus page 2016 edition of The McClean Report.

The popularity of Apple’s iPhone 6S and other products is boosting the microelectromechanical-systems (MEMS) microphones market to a compound annual growth rate (CAGR) of 11 percent from 2015 to 2019. The market is forecast to reach 5.8 billion units, with $1.3 billion in revenue, in 2019. Apple, which shifted from three MEMS microphones in the iPhone 6 line to four in the iPhone 6S line, will purchase more than one billion MEMS microphones in 2016 for the iPhone, according to IHS Inc. (NYSE: IHS).

“Prior to Apple, Microsoft and Motorola had already introduced some smartphones with four MEMS microphones, but in lower volumes,” said Marwan Boustany, senior analyst for MEMS and Sensors for IHS Technology. “Following Apple’s lead, additional manufacturers are expected to start including between two and four MEMS microphones in mobile handsets.”

Source: IHS

 

Apple is expected to purchase more MEMS microphones than Samsung Electronics, Xiaomi and Huawei combined in 2016. When counting the MEMS microphones used for the iPad, and for the earbuds sold with Apple’s iPhone, Apple Watch and Macbook notebooks, Apple accounted for a third of the total consumption of MEMS microphones in 2015.

The move to three or four microphones is currently driven by hands-free calling and voice commands for Siri, Google Now, Cortana and other apps, which are becoming an increasingly important means of interaction between consumers and their smartphones. Additional MEMS microphones are also added on the back of the phone for richer audio fidelity in video recording, noise cancellation and better call and recording performance.

“It will be harder for manufacturers to justify a move to five microphones in the coming years, unless clear and potentially popular use cases are identified,” Boustany said. “So far, Motorola’s Droid Turbo is the only handset with five MEMS microphones to become widely available.”

Knowles remains the market leader in MEMS microphone shipments and revenue, but the company’s share is eroding. Goertek, STMicroelectronics and AAC have recently made great gains in the market, selling to Apple and other companies, according to the IHS MEMS & Sensors for Consumer and Mobile Intelligence Service.

The Semiconductor Industry Association (SIA) today announced the global semiconductor industry posted sales totaling $335.2 billion in 2015, a slight decrease of 0.2 percent compared to the 2014 total, which was the industry’s highest-ever sales total. Global sales for the month of December 2015 reached $27.6 billion, down 4.4 percent compared to the previous month and 5.2 percent lower than sales from December 2014. Fourth quarter sales of $82.9 billion were 5.2 percent lower than the total of $87.4 billionfrom the fourth quarter of 2014. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average.

“Despite formidable headwinds, the global semiconductor industry posted solid sales in 2015, although falling just short of the record total from 2014,” said John Neuffer, president and CEO, Semiconductor Industry Association. “Factors that limited more robust sales in 2015 include softening demand, the strength of the dollar, and normal market trends and cyclicality. In spite of these challenges, modest market growth is projected for 2016.”

Several semiconductor product segments stood out in 2015. Logic was the largest semiconductor category by sales with $90.8 billionin 2015, or 27 percent of the total semiconductor market. Memory ($77.2 billion) and micro-ICs ($61.3 billion) – a category that includes microprocessors – rounded out the top three segments in terms of total sales. Optoelectronics was the fastest growing segment, increasing 11.3 percent in 2015. Other product segments that posted increased sales in 2015 include sensors and actuators, which reached $8.8 billion in sales for a 3.7 percent annual increase, NAND flash memory ($28.8 billion/2.2 percent increase), and analog ($45.2 billion/1.9 percent increase).

Regionally, annual sales increased 7.7 percent in China, leading all regional markets. All other regional markets – the Americas (-0.8 percent), Europe (-8.5 percent), Japan (-10.7 percent), and Asia Pacific/All Other (-0.2 percent) – saw decreased sales compared to 2014.

“The semiconductor industry is critically important to the U.S. economy and our global competitiveness,” continued Neuffer. “We urge Congress to enact polices in 2016 that promote innovation and growth. One such initiative is the Trans-Pacific Partnership (TPP), a landmark agreement that would tear down myriad barriers to trade with countries in the Asia-Pacific. The TPP is good for the semiconductor industry, the tech sector, the American economy, and the global economy. Congress should approve it.”

December 2015

Billions

Month-to-Month Sales                               

Market

Last Month

Current Month

% Change

Americas

6.07

5.75

-5.2%

Europe

2.93

2.77

-5.7%

Japan

2.68

2.57

-4.1%

China

8.67

8.45

-2.5%

Asia Pacific/All Other

8.53

8.08

-5.3%

Total

28.88

27.62

-4.4%

Year-to-Year Sales                          

Market

Last Year

Current Month

% Change

Americas

6.73

5.75

-14.5%

Europe

3.01

2.77

-7.9%

Japan

2.80

2.57

-8.1%

China

8.03

8.45

5.2%

Asia Pacific/All Other

8.57

8.08

-5.7%

Total

29.13

27.62

-5.2%

Three-Month-Moving Average Sales

Market

Jul/Aug/Sep

Oct/Nov/Dec

% Change

Americas

5.82

5.75

-1.2%

Europe

2.87

2.77

-3.6%

Japan

2.69

2.57

-4.3%

China

8.45

8.45

0.0%

Asia Pacific/All Other

8.58

8.08

-5.8%

Total

28.41

27.62

-2.8%

By Christian G. Dieseldorff, Industry Research & Statistics Group, SEMI (January 25, 2016)

The industry’s first and only ‘Global 200mm Fab Outlook report to 2018’ reveals a change in the landscape for 200mm fab capacity.

Figure 1

In comparing 2006 versus 2018, memory capacity share of 200mm has declined to just about 2% as most memory production has migrated to 300mm fabs . A similar transition to 300mm has occurred in Logic/MPU device production.

On the other hand, we see strong 200mm capacity growth from Discrete/Power, MEMS, and Analog segments in part to the transition from 150mm production to 200mm production. Foundry has also been gaining share, driven by strong demand for PMIC, display driver IC, CMOS image sensor, MCU, MEMS, and other devices requiring >90nm process technology. These device technologies are cited as key components for many IoT applications.

Based on these observations, the IoT wave appears to be breathing new life into 200mm fabs. Before the advent of the IoT movement began, 2012 data suggested a decline in 200mm fabs. However, comparing the worldwide installed capacity for 200mm in 6 year intervals, we expect capacity to return to 2006 levels by 2018.

Figure 2

A number of 200mm fab projects globally are being expanded or built through the end of 2018, resulting in capacity growth through the end of that year.

The 200mm Fab Outlook report to 2018 is the industry’s first and one-of-a kind 200mm fab outlook report. It features analysis and forecasts (tables, graphs and text) in over 80 pages in Adobe Acrobat, accompanied by detailed data in an Excel spreadsheet.

This report is of critical interest to anyone who participates in the 200mm device manufacturing supply chain. The Global 200mm Fab Outlook report analyzes past trends and explores future trends out to 2018, extending the forecast period of our existing Fab Database reports.

In this new report, SEMI tracks over 200 facilities manufacturing devices on 200mm wafers, including those that are planned, under construction, installing new equipment, active, closing, or closed.  Over 110 individual companies or institutions are covered. Fab information detailed in the report includes geographic location, amount of equipment spending, capacity trends, and product type changes.

Here are some of the key highlights from the report:

  • Trend of 200mm fab count and capacity out to 2018 (compared to 150mm and 300mm)
  • 200mm Silicon wafer shipment trends
  • Capacity addition by existing and new fabs out to 2018
  • Fabs changing from smaller wafer sizes to 200mm
  • Fabs changing from 200mm to other wafer sizes (like 300mm)
  • Fabs closed (and still closed), will be closed and may be closed by region and product type
  • Fabs/lines starting operation
  • Fabs/lines losing capacity
  • Change of landscape 2006 vs 2018: capacity by region, product type and technology node
  • Top 20 companies adding capacity 2015 to 2018
  • Capacity by region 2015 to 2018
  • Capacity by product type 2015 to 2018
  • Top 20 companies for equipment spending 2015 to 2018
  • Change of landscape equipment spending 2006 vs 2018

For more information on SEMI market research and reports, visit: www.semi.org/en/MarketInfo

Samsung Electronics and Apple remained the top semiconductor buyers in 2015, representing 17.7 percent of the market, according to Gartner, Inc. Samsung Electronics and Apple together consumed $59.0 billion of semiconductors in 2015, an increase of $0.8 billion from 2014 (see Table 1).

“Samsung Electronics and Apple have topped the semiconductor consumption table for five consecutive years, but the growth of Samsung’s design total available market (TAM) was lower than the total semiconductor market in 2014 and 2015,” said Masatsune Yamaji, principal research analyst at Gartner. “Samsung and Lenovo, the fastest-growing companies over the last five years, decreased their design TAM in 2015 and the risk of revenue declines from the strongest customers for semiconductor chip vendors is increasing.”

The top 10 companies bought $123 billion of semiconductors, to account for 36.9 percent of semiconductor chip vendors’ worldwide revenue in 2015. This was down from 37.9 percent in 2014, which was worse than the semiconductor industry’s global total decrease of 1.9 percent.

Table 1. Preliminary Ranking of Top 10 Companies by Semiconductor Design TAM, Worldwide, 2015 (Millions of Dollars)

 

 

2014 Ranking

 

 

2015 Ranking

 

 

 

Company

 

 

 

2014

 

 

 

2015

 

 

Growth (%) 2014-2015

 

 

 2015 Market

Share (%) 

1

1

Samsung Electronics

30,989

29,867

-3.6

8.9

2

2

Apple

27,177

29,116

7.1

8.7

4

3

Lenovo

13,743

13,329

-3.0

4.0

5

4

Dell

10,880

10,686

-1.8

3.2

3

5

HP Inc.

15,616

8,634

-44.7

2.6

7

6

Huawei

6,040

7,020

16.2

2.1

6

7

Sony

7,631

6,947

-9.0

2.1

8

Hewlett Packard Enterprise

0

6,473

1.9

9

9

LG Electronics

5,743

5,533

-3.7

1.7

8

10

Cisco Systems

5,817

5,430

-6.7

1.6

Others

216,695

210,684

-2.8

63.1

Total

340,331

333,718

-1.9

100.0

Note: Some columns do not add to totals shown because of rounding.

Source: Gartner (January 2016)

The market decline happened partly because HP spun off its enterprise business, which bumped Toshiba from the top 10. Toshiba’s design TAM in 2015 was $4.6 billion, so the top 10 companies in 2014 (including HP Inc., Hewlett Packard Enterprise and Toshiba) represented $127.6 billion of semiconductors in 2015 on a design TAM basis, to account for 38.2 percent of semiconductor chip vendors’ worldwide revenue.

As the growth of the personal electronic device market continues to slow, the risk of revenue declines from the strongest customers for semiconductor chip vendors is increasing. Many semiconductor chip vendors, especially general-purpose chip vendors, are trying to reduce the dependency on a limited number of extremely large customers, such as Samsung Electronics, Apple and Lenovo, and are making an effort to diversify their sales targets to the fragmented long-tail small customers, so as to stabilize their business growth with a mass-marketing approach.

“Nine of the top 10 companies in the design TAM ranking for 2014 remained in the top 10 in 2015, but seven of the top 10 decreased their semiconductor demand in 2015,” said Mr. Yamaji. “The slowing of Samsung’s design TAM since 2014 should be considered a big trend change. The cycle of an inflated boom and the obsolescence of electronic equipment are becoming faster, and it is also much more difficult for leading companies to maintain their position for a long time. Current winners may not always be the winners in the future.”

More detailed analysis is available in the report “Market Insight: Top 10 Semiconductor Chip Buyers, Worldwide, 2015 (Preliminary).”

North America-based manufacturers of semiconductor equipment posted $1.34 billion in orders worldwide in December 2015 (three-month average basis) and a book-to-bill ratio of 0.99, according to the December EMDS Book-to-Bill Report published today by SEMI.  A book-to-bill of 0.99 means that $99 worth of orders were received for every $100 of product billed for the month.

SEMI reports that the three-month average of worldwide bookings in December 2015 was $1.34 billion. The bookings figure is 8.6 percent higher than the final November 2015 level of $1.24 billion, and is 2.8  percent lower than the December 2014 order level of $1.38 billion.

The three-month average of worldwide billings in December 2015 was $1.35 billion. The billings figure is 4.9 percent higher than the final November 2015 level of $1.29 billion, and is 3.2 percent lower than the December 2014 billings level of $1.40 billion.

“Both semiconductor equipment bookings and billings improved in December,” said Denny McGuirk, president and CEO of SEMI.  “Despite softness in the equipment market in the fourth quarter, both annual bookings and billings in 2015 of North American equipment suppliers remained above 2014 levels.”

The SEMI book-to-bill is a ratio of three-month moving averages of worldwide bookings and billings for North American-based semiconductor equipment manufacturers. Billings and bookings figures are in millions of U.S. dollars.

Billings
(3-mo. avg)

Bookings
(3-mo. avg)

Book-to-Bill

July 2015

$1,556.2

$1,587.3

1.02

August 2015

$1,575.9

$1,670.1

1.06

September 2015

$1,495.0

$1,554.9

1.04

October 2015

$1,358.6

$1,325.6

0.98

November 2015 (final)

$1,288.3

$1,236.6

0.96

December 2015 (prelim)

$1,351.8

$1,342.7

0.99

Source: SEMI (www.semi.org), January 2016

Worldwide IT spending is forecast to total $3.54 trillion dollars in 2016, just a 0.6 percent increase over 2015 spending of $3.52 trillion dollars, according to Gartner, Inc. 2015 saw the largest U.S. dollar drop in IT spending since Gartner began tracking IT spending. $216 billion dollars less was spent on IT in 2015 than in 2014 and 2014 spending levels won’t be surpassed until 2019.

“The rising U.S. dollar is the villain behind 2015 results,” said John-David Lovelock, research vice president at Gartner. “U.S. multinationals’ revenue faced currency headwinds in 2015. However, in 2016 those headwinds go away and they can expect an additional 5 percent growth.”

The Gartner Worldwide IT Spending Forecast is the leading indicator of major technology trends across the hardware, software, IT services and telecom markets. For more than a decade, global IT and business executives have been using these highly anticipated quarterly reports to recognize market opportunities and challenges, and base their critical business decisions on proven methodologies rather than guesswork.

Table 1. Worldwide IT Spending Forecast (Billions of U.S. Dollars)

 

2015 Spending

2015 Growth (%)

2016 Spending

2016 Growth (%)

Data Center Systems

170

1.8

175

3.0

Software

310

-1.4

326

5.3

Devices

653

-5.8

641

-1.9

IT Services

912

-4.5

940

3.1

Communications Services

1,472

-8.3

1,454

-1.2

Overall IT

3,517

-5.8

3,536

0.6

Source: Gartner (January 2016)

The devices market (PCs, ultramobiles, mobile phones, tablets and printers) is forecast to decline 1.9 percent in 2016. The combination of economic conditions preventing countries such as Russia, Japan and Brazil from returning to stronger growth, together with a shift in phone spending in emerging markets to lower-cost phones, is overlaid with weak tablet adoption in regions where there was an expectation of growth.

Ultramobile premium devices are expected to drive the PC market forward with the move to Windows 10 and Intel Skylake-based PCs. Gartner has slightly reduced the speed of adoption over the forecast period, as buying in Eurasia, Japan, and the Middle East and North Africa moves away from purchasing these relatively more expensive devices in the short term, but expect them to revert back to buying in 2017 as the economic environment stabilizes.

Data center systems’ spending is projected to reach $75 billion in 2016, a 3.0 percent increase from 2015. The server market is the segment that has seen the largest change since the previous quarter’s forecast. The server market has seen stronger-than-expected demand from the hyperscale sector, which has lasted longer than expected. Typically, this segment has spikey demand which lasts for a couple of quarters before moderating. Demand in this segment is expected to continue to be strong through 2016.

The worsening economic environment in emerging markets has had little effect on the global enterprise software spending forecast for 2016, with IT spending on pace to total $326 billion, a 5.3 percent increase from 2015. However, key countries in emerging markets, particularly Brazil and Russia, face escalating political and economic challenges. Organizations in those regions must balance cost cutting with growth opportunities during times of economic concern.

Spending in the IT services market is expected to return to growth in 2016, following a decline of 4.5 percent in 2015. IT services spending is projected to reach 940 billion in 2016, up 3.1 percent from 2015. This is due to accelerating momentum in cloud infrastructure adoption and buyer acceptance of the cloud model.

Telecom services spending is projected to decline 1.2 percent in 2016, with spending reaching $1,454 trillion. The segment will be impacted by the abolition of roaming charges in the European Union and parts of North America. While this will increase mobile voice and data traffic, it will not be enough to counter the corresponding loss of revenue from lost roaming charges and premiums.

More-detailed analysis on the outlook for the IT industry will be presented in the webinar “IT Spending Forecast, 4Q15 Update: What Will Make Headlines in 2016.”