Tag Archives: letter-pulse-top

Combo sensors continue their growth in a market expected to reach US$ 1.4 billion in 2019 overcoming discrete sensors. Yole Développement (Yole), the market research and strategy consulting company, proposes a deep analysis of the inertial combos for consumer application, with its new report, “6&9 Axis Sensors Consumer Inertial Combos”. According to Yole’s analysis, cellphones and tablets still drive the market but wearables will soon take their place in the landscape.

From the players’ side, Yole’s analysts announced: “The ‘big 4′ companies in inertial MEMS share 75% of the consumer inertial combos market.” They saw that STMicroelectronics (STM) lost high-end smartphone share; in parallel, a strong challenge came from InvenSense and Bosch Sensortec, who both, won Apple’s business.

STM is still the global leader in the inertial consumer sensor market with 40 percent market share. InvenSense and Bosch Sensortec hardly compete with it today. InvenSense grew strongly, reaching more than 12 percent, going ahead of Bosch in the inertial market.

“The ‘big 4,’ including AKM, are preparing for the future, with InvenSense holding an advantage as it seems to be ahead in the competition on 9-axis sensors, which are found in a large numbers of products in development, including Google Glass,” said Guillaume Girardin, Technology & Market Analyst, MEMS & Sensors at Yole Développement. “Prices are still dropping sharply, with 6-axis IMUs sold to some large volume customers at less than $1 in 2013,” he added.

To stay in the race, leaders are going to introduce technical innovations: monolithic integration of 6-axis IMUs into 9-axis IMUs, TSVs, chip scale packaging, and active capping.

Current challengers and newcomers are eyeing this combo opportunity and expect to take market share, even though the supply chain is consolidating. Kionix, Freescale, Alps Electric, Fairchild, Maxim and more than 10 other companies are targeting this market space, but the leaders are well established and competition is hard.

New business models are developing and more fabless companies are likely to be involved in the combo market. Details on newcomer technologies and roadmaps are provided in the report.

The combo sensor market is estimated at US$420 million in 2013, US$585 million in 2014, growing to US$1.4 billion in 2019. This represents 28% of the global inertial consumer market in 2014, and will grow to almost 60 percent by 2019. “While smartphones and tablets are still driving volume increases and adoption of combos, the picture should be different in 2019,” said Dr Eric Mounier, Senior Analyst, MEMS devices & Technologies at Yole. “Combo sensors will take a significant portion of total market share, but opportunities will remain for discrete sensors, from accelerometers used in basic activity trackers to gyroscopes for camera module stabilization,” he added.

2012_2019market_consumerdiscrete_and_inertial_393x288

According to preliminary results from the upcoming DisplaySearch Quarterly Mobile PC Shipment and Forecast Report, in the third quarter of this year, the global notebook PC market grew 10 percent year over year, to reach 49.4 million units. Global shipments of tablet PCs, by comparison, fell 8 percent. Notebook PC growth was primarily driven by the developed regions of North America and Western Europe, which increased year-over-year shipments by more than 20 percent in the third quarter.

“The slump in tablet PC demand contributed to the growth in notebook PCs,” said Hisakazu Torii, vice president of smart application research at DisplaySearch, now part of IHS Inc. “Back-to-school sales were quite good, and this growth was supported by low-priced, Windows-based notebook PCs and Chromebooks. Chromebook sales were especially strong in the United States, especially in the commercial and education markets, due to easier IT management and volume-discount offers.”

Chromebooks are forecast to reach 5 percent (8 million units) of total global notebook PC shipments by the end of this year; however, if 2015 demand reaches the 20 million units planned by PC brands and OEMs, it is possible that the Chromebook share would rise to 12 percent. “Early Black Friday newspaper advertisements show some Windows-based notebook PCs and Chromebooks priced under $200,” Torii said.

The top five notebook PC brands collectively grew 23 percent in the third quarter of 2014, reaching 69 percent of total notebook units shipped. With strong sales in North America and Western Europe, the Lenovo Group and HP continued to lead the market, with shares of 20 percent and 19 percent, respectively. Lenovo Group led unit share in Western Europe and China, while HP took the leading position in North America, Eastern Europe and rest of the world. Year-over-year shipments of Apple’s iPad declined 13 percent, although Apple still ranked fifth globally, mainly due to increasing market share in North America. 

Table: Top-Five Worldwide Notebook PC Shipment Share 

Q3’14 Share Q3’13 Share Y/Y Growth
Lenovo Group 20% 16% 38%
HP 19% 18% 13%
Dell 12% 11% 21%
Acer Group 10% 9% 28%
Apple 9% 9% 15%
Total Top Five Brands 69% 62% 23%

Data note: Starting in Q1 2014, DisplaySearch included CCE, NEC, and Mobile Internet and Digital Home Business Group (MIDH) in Lenovo shipments. 

Source: DisplaySearch Quarterly Mobile PC Shipment and Forecast Report

The NPD DisplaySearch Quarterly Mobile PC Shipment and Forecast Report delivers insight into worldwide and regional mobile PC shipments with data for global and regional brands.

The Semiconductor Industry Association (SIA) today announced that the SIA board of directors has elected Brian Krzanich, CEO of Intel, as its 2015 chairman and Dr. Necip Sayiner, president, CEO and director of Intersil, as its 2015 vice chairman.

“We are excited to welcome Brian Krzanich as SIA’s 2015 chairman,” said Brian Toohey, SIA president and CEO. “His exceptional understanding of semiconductor issues and extensive industry experience make him uniquely qualified to help tackle our industry’s challenges and lead us into the future. We appreciate his many achievements and look forward to his leadership in 2015 as SIA chairman.”

Krzanich became the CEO of Intel in May 2013. He has progressed through a series of technical and leadership roles at Intel, most recently serving as the COO since January 2012. As COO, his responsibilities included leading an organization of more than 50,000 employees spanning Intel’s Technology and Manufacturing Group, Intel Custom Foundry, supply chain operations, the NAND Solutions group, human resources, information technology and Intel’s China strategy. Prior to becoming COO, Krzanich held senior leadership positions within Intel’s manufacturing organization. Krzanich began his career at Intel in 1982 in New Mexico as a process engineer.

“On the cusp of innovations such as the Internet of Things, wearable devices and smart cities, the U.S. semiconductor industry is poised for growth,” said Krzanich. “I look forward to collaborating with colleagues and policymakers to ensure that our industry reaches its full potential, continues to create jobs and keeps America at the forefront of technological advancement.”

Dr. Sayiner joined Intersil as president, CEO and director in March 2013. Prior to joining Intersil, he served as president, CEO and director of Silicon Laboratories from September 2005 to April 2012. Previously, Sayiner held various leadership positions at Agere Systems Inc., which included Executive Vice President and General Manager, Enterprise and Networking Division from August 2004 to September 2005; and Vice President and General Manager, Networking ICs Division from March 2002 to August 2004.

“Necip Sayiner has extensive industry experience and a strong technical background,” Toohey said. “His skills and leadership will be a tremendous asset to our association as we work to enact pro-innovation policies and build a stronger semiconductor industry in the U.S. We welcome him as 2015 SIA vice chairman.”

“I’m pleased to be supporting the SIA as vice chairman and helping to drive awareness of the importance of the semiconductor industry to our nation’s economic health,” said Sayiner. “Now more than ever, it is vital that we fight for government policies that promote growth and competitiveness.”

The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing and design – in consultation with Semiconductor Research Corporation (SRC) – today presented its University Research Award to professors from University of California, Berkeley and University of Texas at Dallas in recognition of their outstanding contributions to semiconductor research.

Dr. Tsu-Jae King Liu, TSMC Distinguished Professor in Microelectronics in the Department of Electrical Engineering and Computer Sciences (EECS) at UC Berkeley, received the honor in technology research, while Dr. Kenneth O, professor of engineering at UT Dallas, was recognized for design research.

“We are pleased to honor Dr. Liu and Dr. O for their pioneering work that has helped advance the semiconductor industry,” said Dr. John E. Kelly III, IBM senior vice president, director of IBM Research, and 2014 SIA chairman. “Research is the lifeblood of our industry as we endeavor to advance electronics to new levels of productivity. We salute Dr. Liu and Dr. O for their achievements.”

“SRC’s mission is to seed innovation and help provide the people and ideas to keep its members and the U.S. semiconductor industry competitive, and Dr. Liu and Dr. O are ideal examples of this collective effort,” said SRC President Larry Sumney. “We commend these accomplished researchers for their roles in our university research engine that has made the U.S. the cradle of discovery and technology development.”

Dr. Liu, a member of the Kavli Energy NanoSciences Institute and Chair of the EECS Department at UC Berkeley, earned B.S., M.S. and Ph.D. degrees in Electrical Engineering from Stanford University. Prior to joining UC Berkeley, she worked as a researcher at the Xerox Palo Alto Research Center. Dr. Liu’s current research activities include nanometer-scale logic and memory devices for energy-efficient electronics; she currently leads research on millivolt nanomechanical switches under the NSF Center for Energy Efficient Electronics Science. More on Dr. Liu’s career can be found here.

Dr. O received his B.S., M.S. and Ph.D. degrees in Electrical Engineering and Computer Science from MIT. Before joining UT Dallas, he was a professor at the University of Florida, Gainesville. Dr. O is researching devices, circuits and systems in CMOS for sub-millimeter wave and THz applications. Dr. O is the Director of the Texas Analog Center of Excellence (TxACE) funded by SRC, the state through its Texas Emerging Technology Fund, Texas Instruments Inc., the UT System and UT Dallas. More on Dr. O’s career can be found here.

Worldwide silicon wafer area shipments increased during the third quarter 2014 when compared to second quarter area shipments according to the SEMI Silicon Manufacturers Group (SMG) in its quarterly analysis of the silicon wafer industry.

Total silicon wafer area shipments were 2,597 million square inches during the most recent quarter, a 0.4 percent increase from the 2,587 million square inches shipped during the previous quarter. New quarterly total area shipments are 11.0 percent higher than third quarter 2013 shipments, according to SEMI.

“After reaching record levels in the second quarter, silicon wafer shipment volume growth plateaued during the most recent quarter,” said Hiroshi Sumiya, chairman of SEMI SMG and general manager of the Corporate Planning Department of Shin-Etsu Handotai Co., Ltd. “Year-to-date silicon volumes are 10 percent higher than the same period last year.”

Quarterly Silicon Area Shipment Trends

 

Million Square Inches
 

Q3 2013

Q2 2014

Q3 2014

Q1-Q3 2013

Q1-Q3 2014
Total

2,341

2,587

2,597

6,859

7,548

Semiconductor Silicon Shipments* – Millions of Square Inches

Silicon wafers are the fundamental building material for semiconductors, which in turn, are vital components of virtually all electronics goods, including computers, telecommunications products, and consumer electronics. The highly engineered thin round disks are produced in various diameters (from one inch to 12 inches) and serve as the substrate material on which most semiconductor devices or “chips” are fabricated.

All data cited in this release is inclusive of polished silicon wafers, including virgin test wafers, epitaxial silicon wafers, and non-polished silicon wafers shipped by the wafer manufacturers to the end-users.

The Silicon Manufacturers Group acts as an independent special interest group within the SEMI structure and is open to SEMI members involved in manufacturing polycrystalline silicon, monocrystalline silicon or silicon wafers (e.g., as cut, polished, epi, etc.). The purpose of the group is to facilitate collective efforts on issues related to the silicon industry including the development of market information and statistics about the silicon industry and the semiconductor market.

For more information on the SEMI Worldwide Silicon Wafer Shipment Statistics, visit www.semi.org/en/MarketInfo/SiliconShipmentStatistics.

GLOBALFOUNDRIES, a provider of advanced semiconductor manufacturing, design and technology solutions, today announced a partnership with INVECAS Inc., a newly formed design services provider focused on accelerating customer introduction of new products on leading-edge semiconductor process technologies. INVECAS will operate multiple system-on-chip (SoC) design service centers in both the United States and India to provide exclusive support for GLOBALFOUNDRIES customers.

This new partnership is intended to serve a variety of customers across multiple market segments, from small fabless companies with limited internal resources to large systems companies seeking to differentiate their products through customized silicon. INVECAS will focus on offering design services for GLOBALFOUNDRIES’ leading-edge processes including 14nm FinFET, addressing multiple market segments including high-performance computing, consumer electronics, and mobile communications.

INVECAS will operate design service centers in Santa Clara, Calif., Burlington, Vt., Bangalore, India and Hyderabad, India. INVECAS design centers will be staffed by more than 600 engineers and will provide customers with GLOBALFOUNDRIES-focused design services.

“These newly launched centers will provide a significant complement to our in-house global design solutions capabilities while enhancing our existing ecosystem of design and IP partners,” said Gregg Bartlett, senior vice president of product management at GLOBALFOUNDRIES. “The INVECAS team has a strong track record of providing spec-to-silicon solutions for complex SoC designs in multiple high-volume market segments. They will be an excellent partner to help us expand the services available to customers designing products on the leading edge of technology.”

“By combining our proven system-level expertise with a laser-like focus on GLOBALFOUNDRIES’ advanced processes, INVECAS brings unrivaled expertise to some of the most difficult issues facing designers today,” said Dasaradha Gude, chairman of INVECAS Inc. “This will enable a broader range of customers to accelerate time-to-volume of designs on complex technologies like 14nm FinFETs.”

Through INVECAS, customers will have access to a broad spectrum of services such as system design, embedded software design, SoC design and verification, and physical implementation.

In additional to traditional design services, INVECAS will offer customers a wide selection of design IP across various GLOBALFOUNDRIES process nodes. The IP offerings include standard cells, IOs, memories, analog, and complex interface IP solutions. The center will expand the availability and affordability of qualified IP solutions for GLOBALFOUNDRIES’ leading-edge process technologies.

The new design centers complement GLOBALFOUNDRIES’ broad ecosystem of partners enabling customers to achieve the fastest time-to-volume. Called GLOBALSOLUTIONSSM, the ecosystem includes partners in all aspects of design enablement and turnkey services, OPC and mask operations, and advanced capabilities in assembly solutions.

Texas Instruments Incorporated (TI) today announced it will expand its manufacturing capacity in Chengdu, China, with a 300mm wafer bumping facility. The addition of this manufacturing process in Chengdu further increases TI’s 300mm analog capacity and its ability to support customer demand.

TI announced the new operation today in concert with an event celebrating the grand opening of its seventh assembly/test (A/T) facility. The 358,000 square-foot A/T facility was purchased from UTAC Chengdu Ltd. in December 2013 and is now qualified and in production using advanced quad-flat no-leads (QFN) packaging technology.

TI’s manufacturing investment in China began in 2010 with the opening of the company’s first wafer fabrication plant in Chengdu. TI extended its investment with the adjacent A/T facility, opening today. TI will now further extend its operations in Chengdu with a 300mm wafer bumping facility on its Chengdu High-tech Zone (CDHT) campus.

“The CDHT has been a dynamic area of economic development in West China, offering a strong environment for investment and government service,” said Kevin Ritchie, senior vice president of TI’s Technology & Manufacturing Group. “We’re pleased to extend our 300mm manufacturing capabilities at our world-class Chengdu facility to further ensure continuity of supply to our customers and support their growth.”

Wafer bumping is a manufacturing process for advanced packaging technologies, which is completed prior to assembly. The process replaces wire bonding as the interconnection by applying solder, in the form of bumps, or balls, to a device at the wafer level. Nearly 40 percent of TI’s wafer production is manufactured using bump techniques.

This investment plan does not change TI’s capital spending forecast. The company continues to expect its capital spending levels to remain about 4 percent of revenue.

TI has served a broad array of customers in China for more than 27 years. In addition to its manufacturing footprint in Chengdu, TI has established 18 offices providing sales and applications support, four R&D centers and a product distribution center in Shanghai.

TI has manufacturing operations throughout the world, including the United States, Mexico, Germany, Scotland, China, Malaysia, Japan, Taiwan and the Philippines. Its 300mm operations include the industry’s first 300mm Analog wafer fab in Richardson, Texas as well as its DMOS6 wafer fab in Dallas and bump operations in the Philippines and Dallas.

The Semiconductor Industry Association (SIA), today announced that worldwide sales of semiconductors reached $87 billion during the third quarter of 2014, an increase of 5.7 percent over the previous quarter and a jump of 8 percent compared to the third quarter of 2013. Third quarter sales outperformed the latest World Semiconductor Trade Statistics (WSTS) industry forecast. Global sales for the month of September 2014 reached $29 billion, 8 percent higher than the September 2013 total of $26.9 billion and 1.9 percent more than last month’s total of $28.5 billion. All monthly sales numbers are compiled by WSTS and represent a three-month moving average.

“Through the third quarter of 2014, global semiconductor sales remain strong and well ahead of last year’s pace,” said Brian Toohey, president and CEO, Semiconductor Industry Association. “The industry has now posted seven consecutive months of sequential monthly growth, and year-to-year growth has been strong across nearly all semiconductor product categories, with DRAM and Analog leading the way.”

Regionally, sales were up compared to last month in the Americas (2.8 percent) and Asia Pacific (2.5 percent), but down slightly in Europe (-0.1 percent) and Japan (-1.3 percent). Compared to September 2013, sales increased in Asia Pacific (12 percent), Europe (7.9 percent) and the Americas (3.7 percent), but decreased in Japan (-3.7 percent). All four regional markets have posted better year-to-date sales through September than they did through the same point last year.

September 2014      
Billions      
Month-to-Month Sales      
Market Last Month Current Month % Change
Americas 5.60 5.76 2.8%
Europe 3.22 3.22 -0.1%
Japan 3.07 3.03 -1.3%
Asia Pacific 16.57 16.99 2.5%
Total 28.46 29.00 1.9%
       
Year-to-Year Sales      
Market Last Year Current Month % Change
Americas 5.55 5.76 3.7%
Europe 2.98 3.22 7.9%
Japan 3.15 3.03 -3.7%
Asia Pacific 15.17 16.99 12.0%
Total 26.85 29.00 8.0%
       
Three-Month-Moving Average Sales      
Market Apr/May/Jun Jul/Aug/Sep % Change
Americas 5.24 5.76 9.8%
Europe 3.19 3.22 0.9%
Japan 2.97 3.03 2.2%
Asia Pacific 16.04 16.99 5.9%
Total 27.44 29.00 5.7%

 

SiTime Corporation, a MEMS and analog semiconductor company, today announced that it has signed a definitive agreement under which MegaChips Corporation, a top 25 fabless semiconductor company based in Japan, will acquire SiTime for $200 million in cash. This transaction combines two complementary fabless semiconductor companies that provide solutions for the growing wearables, mobile and Internet of Things markets.

“SiTime’s founders, Markus Lutz and Dr. Aaron Partridge, started the company with a vision of developing game-changing MEMS and analog technology to revolutionize the $5 billion timing industry,” said Rajesh Vashist, CEO of SiTime. “Through innovation, passion and focus, we’ve successfully delivered on this vision. Today, SiTime is the overwhelming leader – we have 1000 customers, 250 million units shipped, major design wins in all electronics segments, and a roadmap that extends SiTime’s MEMS technology to all timing markets.”

“Every SiTime employee is excited to be part of MegaChips as we share a common entrepreneurial culture,” continued Vashist. “MegaChips’ financial strength and scale, with SiTime’s innovation and passion, will rapidly accelerate the adoption of MEMS timing solutions.”

While the world of electronics has delivered many innovations, the clock function, which is the heartbeat in all electronics, still uses 75-year-old quartz technology. SiTime’s MEMS timing solutions replace dated quartz products in the telecom, networking, computing, storage and consumer markets, with the benefits of higher performance, smaller size, and lower power and cost.

“MegaChips has an aggressive growth strategy with a vision to become one of the top ten fabless semiconductor companies through both organic growth and strategic acquisitions,” said Akira Takata, President and CEO of MegaChips Corporation. “MEMS components are fuelling the growth of the semiconductor industry. Through the acquisition of SiTime, MegaChips becomes a leader in MEMS. SiTime will help us expand our portfolio and diversify our customer base. SiTime technology is the perfect match for MegaChips’ solutions that target Wearables, Mobile and IoT markets such as “frizz”, our ultra-low-power smart phone Sensor Hub LSI and BlueChip Wireless, a sub-GHz RF LSI.”

“As a founding investor in SiTime, Bosch recognized early on the tremendous vision and innovation behind SiTime’s approach to MEMS timing,” said Dr. Volkmar Denner, Chairman, Board of Management of Robert Bosch GmbH. “We have closely followed their success from a Silicon Valley startup to a revenue-generating company that sells to some of the world’s largest electronics companies. We are pleased that MegaChips is acquiring SiTime and we expect a bright future for the combined companies.”

“We are delighted by this merger. MegaChips and SiTime are very complementary companies with similar innovative and entrepreneurial cultures, and a unified vision that can transform the electronics industry,” said Joe Horowitz, Managing General Partner at Jafco Ventures and a SiTime Board Member. “By leveraging SiTime’s proprietary technologies and highly differentiated products, I have no doubt this combination is just at its opening act with a great future ahead.”

“Over the past ten years, SiTime has built an extraordinary technology platform and a family of products that is in high demand at leading customers,” said Brooke Seawell, a Venture Partner at New Enterprise Associates and a founding investor and Board Member at SiTime. “With MegaChips’ operational and global scale, SiTime’s future is bright. The combined company will accelerate the adoption of MEMS timing solutions and will become a leading supplier to the electronics industry.”

Upon closing, scheduled for November 2014 pending regulatory approvals and customary closing conditions, SiTime will retain its name and operate as a wholly owned subsidiary of MegaChips. During this transaction, Needham & Company, LLC served as the exclusive financial advisor to SiTime.

MegaChips Corporation was established in 1990 as a fabless company dedicated to ASICs and system LSIs with the goal of integrating LSIs and systems knowledge and solutions.

Belgian nanoelectronics research center imec has announced a joint development project with Coventor, a supplier of semiconductor process development tools. The collaboration will enable faster and more optimized development of advanced manufacturing technology in the 3D device architecture era, extending down to imec’s 10- and 7-nanometer (nm) processes.

To adopt the 7nm node, the industry needs to select the optimal layout, as well as optimize process step performance and control methodology. Using Coventor’s SEMulator3D platform, engineers from imec and Coventor are working together to reduce silicon learning cycles and development costs by down selecting the options for development of next-generation manufacturing technologies. The SEMulator3D platform is an integrated set of modeling tools with enhanced visibility, accuracy and performance that enables engineers to interactively model and simulate a wide range of manufacturing effects in software before committing to expensive test chips.

At imec, process and integration experts have connected optical lithography simulations with Coventor’s SEMulator3D virtual fabrication platform to explore FinFET scaling to the 7nm node and to compare the process window marginalities in several dense SRAM designs using  Spacer Assisted Quadruple Patterning and either multiple immersion or EUV patterning cut/keep solutions. Moreover, a Spacer-Assisted Quad Patterning scheme for 7nm dense interconnect was devised using SEMulator3D, and process window marginalities for an immersion based multiple block patterning solution were analyzed. Additional collaboration will focus on the predictive modeling of Directed Self-Assembly for advanced patterning.

An Steegen, senior vice president process technology at imec said:  “A virtual fabrication platform enables us to tie together integrated processing before all of the individual processes are available.  The SEMulator3D tool gives us the visibility and accuracy to do that, and an integrated platform to bring together all the various elements of advanced processing before moving on to actual silicon.”

“Imec is the premier semiconductor research center, and this collaboration allows us to synchronize our modeling roadmap with one of the industry’s most advanced process roadmaps, as well as to speed the development of their 10nm and 7nm technology,” said David Fried, Chief Technical Officer, Semiconductor, at Coventor. “Working together with imec on novel integration schemes, designing SEMulator3D-specific structures for imec’s testsites, and then calibrating advanced models to imec’s wafer processing is an extremely effective and valuable way for Coventor to optimize our virtual fabrication platform for emerging market requirements.”

imec&conventor