By Jeff Dorsch, Contributing Editor

While the lithography equipment market sometimes seems like A Tale of Two Cities, it’s more complicated than that. The basic fact is that the semiconductor industry is soldiering on with 193-nanometer immersion lithography technology and multiple-patterning exposures while extreme-ultraviolet lithography continues its long-aborning development.

ASML Holding is the leading vendor in the EUV lithography field, and it’s also a big supplier of 193nm immersion lithography systems. The industry consensus now seems to be that the near future will see the combined use of EUV and immersion, possibly at the 10-nanometer process node and definitely at the 7nm node. Beyond that, it’s anyone’s guess.

ASML had big news to reveal at the SPIE Advanced Lithography Symposium in February. Taiwan Semiconductor Manufacturing had successfully exposed 1,022 wafers within 24 hours on ASML’s NXE:3300B EUV system, with sustained power of more than 90 watts from the scanner’s power source.

In April, ASML reported that “one of its major U.S. customers” had agreed to order at least 15 EUV systems. Industry speculation on the unidentified customer quickly centered on Intel. The Dutch company has been relatively quiet since then.

Hans Meiling, ASML’s vice president of service and product marketing EUV, notes the progress that the company has made in the past year, but didn’t offer any new information on its EUV program. ASML’s EUV scanners will be “meeting production requirements within a couple of years,” he says.

“We want to get to 70 percent availability and 1,000 wafers per day,” Meiling says, and not just in a one-day test at TSMC. The goal is to provide that kind of productivity and throughput for all EUV customers, he adds.

In 2016, ASML is aiming for a daily throughput of 1,500 wafers, according to Meiling. “We have a large program internally to support that,” he says.

To make its EUV scanners productive and production-ready, ASML has developments on several fronts, Meiling notes. “It’s a multifaceted introduction of not only the scanner,” he says, taking in photomasks, photoresists, and pellicles.

Progress has been made in detecting and reducing defects in EUV mask blanks, Meiling reports. It seems likely that Intel, Samsung Electronics, and TSMC will each make their own EUV masks, he says.

When it comes to resists, “we don’t control the ecosystem,” Meiling says. “We’re monitoring this.” Resist suppliers are “continually improving critical-dimension quality” and providing “faster resist without losing the imaging capability,” he states.

Even “beautiful masks,” near-perfect photomasks, “have to have a pellicle to protect them,” Meiling observes. “Light goes through the pellicle twice,” he notes, and the pellicle’s membrane must be very thin as a result. ASML began work on a EUV pellicle two years ago and has developed a removable pellicle. The company has achieved “full mask coverage” with its pellicle and is going through an initialization phase on producing them, according to Meiling.

The ASML executive ticks off the attributes of EUV – single exposures of chips, reduction of process complexity, and the capability to deal with the complexity of chip layers. “Customers are finding out with multipatterning, it’s becoming more and more difficult,” Meiling says. “It’s very difficult for certain layers in the chip stack.”

For all the publicity about EUV, ASML is constantly improving its deep-ultraviolet lithography scanners as well, he notes. “Immersion is our workhorse,” Meiling says. “We’re tightening requirements brought to us by customers.”

Stefan Weichselbaum, ASML’s director of product marketing DUV, says the company is committed to “holistic lithography” – looking beyond scanner performance and integrating a metrology environment. Most of all, ASML wants to keep DUV/immersion machines affordable, and “the most simple thing we can do is improving the output,” he says.

Currently capable of processing 250 wafers per hour, the NXT:1980 scanner will be boosted to 275 wafers per hour during the second half of this year, according to Weichselbaum. Among other improvements, ASML has debuted feed-forward corrections, reticle cooling, and wafer-by-wafer correction for higher-order reticle distortion in the NXT:1980. “If we can manage it through software, we will,” he adds.

Donis Flagello, president, CEO, and chief operating officer of Nikon Research Corporation of America, acknowledges that immersion with co-exist with EUV at some point, as ASML and others contend.

“EUV is probably not going to go away,” he says, while adding, “It’s not going to take over.”

Nikon does analysis on EUV technology and the state of the art in immersion lithography; the company is focused on 193nm and “pushing to get the costs down,” Flagello says.

“Demand is still strong” for 193nm machines, he reports. “The entire Internet runs on semiconductors.” Still, “the semiconductor industry is mature” and consolidating, Flagello says. “We can see it in conferences.”

Immersion lithography presents its own challenges in masks and resists, the Nikon executive notes. “We can afford to pump more power into the system,” Flagello says. “We have to control the lenses better.”

While EUV has a long, well-known history of delays and problems, the industry transition to 193nm lithography wasn’t an easy one, either, according to Flagello. “There was lots of stuff we didn’t expect,” he says.

There are alternatives to 193nm and EUV lithography, such as directed self-assembly, direct-write electron-beam, and nanoimprint lithography. DSA “would be complementary” to the mainstream lithography technologies, and the others have their disadvantages, Flagello says.

An Steegen, imec’s senior vice president of process technology, says, “Multipatterning is the most cost-effective way.” With “cheaper materials,” the costs of multipatterning can be further reduced, and “there are lots of efforts here at imec and our suppliers,” she adds.

Immersion lithography can be extended to the 10nm and 7nm process nodes, Steegen says. With EUV, “you can replace multipatterning exposures with one exposure,” she notes.

The industry roadmap calls for EUV insertion into production in 2017, Steegen says. EUV source power is “almost everywhere running at 80 watts,” she adds, and uptime has been improved. “The whole EUV ecosystem is coming together,” Steegen notes, with progress in EUV photomasks and photoresists.

Directed self-assembly is “a complementary patterning technology,” the imec executive says. “We always keep an eye on all the alternatives.” While imec has succeeded in improving DSA, “we are not having huge activities around these areas,” such as multi-beam E-beam and nanoimprint, Steegen says.

“We’re getting smarter, combining multipatterning and EUV,” she adds.

One issue that concerns her is the use of FinFETs in current and future process nodes. “How far can we push those? When will they break?” she asks. “How tall can we make the FinFET? Beyond 5 nanometers? The taller, the better.”

Another area where lithography is progressing is in the field of advanced packaging. Doug Anberg, vice president of advanced stepper technology at Ultratech, says wafer bumping and other packaging technologies are “still progressing forward. We’re seeing a lot of activity in that area.”

Thomas Uhrmann, director of business development for EV Group, says “there is a lot of traction” in lithography for advanced packaging. His company plans to exhibit a nanoimprint platform tool at SEMICON West, intended for making light-emitting diodes and Internet of Things devices.

In summary, there are lots of developments in lithography, along with lots of challenges and lots of questions. And so it goes.