Tag Archives: letter-wafer-business

SEMI, the global industry association representing the electronics manufacturing supply chain, today reported that worldwide semiconductor manufacturing equipment billings reached a historic quarterly high of US$17.0 billion for the first quarter of 2018, surging 59 percent in March to end the quarter with an all-time monthly high of $7.8 billion.

The US$17.0 billion in quarterly billings shatters the previous record set in the fourth quarter of 2017. First quarter 2018 billings are 12 percent higher than the previous quarter and 30 percent higher than the same quarter a year ago. The data are gathered jointly with the Semiconductor Equipment Association of Japan (SEAJ) from over 95 global equipment companies that provide data on a monthly basis.

The quarterly billings data by region in billions of U.S. dollars, quarter-over-quarter growth and year-over-year rates by region are as follows:

1Q2018
4Q2017
1Q2017
1Q18/4Q17
(Qtr-over-Qtr)
1Q18/1Q17
(Year-over-Year)
Korea
6.26
4.64
3.53
35%
78%
China
2.64
1.77
2.01
49%
31%
Taiwan
2.27
2.89
3.48
-22%
-35%
Japan
2.13
1.96
1.25
9%
70%
Europe
1.28
1.04
0.92
23%
39%
Rest of World
1.27
1.22
0.63
4%
103%
North America
1.14
1.58
1.27
-28%
-10%
Total
16.99
15.10
13.08
12%
30%

Source: SEMI (www.semi.org) and SEAJ, June 2018

 

The Equipment Market Data Subscription (EMDS) from SEMI provides comprehensive market data for the global semiconductor equipment market. A subscription includes three reports: the monthly SEMI Billings Report, which offers a perspective of the trends in the equipment market; the monthly Worldwide Semiconductor Equipment Market Statistics (WWSEMS), a detailed report of semiconductor equipment billings for seven regions and 24 market segments; and the SEMI Semiconductor Equipment Forecast, which provides an outlook for the semiconductor equipment market. For more information or to subscribe, please contact SEMI customer service at 1.877.746.7788 (toll free in the U.S.) or 1.408.943.6901 (International Callers). More information is also available online: www.semi.org/en/MarketInfo/EquipmentMarket.

Ultra Clean Holdings, Inc. (Nasdaq: UCTT), a developer and supplier of critical subsystems for the semiconductor and display capital equipment industries, today announced that Ernest Maddock has joined the Board of Directors effective June 1, 2018. Mr. Maddock’s nearly 40 years of experience includes senior leadership roles in finance, operations, and general management. He recently retired as the SVP & CFO of Micron Technology, one of the largest memory chip makers in the world, reporting $20.3 billion in net sales for its fiscal year ended August 31, 2017.

“We are very pleased to announce that Ernie is joining the UCT board of directors. His extensive experience in the semiconductor industry and with UCT makes him a very valuable addition to the board,” said Clarence Granger, Chairman of the Board.

Prior to joining Micron in 2015, Mr. Maddock held leadership positions at multiple global companies including Riverbed Technology, where he served as Executive VP and CFO from April 2013 to April 2015. In that role, he was also responsible for worldwide operations and information technology. Prior to Riverbed, he spent 15 years at Lam Research Corporation rising to EVP & CFO in 2008 and serving in that role until April 2013. His previous roles at Lam included VP, Customer Support Business Group; Group VP and Senior VP of Global Operations.

“We are delighted to have Ernie join our board and benefit from his significant experience and success in business, operations and finance within the Semiconductor industry,” said Jim Scholhamer, President & CEO. “Ernie brings a wealth of knowledge that will be extremely valuable to UCT and its shareholders as we continue to execute on our growth strategy in this exciting market.”

Mr. Maddock has public company board and audit committee experience. He served as a member of the Board of Directors and Audit Committee for Intersil Corporation from July 2015 to February 2017 until Intersil was acquired by Renesas Electronics for $3.2 billion. During his tenure on the Intersil board, Mr. Maddock was appointed as Audit Committee Chair. Mr. Maddock will also serve as Audit Committee Chair of Ultra Clean effective with his appointment to the Board of Directors. He also has private company board experience having served on the Novaled AG board from March 2012 to August 2013; Novaled GmbH now operates as a subsidiary of Samsung SDI Co. Ltd.

Mr. Maddock holds a B.S. in Industrial Management from the Georgia Institute of Technology and an M.B.A. from Georgia State University.

Semiconductor equipment manufacturer ClassOne Technology has announced the sale of its Solstice® Electroplating Systems to the industry’s leading providers of VCSEL (Vertical-Cavity Surface-Emitting Laser) devices in recent months. The announcement was made by ClassOne Group CEO, Byron Exarcos.

“This is an important trend. We’re observing unprecedented demand for VCSEL manufacturing capacity to support 3D sensing, fiber-optic communications, and laser-based materials processing,” said Exarcos. “At the same time, we see that compound semiconductor manufacturers are migrating production from wet-benches to automated single-wafer plating. The strong upturn in our Solstice sales reflects this. Our Solstice platform provides state-of-the-art automation and control, with industry-leading uniformity and throughput. At half the cost of competitive products, Solstice has become the platform of choice for manufacturers who use smaller substrates.”

ClassOne has developed several proprietary high-performance Solstice processing chambers that are of particular interest to VCSEL manufacturers who require high-speed, high-quality cost-cutting plating using materials such as Gold, Nickel or Copper.

“Compound semiconductor makers are looking for maximum flexibility,” explained Exarcos. “They like the fact that Solstice can run multiple wafer sizes simultaneously, and that the platform can be configured for a wide variety of wet processes beyond electroplating. These include Metal Lift Off, Resist Strip, Gold Deplate, UBM Etch, KOH Etch, Anodizing, and more—all from a single automated platform. We call this Plating-Plus™, and it can eliminate the need to purchase additional downstream tools.”

Exarcos emphasized that in addition to system performance, VCSEL manufacturers are attracted to Solstice’s exceptional affordability. The ≤200mm Solstice systems are priced at roughly half the cost of comparable 300mm systems from the large equipment manufacturers.

Solstice is a family of electroplating tools that includes Solstice S8 and S4, which are 8- and 4-chamber systems that can deliver throughputs of up to 75 wph. Multiple wet-process chambers enable the tools to perform multiple processes in-line simultaneously. ClassOne also offers the semi-automated Solstice LT specifically for process development and low-volume applications.

All Solstice customers enjoy access to the services of ClassOne’s world-class applications lab, which offers advanced equipment and expert technical support in developing and optimizing customized wet-process applications.

North America-based manufacturers of semiconductor equipment posted $2.69 billion in billings worldwide in April 2018 (three-month average basis), according to the April Equipment Market Data Subscription (EMDS) Billings Report published today by SEMI. The billings figure is 10.7 percent higher than the final March 2018 level of $2.43 billion, and is 26.0 percent higher than the April 2017 billings level of $2.13 billion.

“April 2018 monthly billings for North American equipment manufacturers surpassed the October 2000 record high of $2.6 billion,” said Ajit Manocha, president and CEO of SEMI. “Storage, artificial intelligence and big data are driving strong demand for semiconductors, offsetting smartphone sales that have lagged expectations this year.”

The SEMI Billings report uses three-month moving averages of worldwide billings for North American-based semiconductor equipment manufacturers. Billings figures are in millions of U.S. dollars.

Billings
(3-mo. avg)
Year-Over-Year
November 2017
$2,052.3
27.2%
December 2017
$2,398.4
28.3%
January 2018
$2,370.1
27.5%
February 2018
$2,417.8
22.5%
March 2018 (final)
$2,431.8
16.9%
April 2018 (prelim)
$2,691.4
26.0%

Source: SEMI (www.semi.org), May 2018

Cadence Design Systems, Inc. (NASDAQ: CDNS) and NI (NASDAQ: NATI) today announced a broad-ranging collaboration to improve the overall semiconductor development and test process of next-generation wireless, automotive and mobile integrated circuits (ICs) and modules. To meet customers’ needs for a streamlined and comprehensive solution, Cadence and NI have pursued projects that integrate key design tool technologies into a common user environment to improve the design, analysis and testing of analog, RF and digital ICs and system-in-package (SiP) modules spanning from pre-silicon design to volume production test. To further enhance RF development, Cadence has also launched the new Virtuoso® RF Solution, which enables RF engineers to design, implement and analyze entire RF modules and RFICs from within the Virtuoso custom IC design platform.

The New Cadence Virtuoso RF Solution and AXIEM 3D Planar EM Software Integration

Traditionally, each major stage in the IC development process has operated in isolation supported by a unique and dedicated set of design tools, models, languages and data formats, which can cause design failures due to the manual translation of data between numerous disjointed tools. To address this issue and streamline the RFIC and RF module design flow, Cadence delivered the following capabilities within the new Virtuoso RF solution:

  • RFIC and RF Module co-design: Provides a robust design environment enabling simultaneous editing of multiple ICs on a complex RF module while streamlining design to manufacturing tasks
  • Single “golden” schematic: Offers schematic-driven layout implementation, EM analysis and simulation and physical verification checks of RFIC and RF module design through a single schematic source, reducing design failures
  • Smart electromagnetic (EM) simulation interface: Includes an integration between the Cadence® Sigrity™ PowerSI® 3D EM Extraction Option and the Virtuoso RF Solution, which automates hours of manual work required to run critical passive component and interconnect EM simulations so users can run multiple in-design experiments

As part of the collaboration between the two companies, the Cadence interface has been extended to include an integration with the AXIEM 3D planar EM simulator, within the Cadence Virtuoso RF Solution design environment. The AXIEM software’s fast solver technology readily addresses passive structures, transmission lines, large planar antenna and patch array problems with more than 100,000 unknowns, providing the accuracy, capacity and speed engineers need to help them ensure design integrity upon the first attempt. It also incorporates NI’s proprietary full-wave planar Method of Moments (MoM) technology that enables discrete- and fast-frequency sweeps.

The integrated Cadence and NI EM solutions equip engineers with a variety of EM analysis methods for designing RFICs and RF modules.

Common Semiconductor Models

Compatible models are critical to ensuring correlated results across different simulation tools. Cadence and NI are jointly working to deliver common transistor models, ensuring consistent simulation behavior of gallium arsenide (GaAs), gallium nitride (GaN) and silicon transistor models between Microwave Office circuit design software and the Cadence Spectre® simulation platform.

“With customers beginning to design the next generation of RF products for 5G, autonomous vehicles and other vertical markets, we saw a need to deliver a comprehensive RF solution that creates more efficiencies and drives innovation,” said Tom Beckley, senior vice president and general manager in the Custom IC & PCB Group at Cadence. “Based on the trusted Virtuoso custom IC design platform, the new Cadence Virtuoso RF Solution streamlines design and analysis for RFIC and RF modules. The collaboration between Cadence and NI and the integration of our tools can enable customers to seamlessly analyze and simulate their chip and package, reducing design cycle time and improving quality of results.”

“Our customers are continuously seeking new approaches to accelerate their product development cycles,” said Kevin Ilcisin, vice president of strategy and corporate development at NI. “The collaboration with Cadence allows us to embed our AXIEM 3D Planar EM software directly into the Virtuoso RF Solution, enabling customers to easily design analog, mixed-signal, RFIC and RF modules.”

The new Virtuoso RF Solution with the integrated AXIEM 3D planar EM solver technology will be sold and supported exclusively by Cadence to leverage years of development and customer deployment expertise. For more information, please visit www.cadence.com/go/virtuosorfni.

SEMI, the global industry association representing the electronics manufacturing supply chain, today announced that the WT | Wearable Technologies Conference 2018 USA will co-locate July 11-12 with SEMICON West 2018 in San Francisco. The electronics industry’s premier U.S. event, SEMICON West — July 10-12 at Moscone North and South — will highlight engines of industry expansion including smart transportation, smart manufacturing, smart medtech, smart data, big data, artificial intelligence, blockchain and the Internet of Things (IoT). Click here to register.

“We are excited that the WT | Wearables Technologies Conference has joined SEMICON West to co-locate in 2018,” said David Anderson, president of SEMI Americas. “Our strategic partnership brings new content and more value to our extended supply chain. Every day the semiconductor industry makes chips smaller and faster with ever-higher performance. These innovations enable new wearable applications for smart living, smart medtech and healthcare that are continuously improving our lives. The WT | Wearable Technologies Conference speakers at SEMICON West 2018 will demonstrate just how they use semiconductor technology to deliver leading-edge wearables.”

“It is a great pleasure to collaborate with the leading global electronics manufacturing association and its successful SEMICON West event,” said Christian Stammel, CEO of WT | Wearables Technologies. “Since the beginning of our platform in 2006, the semiconductor industry has been a major driver of wearables and IoT innovation. All major developments in the WT application markets like healthcare (smart patches), safety and security (tracking solutions), lifestyle and sport (smartwatches and wristbands) and in the industrial field (AR / VR) were driven by semiconductor and MEMS innovations. Our program of expert speakers at SEMICON West will share the latest insights in the wearables market as the SEMI and WT ecosystems explore collaboration and innovation opportunities.”

Technavio projects the global semiconductor glass wafer market to post a CAGR of more than 6% during the forecast period. The emergence of advanced and compact consumer electronic devices is a key driver, which is expected to impact market growth.

Consumer electronic devices have witnessed a massive transformation over the last five years. Feature phones have been replaced by smartphones, PCs by laptops, and now laptops are being replaced by tablets. Cathode ray tube (CRT) TVs are being replaced by light-emitting diode (LED) TVs and organic LED (OLED) TVs. Due to increase in unit shipments of tablets and smartphones over the last five years, the demand for ICs (including MEMS devices and CMOS image sensors) used in these devices is on the rise. As semiconductor glass wafers are integral to ICs, rising demand for ICs will generate strong demand for semiconductor glass wafers over the forecast period.

In this report, Technavio highlights the growing proliferation of IoT and connected devices as one of the key emerging trends to drive the global semiconductor glass wafer market:

Growing proliferation of IoT and connected devices

IoT is a network of interrelated computing devices comprising mechanical and digital machines or objects that possess the ability to transfer data over a network without human-to-computer interaction. More than 30 billion IoT devices, generating about 50 trillion GBs of data, are expected to be connected through IoT by 2022. IoT enables devices to collect data using sensors and actuators and transmits data to a centralized location on a real-time basis, which empowers the user to take an informed decision. Thus, the adoption of IoT is increasing in several market segments, such as consumer electronics, automotive, and medical.

According to a senior analyst at Technavio for semiconductor equipment research, “Sensors and MEMS are an integral part of IoT devices and are manufactured from semiconductor glass wafers. It is projected that a total of one trillion sensors will be produced in 2020 to support the demand for IoT devices. This will require a significant production of semiconductor glass wafers, which can be met by several fabs. Growing applications of IoT will drive the construction of fabs.”

By Jay Chittooran

Jonathan Davis 3Testifying before a U.S. interagency panel weighing trade tariffs against China, a representative from the semiconductor manufacturing industry yesterday called for the removal of more than 100 products from the list of proposed tariffs, stressing that an escalation of the U.S.-Sino dispute could trigger a full-blown trade war and hasten deep, unintended damage including higher consumer prices, an expanded U.S. trade deficit, and a slowdown in U.S. economic growth.

Jonathan Davis, global vice president of industry advocacy at SEMI, the global association representing the electronics manufacturing supply chain, threw the industry’s weight behind protections for valuable intellectual property. But Davis argued that “if implemented as proposed, these tariffs will potentially cost tens of millions annually in additional taxes and lost revenue owing to reduced exports, threaten thousands of high-paying U.S. jobs, and not solve U.S. concerns with China.” Davis said the undue harm will ultimately undercut the ability of U.S. chipmakers to sell overseas, stifling innovation and curbing U.S. technological leadership.

In testimony at the hearing before the government panel that included representatives from the U.S. Trade Representative (USTR), Departments of Treasury, Commerce, State and Defense, and the Council of Economic Advisers, Davis explained that more than 100 lines – products defined for the purpose of setting import duties – of the proposed tariffs would hamstring the semiconductor supply chain. The tariff lines include fundamental components of the semiconductor manufacturing process that are oxygen for the chip industry. As part of his testimony, Davis also submitted comments on the impact of the tariffs.

Charles Gray, general counsel at Teradyne, who also testified at the hearing, explained that the tariffs will threaten growth while penalizing U.S. companies with supply chains that touch China. Gray and Davis were among more than 100 industry leaders who provided more than 3,000 comments in the May 15-17 hearing to evaluate the impact and efficacy of the proposed tariffs.

The hearing followed the Trump administration’s heated, longstanding criticism of China for what it considers unfair trade practices, focusing specifically on intellectual property violations. In recent months, the administration has begun implementing trade actions against China that will increase tariffs, restrict cross-border investment, and introduce significant uncertainty for U.S. businesses.

The Section 301 investigation that determined China’s forced transfer of technology and intellectual property discriminated against U.S. firms prompted a proposed 25 percent tariff on $50 billion in U.S. imports from China – a punitive measure that would squarely hit the semiconductor manufacturing industry.

SEMI continues to educate policymakers on the deep damage tariffs would exact on the long-term health of the semiconductor industry and the critical importance of balanced trade to the future of the semiconductor industry.

For more information on trade or how to participate in SEMI’s public policy program, please contact Jay Chittooran, SEMI public policy manager, at [email protected].

For the 20th year, a worldwide survey of semiconductor manufacturers has resulted in Plasma-Therm winning multiple awards for its systems and superior customer service.

In the annual Customer Satisfaction Survey conducted by VLSIresearch, Plasma-Therm earned a total of five awards, including two “RANKED 1st” awards. Plasma-Therm earned the highest scores of all companies in two award categories, “Etch & Clean Equipment” and “Focused Suppliers of Chip Making Equipment.”

Survey participants are asked to rate semiconductor equipment suppliers in 15 categories based on supplier performance, customer service, and product performance.

“The achievement of two ‘RANKED 1st’ awards and five awards overall is very gratifying” Plasma-Therm CEO Abdul Lateef said. “While we continue to expand our product and application portfolio, we never lose our focus on providing the best service and support. We are working harder than ever to ensure success for all our customers, from small institutions and start-ups to specialty fabs and high-volume manufacturers.”

In THE BEST Suppliers of Fab Equipment, which includes specialized manufacturers like Plasma-Therm as well as the world’s largest equipment makers, Plasma-Therm ranked higher than every other company besides ASML, the world’s largest maker photolithography supplier. Plasma-Therm also was ranked higher than all other suppliers besides ASML in THE BEST Suppliers of Fab Equipment to Specialty Chip Makers.

With this year’s awards, Plasma-Therm now has received a total of 42 awards over 20 years of participation in the Customer Satisfaction Survey. VLSIresearch received feedback from more than 94 percent of the chip market in this year’s survey, which was conducted over 2-1/2 months and in five languages. Here is the full list of awards earned by Plasma-Therm in the 2018 Customer Satisfaction Survey:

• RANKED 1st in FOCUSED SUPPLIERS OF CHIP MAKINGEQUIPMENT • RANKED 1st in ETCH & CLEAN EQUIPMENT
• 10 BEST FOCUSED SUPPLIERS OF CHIP MAKING EQUIPMENT
• THE BEST SUPPLIERS OF FAB EQUIPMENT

• THE BEST SUPPLIERS OF FAB EQUIPMENT TO SPECIALTY CHIP MAKERS About Plasma-Therm

Established in 1974, Plasma-Therm is a manufacturer of advanced plasma processing equipment for specialty semiconductor markets, including advanced packaging, wireless communication, photonics, solid-state lighting, MEMS/NEMS, nanotechnology, renewable energy, data storage, photomask, and R&D. Plasma-Therm offers etch and deposition technologies and solutions for these markets.

By Emir Demircan

SEMI Position on the European Commission’s Proposal for a Regulation Establishing a Framework for Screening Foreign Direct Investments into the European Union

In response to the European Commission’s (EC) proposed framework for screening foreign direct investments (FDI), SEMI, representing the global electronics manufacturing supply chain, offers three recommendations for consideration by EU policymakers:

To support the sophisticated global ecosystem of semiconductor manufacturers, the EU should remain open to global investment. More efforts should be made to form trade and investment agreements that support European businesses’ access to foreign markets.

The global micro- and nano-electronics (MNE) industry consists of organizations specializing in research, design, equipment, materials, semiconductor manufacturing, assembly and applications – a complex global ecosystem that contributes 2 trillion USD (SEMI data) to the world economy. With its production of smaller, faster, more reliable products with higher performance, the MNE industry is one of the world’s most capital- and research-intensive sectors. Today, a state-of-the-art semiconductor manufacturing fab can easily cost billions of euros and might require international investment to deliver cutting-edge solutions.

Europe’s MNE industry plays a pivotal role in this global value chain through its investments in emerging technologies such as autonomous driving, smart healthcare, artificial intelligence and industrial automation. The region’s MNE industry features leading electronics manufacturing equipment and materials businesses, world-class research and development (R&D) and educational institutions, and vital semiconductor manufacturing hubs that are home to multinationals headquartered both inside and outside of the EU.

In the proposed framework, the EU recognizes that FDI is an important engine of economic growth, jobs and innovation. Its work to maintain a climate of open investment and connect European businesses with leading innovators and investors around the world has laid the groundwork for the success of European industrial technologies sector. These efforts have set an example for rich cross-border business relations even in the face of rising protectionist practices around the world.

The proposed EC regulation aims to establish an EU-level framework for exchanging information related to a broad range of technologies between the EC and Member States, and to assess, investigate, authorize, condition, prohibit, or unwind FDI in certain technologies on the grounds of security or public order. EU policymakers should bear in mind that a new EU-level FDI screening mechanism must be implemented very carefully. Stakeholders must clearly understand how FDI can pose a threat to security and public order in the EU.

Only transparent and precise definitions of FDI, security and public order and a limited scope of targeted technologies can provide the regulatory certainty for the EU to remain an attractive destination for foreign investors and European investees alike. On the contrary, unclear regulations could sow insecurity amongst potential investors, leading to delays or cancellation of much-needed investments and choking access to finance in capital-intensive sectors such as MNE.

MNE is a key enabling technology and advances in semiconductors enable market adoption of game-changing technologies such as artificial intelligence. The EU should ensure that future regulations do not cause lock-in effects or limit the growth of key technologies in Europe.

In the interest of security and public order, the proposed EU regulation permits Member States and the EC to screen FDI in critical infrastructure such as energy, transportation, communications and critical technologies including semiconductors, artificial intelligence and cybersecurity.  While it might be easier to screen critical infrastructure and the large-scale public services it provides for potential threats in security and public order, applying the same FDI filter to critical technologies can be extremely challenging.

Semiconductors are embedded in virtually all smart devices and systems including computers, mobile phones, cars, and aircraft. The ubiquity of chips raises the prospect that FDI in European smart technologies – and the supply chain that develops them – could be subject to screening. This level of regulatory oversight is likely to hamper not only EU’s competitiveness in key enabling technologies such as MNE but also ever-evolving applications including artificial intelligence. Also, the proposed screening framework calls for the assessment of FDI risks to security or public order by determining if an investor is controlled by foreign governments through “significant funding.” In the context of FDI, differentiating between state and private actors in other countries can be extremely challenging or even impossible, and the term “significant funding” is not clearly defined. Under this light, SEMI recommends:

  1. Defining a limited scope with clear conditions, explaining in quantitative and qualitative terms how FDI in key enabling technologies can threaten public order and security, and
  2. Introducing criteria that identifies whether an FDI leads to market distortions in Europe because a government investment program is not aligned with EU state-aid rules.

FDI is a powerful tool to support economic growth and competitiveness. Many Member States already screen FDI on the grounds of security and public order. Future regulations should ensure that additional screening neither duplicates national and EU-level assessments nor hampers Member States’ competitiveness.

Under the proposed regulation, the EC could screen FDI at the Union level. However, because many Member States already have detailed screening procedures in place to protect national security and public order, the draft regulation could increase red tape by duplicating administrative processes and regulations at the national and EU levels. Policymakers should keep in mind that FDI must in principle remain a national competence, with each Member State establishing its own national policy aimed at attracting FDI and supporting its economic growth. Many Member States compete to increase their share of EU FDI in key technologies that underpin national economic growth. Likewise, international investors already subject each Member State to their own investment criteria before making significant FDI decisions. Any proposed regulation that pushes Member States to share national-level FDI information could dilute successful FDI policies of some Member States and hamper the EU’s overall competitiveness.

Emir Demircan is Senior Manager Public Policy at SEMI Europe. Contact Emir at [email protected] , 0032484903114. 

Originally published on the SEMI blog.