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Reno Sub-Systems (Reno), a developer of high-performance radio frequency (RF) matching networks, RF power generators and gas flow management systems for semiconductor manufacturing, today announced it has closed its Series C funding. Samsung Venture Investment Corporation led the round. New investors Samsung Venture Investment Corp., Hitachi High-Technologies Corporation and SK hynix all join Reno’s premier list of strategic investors. Existing investors Intel Capital, Lam Research and MKS Instruments also participated in this funding round.

“Our list of strategic investors now includes the venture arms of three of the top five largest semiconductor manufacturers, two out of four of the largest etch tool providers, and a key subsystems supplier,” said Bob MacKnight, CEO of Reno Sub-Systems. “Our holistic approach to precision subsystem process control across RF as well as flow technologies offers clear differentiation from competitive approaches. Our new investors are motivated to participate to secure access to our innovative technologies, to enhance their manufacturing operations or product offerings.”

“We saw high value in Reno’s technology, so it only made sense for us to pursue an investment,” said Dr. Dong-Su Kim, vice president of Samsung Venture Investment Corp.

“The new capabilities that Reno’s subsystems provide will add to our competitive strengths,” said Craig Kerkove, president & CEO of Hitachi High-Technologies America.

“Greater precision and repeatability of processing are key to future device geometries,” said Heejin Chung, head of SK hynix’s Venture Investment. “Reno’s subsystems can help us achieve that.”

The additional funding will support continued development of the technology to enable leading-edge silicon manufacturing technology nodes in high-volume production. “The C-round will allow us to support our rapidly growing number of deployments and enable high-volume manufacturing of our systems to support our recent platform wins,” said MacKnight.

The company also announced that it has secured several additional platform design wins for its Electronically Variable Capacitor (EVC™) impedance matching networks and has been qualified by a leading OEM.

SiFive, the first fabless provider of customized, open-source-enabled semiconductors, today announced it has joined the TSMC (NYSE: TSM) IP Alliance Program, part of the TSMC Open Innovation Platform, which accelerates innovation in the semiconductor design community. As an alliance member, SiFive’s RISC-V based Coreplex IP are made available to its customers to reduce time-to-market, increase return on investment and reduce waste in the manufacturing process.

With the significant increases in non-recurring engineering and design costs required to bring to life new silicon designs, TSMC’s IP Alliance Program makes it easier for fabless chipmakers to innovate and produce custom semiconductors. By participating in the TSMC IP Alliance Program, SiFive becomes the first RISC-V solution provider to make its IP readily available for fabless chipmakers leveraging the industry’s most comprehensive semiconductor IP portfolio.

“Acceptance into the TSMC IP Alliance is an honor and a significant validation not only of SiFive, but of the RISC-V architecture as a whole,” said Jack Kang, vice president of Product and Business Development, SiFive. “Having the SiFive Coreplex IP platform available through the program makes designing a chip based on the latest in open source hardware even easier. We look forward to continued collaboration with TSMC and the other members of the IP Alliance ecosystem.”

“The TSMC Open Innovation Platform forms the center of our open innovation model that addresses the needs of our customers looking to reduce design time and speed time-to-market,” said Suk Lee, TSMC senior director, Design Infrastructure Marketing Division. “The addition of SiFive’s IP to the TSMC IP catalog will streamline the process of fabricating custom silicon designs based on the RISC-V implementation.”

SiFive was founded by the inventors of RISC-V – Andrew Waterman, Yunsup Lee and Krste Asanovic – with a mission to democratize access to custom silicon. In its first six months of availability, more than 1,000 HiFive1 software development boards have been purchased and delivered to developers in over 40 countries. Additionally, the company has engaged with multiple customers across its IP and SoC products, started shipping the industry’s first RISC-V SoC in November 2016 and announced the availability of its Coreplex RISC-V based IP earlier this year. SiFive’s innovative “study, evaluate, buy” licensing model dramatically simplifies the IP licensing process, and removes traditional road blocks that have limited access to customized, leading edge silicon.

North America-based manufacturers of semiconductor equipment posted $2.18 billion in billings worldwide in August 2017 (three-month average basis), according to the August Equipment Market Data Subscription (EMDS) Billings Report published today by SEMI.

SEMI reports that the three-month average of worldwide billings of North American equipment manufacturers in August 2017 was $2.18 billion.The billings figure is 3.9 percent lower than the final July 2017 level of $2.27 billion, and is 27.7 percent higher than the August 2016 billings level of $1.71 billion.

“Equipment billings in August declined relative to July, signaling a pause in this year’s extraordinary growth,” said Ajit Manocha, president and CEO of SEMI. “Nonetheless monthly billings remain well above last year’s monthly levels.”

The SEMI Billings report uses three-month moving averages of worldwide billings for North American-based semiconductor equipment manufacturers. Billings figures are in millions of U.S. dollars.
Billings
(3-mo. avg)
Year-Over-Year
March 2017
$2,079.7
73.7%
April 2017
$2,136.4
46.3%
May 2017
$2,270.5
41.8%
June 2017
$2,300.3
34.1%
July 2017 (final)
$2,269.7
32.9%
August 2017 (prelim)
$2,181.8
27.7%

Source: SEMI (www.semi.org), September 2017

GLOBALFOUNDRIES and Soitec today announced that they have entered into a five-year agreement to ensure the volume supply of state-of-the-art fully depleted silicon-on-insulator (FD-SOI) wafers. This agreement extends the current partnership to provide a solid foundation for both companies to strengthen the FD-SOI supply chain and help ensure high-volume manufacturing.

With the leadership from the two companies, FD-SOI has become the standard technology for cost-effective, low-power devices in high-volume consumer, IoT and automotive applications. The agreement, which is effective immediately, builds on the existing close relationship between the companies and guarantees wafer supply for GF’s 22nm FD-SOI (22FDX®) technology platform.

“GLOBALFOUNDRIES is delivering industry leading ultra-low power, performance-on-demand FD-SOI solutions with cost-sensitive manufacturing options,” said John Docherty, senior vice president of Global Operations at GF. “With Soitec as a long-term strategic partner, this agreement ensures a secure supply to meet the high-volume capacity needs of current and future customers.”

“This agreement represents a long-term commitment from a key strategic customer, further strengthening the FD-SOI supply chain and confirming high-volume adoption,” said Christophe Maleville, executive vice president, Digital Electronics Business Unit at Soitec . “Soitec is fully prepared to support GF on its long-term plan to implement and grow 22FDX. This strategic agreement, with very significant wafer volumes, reflects GF’s strong confidence in Soitec as we build the required capacity to serve the growing FD-SOI demand.”

FD-SOI semiconductor technology has been made possible by the mutual commitment of many companies to deliver breakthroughs at both the device and substrate levels. GF and Soitec collaborate very closely to ensure landmark FD-SOI performance advantages at the right cost in developing the foundry’s FDX platforms. The FD-SOI process technologies are based on ultra-thin SOI substrates manufactured with Soitec’s industry-standard Smart Cut(TM) technology to generate ultra-thin layers with high quality and uniformity.

Offering the best power, performance, area and cost (PPAC) optimization of advanced planar technologies in smart phones, automotive electronics, and Internet of Things (IoT) applications, FD-SOI is quickly becoming a new mainstream process technology for battery powered, wireless and connected devices. This agreement will secure effective demand support for the fast growing, global ecosystem which is fueled by the successful market adoption of GF’s 22FDX technology.

Semiconductor Research Corporation (SRC), today announced that Samsung Electronics Company Ltd. (Samsung), one of the world’s largest chipmakers, has signed an agreement to join SRC’s research consortium. Samsung will participate in two SRC platforms – the New Science Team (NST) project and the Global Research Collaboration (GRC) program.

The NST project, a 5-year, $300M+ initiative commences in January 2018. NST consists of two complementary research programs: JUMP (Joint University Microelectronics Program) and nCORE (nanoelectronics Computing Research), supporting long-term research focused on high- performance, energy-efficient microelectronics for communications, computing and storage needs. Within the GRC program, comprised of nine design and process technology research disciplines, Samsung will participate in the Packaging and Logic & Memory Devices programs.

“It is an exciting time at SRC with the addition of Samsung to our premier group of semiconductor design, manufacturing, and advanced technology companies. SRC welcomes Samsung as we continue to bring together the world’s most brilliant minds to turn theories into reality,” said Ken Hansen, President and CEO of Semiconductor Research Corporation. “We now have the most innovative semiconductor companies collaborating to advance research for next-generation technology and to continue the promise of Moore’s Law economics, bringing increased performance and new product features to the consumer.”

“Collaborative research has been a key element of Samsung’s global strategy,” said Dr. HK Kang, Executive Vice President of Semiconductor Research and Development Center, Samsung Electronics. “The roadmap to future discoveries in technology is deeply rooted in the research coming from industry-sponsored university programs such as NST and GRC. We look forward to working with the SRC team to spark meaningful advancements in semiconductor technology as we explore future innovation.”

With the addition of Samsung, 7 of the top 10 global semiconductor companies are now members of SRC. Samsung represents the fifth non-U.S. headquartered company to join SRC within the last 18+ months.

Lam Research Corp. (Nasdaq: LRCX), a global supplier of wafer fabrication equipment and services to the semiconductor industry, today announced it has recognized seven companies with Supplier Excellence Awards. Selected from among Lam’s extensive list of preferred global suppliers, the 2017 award winners represent partners who have demonstrated a deep commitment to collaboration and strategic operations in an evolving semiconductor industry.

“We are pleased to recognize the critical role our top suppliers play in the delivery of industry-leading products and services to our customers,” said Tim Archer, chief operating officer of Lam Research. “Lam’s business operations continue to grow—in scale, complexity, and geographic footprint. All of the suppliers recognized today demonstrate a commitment to innovation, collaboration, and partnership that will be increasingly important to our future. We are pleased to honor the achievements of these remarkable companies with our 2017 Supplier Excellence Awards.”

Award recipients were announced on September 12 at the company’s 2017 Supplier Day event, during which Lam Research focused on enhancing collaboration and renewing opportunities for mutual success with its customers and suppliers. Executives from suppliers around the world attended the event, where the following seven companies were recognized.

  • Edwards Vacuum
  • HORIBA, Ltd.
  • ILSHIN Precision Co. Ltd.
  • MKS Instruments, Inc.
  • Tokai Carbon Korea Co. Ltd.
  • TOTO, Ltd.
  • Ultra Clean Technology

JoshThe Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, today announced Josh Shiode has joined the association as government affairs director. In this role, Shiode will help advance the U.S. semiconductor industry’s key legislative and regulatory priorities related to semiconductor research and technology, product security, and high-skilled immigration, among others. He also will serve as a senior representative of the industry before Congress, the White House, and federal agencies.

“The U.S. semiconductor industry is a key driver of America’s economic strength, national security, and global technology leadership,” said John Neuffer, SIA president and CEO. “Josh Shiode’s extensive knowledge, skills, and experience will make him an ideal advocate for our industry’s policy priorities in Washington, D.C. We’re thrilled to welcome him to the SIA team and look forward to his help advancing initiatives that promote growth and innovation in our industry and throughout the U.S. economy.”

Shiode most recently served as senior government relations officer at the American Association for the Advancement of Science (AAAS), where he helped guide the association’s science and technology advocacy before the executive and legislative branches. Previously, Shiode was a public policy fellow at the American Astronomical Society (AAS), where he helped develop and implement AAS’s government advocacy strategies. Shiode holds a doctorate in astrophysics from the University of California, Berkeley and a bachelor’s degree in astronomy and physics from Boston University.

SEMI, the global industry association representing the electronics manufacturing supply chain, today reported that worldwide semiconductor manufacturing equipment billings reached US$14.1 billion for the second quarter of 2017.

Quarterly billings of US$14.1 billion represent an all-time historic record for quarterly billings, exceeding the record level set in the first quarter of this year. Billings for the most recent quarter are 8 percent higher than the first quarter of 2017 and 35 percent higher than the same quarter a year ago. Sequential regional growth was mixed for the most recent quarter with the strongest growth exhibited by Korea. Korea maintained the largest market for semiconductor equipment for the year, followed by Taiwan and China. The data are gathered jointly with the Semiconductor Equipment Association of Japan (SEAJ) from over 95 global equipment companies that provide data on a monthly basis.

The quarterly billings data by region in billions of U.S. dollars, quarter-over-quarter growth and year-over-year rates by region are as follows:

2Q2017
1Q2017
2Q2016
2Q2017/1Q2017

(Qtr-over-Qtr)
2Q2017/2Q2016

(Year-over-Year)
Korea
4.79
3.53
1.53
36%
212%
Taiwan
2.76
3.48
2.73
-21%
1%
China
2.51
2.01
2.27
25%
11%
Japan
1.55
1.25
1.05
24%
47%
North America
1.23
1.27
1.20
-3%
3%
Europe
0.66
0.92
0.37
-29%
76%
Rest of World
0.62
0.63
1.31
-1%
-53%
Total
14.11
13.08
10.46
8%
35%

Source: SEMI (http://www.semi.org) and SEAJ (http://www.seaj.or.jp)

The Equipment Market Data Subscription (EMDS) from SEMI provides comprehensive market data for the global semiconductor equipment market.

The eBeam Initiative, a forum dedicated to the education and promotion of new semiconductor manufacturing approaches based on electron beam (eBeam) technologies, today announced the completion of its sixth annual eBeam Initiative perceptions survey. Industry luminaries representing 40 companies from across the semiconductor ecosystem–including photomasks, electronic design automation (EDA), chip design, equipment, materials, manufacturing and research–participated in this year’s survey. The eBeam Initiative also completed its third annual mask makers’ survey with feedback from 10 captive and merchant photomask manufacturers.

Among the results of the perceptions survey, respondents are notably more optimistic about the implementation of EUV lithography for semiconductor high-volume manufacturing (HVM). In addition, expectations on the use of multi-beam mask writing technology for HVM remain high. At the same time, a solid majority of respondents believe that the throughput of variable shaped beam (VSB) mask writing systems is still adequate for the next few years. Results from the eBeam Initiative’s third annual mask makers’ survey indicate that mask write times remain consistent compared with last year’s survey, while responses to several new survey questions pointed to new requirements and challenges for mask makers. These include significantly greater mask data preparation time for finer masks, and a significant rise in the use of mask process correction (MPC) below 16-nm ground rules.

Aki Fujimura, CEO of D2S, the managing company sponsor of the eBeam Initiative, will present the results of the mask makers’ survey in an invited talk this morning at the SPIE Photomask Technology Symposium in Monterey, Calif. In addition, the complete results of both surveys will be discussed by an expert panel later today during the eBeam Initiative’s annual members meeting held in conjunction with the SPIE Photomask Technology Symposium, and will be available for download following the meeting at www.ebeam.org.

Highlights from eBeam Initiative Perceptions Survey

  • 75 percent of respondents predict that EUV will be used in HVM by the end of 2020.
  • The belief that actinic mask inspection for EUV will eventually be used grew significantly, with only 7 percent of respondents indicating it would never be used in HVM, compared to 21 percent of respondents in last year’s survey.
  • 74 percent of respondents predicted that multi-beam technology will be used in mask writing for HVM by the end of 2019. While the weighted average of the expected time for HVM implementation shifted 10 months compared to what last year’s respondents predicted, expectation of multi-beam adoption increased over last year’s survey.
  • While the majority of respondents agree that multi-beam mask writing will be adopted soon, 61 percent also believe that the throughput of current VSB mask writing systems is still adequate for the next few years.
  • 70 percent of respondents believe that inverse lithography technology (ILT) is being used in at least a few critical layers of leading-edge-node production chips today (2017).

Highlights from Mask Makers Survey (data from July 2016 to June 2017)

  • Mask write times have remained consistent compared with last year.
  • At the same time, the weighted average of the mask turnaround time (TAT) is significantly greater for more critical layers, approaching 12 days for 7-nm to 10-nm ground rules.
  • Data prep error was the leading cause of mask returns (28 percent) identified by respondents.
  • The weighted average of mask data preparation time is also significantly greater for finer masks, exceeding 21 hours for 7-nm to 10-nm ground rules.
  • MPC is being applied to over one-third of all masks at 11-nm to 15-nm ground rules. With sub-7-nm ground rules, this increased to 72 percent of all masks reported by respondents.

“We would like to thank everyone for their participation in this year’s annual perceptions survey and mask makers’ survey,” stated Fujimura. “Every year, interest in these surveys continue to grow from throughout the mask-making and semiconductor ecosystem. Participation in the perceptions survey grew from 30 to 40 companies this year, while the mask makers’ survey continues to include leading-edge mask makers from around the globe.”

Added Fujimura, “In the perceptions survey, feedback clearly indicates that EUV has turned a corner, with nearly all respondents anticipating that it will be used in semiconductor HVM at some point in the future. This marks a sizeable shift from only three years ago, when one-third of survey respondents believed that EUV would never see HVM adoption. Also interesting are the responses related to multi-beam technology, where confidence remains high but predictions of its expected insertion point have been extended by nearly a year. In the mask makers’ survey, a new question validated a clear trend on the use of MPC below 16-nm ground rules, partially resulting in the significant increases in data preparation time for masks with finer ground rules.”

EV Group (EVG), a supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced it has received multiple orders for its comprehensive portfolio of manufacturing equipment and services designed to address the burgeoning demand for wafer-level optics (WLO) and 3D sensing. The market-leading portfolio comprises the EVG 770 automated UV-nanoimprint lithography (UV-NIL) stepper for step-and-repeat master stamp fabrication, the IQ Aligner UV imprinting system for wafer-level lens molding and stacking, and the EVG 40 NT automated measurement system for alignment verification. EVG’s WLO solutions are supported by the company’s NILPhotonics Competence Center, which leverages field-proven process and equipment know-how to support emerging photonic applications and significantly shorten time to market through fast process implementation and optimization, as well as through customized equipment design.

Using imprint lithography and bond-alignment technologies to fabricate microlenses, diffractive optical elements and other optical components at the wafer-level provides numerous benefits. These include lowering cost of ownership through highly parallel fabrication processes, as well as enabling smaller form factors of the final devices through stacking. EVG is both a pioneer and market leader in nanoimprint lithography and micromolding with the largest installed base of tools worldwide.

“We are seeing a steep increase in the demand for equipment enabling wafer-level optics,” confirmed Dr. Thomas Glinsner, corporate technology director for EV Group. “Since the beginning of this year alone, we have shipped multiple systems for lens molding and stacking as well as metrology to major WLO manufacturers for high-volume production. Such orders are further strengthening EVG’s position as the market leader in this area, while creating a wealth of new opportunities in emerging applications.”

Industry-leading device makers have recently announced plans to broaden their business targets in the sensing space to help address customers’ increasingly aggressive time-to-market windows. According to market research and strategy consulting firm Yole Développement, more than a dozen types of sensors are being designed into next-generation smartphones. These include 3D sensing cameras, fingerprint sensors, iris scanners, laser diode emitters, laser rangers and biosensors. Overall, the optical hub is expected to grow from $10.6 billion in 2016 to $18 billion by 2021, showing a compound annual growth rate of more than 11 percent.

Demand for EVG’s WLO manufacturing solutions is driven in part by the need for novel optical sensing solutions and devices for mobile consumer electronics products. Key examples include 3D sensing (essential for more authentic virtual and augmented reality (VR/AR) user experiences), biometric sensing (increasingly critical for security applications), environmental sensing, infrared (IR) sensing and camera arrays. Other applications include additional optical sensors in smartphones for advanced depth sensing to improve camera autofocus performance, and micro displays.

“There is undoubtedly a highly sustainable trend emerging in wafer-level optics and 3D sensing,” stated Markus Wimplinger, EV Group’s corporate technology development and IP director. “We foresee even broader adoption of this technology in the near future due to the large number of ongoing customer projects supported by our NILPhotonics Competence Center located at our corporate headquarters.”