Tag Archives: letter-wafer-business

North America-based manufacturers of semiconductor equipment posted $2.03 billion in billings worldwide in March 2017 (three-month average basis), according to the March Equipment Market Data Subscription (EMDS) Billings Report published today by SEMI.

SEMI reports that the three-month average of worldwide billings of North American equipment manufacturers in March 2017 was $2.03 billion. The billings figure is 2.6 percent higher than the final February 2017 level of $1.97 billion, and is 69.2 percent higher than the March 2016 billings level of $1.20 billion.

“March billings reached robust levels not seen since March 2001,” said Dan Tracy, senior director, Industry Research and Statistics, SEMI. “The equipment industry is clearly benefiting from the latest semiconductor investment cycle.”

The SEMI Billings report uses three-month moving averages of worldwide billings for North American-based semiconductor equipment manufacturers. Billings figures are in millions of U.S. dollars.

Billings
(3-mo. avg)

Year-Over-Year
 October 2016

$1,630.4

20.0%
 November 2016

$1,613.3

25.2%
 December 2016

$1,869.8

38.5%
 January 2017

$1,859.4

52.3%
 February 2017 (final)

$1,974.0

63.9%
 March 2017 (prelim)

$2,026.2

69.2%

Source: SEMI (www.semi.org), April 2017

SEMI ceased publishing the monthly North America Book-to-Bill report in January 2017. SEMI will continue publish a monthly North American Billings report and issue the Worldwide Semiconductor Equipment Market Statistics (WWSEMS) report in collaboration with the Semiconductor Equipment Association of Japan (SEAJ). The WWSEMS report currently reports billings by 24 equipment segments and by seven end market regions.

Samsung Electronics Co., Ltd. announced today that its second generation 10-nanometer (nm) FinFET process technology, 10LPP (Low Power Plus), has been qualified and is ready for production. With further enhancement in 3D FinFET structure, 10LPP allows up to 10-percent higher performance or 15-percent lower power consumption compared to the first generation 10LPE (Low-Power Early) process with the same area scaling.

Samsung was the first in the industry to begin mass production of system-on-chips (SoCs) products on 10LPE last October. The latest Samsung Galaxy S8 smartphones are powered by some of these SoCs.

To meet long-term demand for the 10nm process for a wide range of customers, Samsung has started installing production equipment at its newest S3-line in Hwaseong, Korea. The S3-line is expected to be ready for production by the fourth quarter of this year.

“With our successful 10LPE production experience, we have commenced production of the 10LPP to maintain our leadership in the advanced-node foundry market,” said Ryan Lee, Vice President of Foundry Marketing at Samsung Electronics. “10LPP will be one of our key process offerings for high performance mobile, computing and network applications, and Samsung will continue to offer the most advanced logic process technology.”

3D-Micromac AG, a developer of laser micromachining and roll-to-roll laser systems for the photovoltaic, medical device and electronics markets, today announced that the total received order volume for its microCELL TLS high-throughput half-cell cutting tools tops 1.5 GW for tool deliveries in 2017 to date.

The microCELL TLS systems use Thermal Laser Separation for cleaving solar cells into half-cells. This process provides a multitude of mechanical and electrical benefits to customers. The separated cells show a significantly higher mechanical strength, better edge quality as well as lower power reduction compared to laser scribing and cleaving approaches. A module power gain of more than 1 W was seen with TLS compared to conventional scribe and break methods, in addition to the 5-7 W per module gain of half-cell module technology.

Further cementing its position as the market leader for laser systems in photovoltaics,
3D-Micromac also yesterday introduced its second-generation microCELL OTF system, the high-performance production solution for Laser Contact Opening (LCO) of Passivated Emitter Rear Contact (PERC) solar cells, which achieves a world-class throughput of 8,000 wafers per hour.

At SEMICON Southeast Asia 2017, Dr. Chen Fusen, CEO of Kulicke & Soffa Pte Ltd, Singapore, will give a keynote on digital transformation in the manufacturing sector. Chen believes that Smart Manufacturing, or Industry 4.0, is no longer hype but real, and Asia needs to get on board sooner rather than later. SEMICON Southeast Asia (SEA) 2017, held at the SPICE arena in Penang on 25-27 April, is Asia’s premier showcase for electronics manufacturing innovation.

“Digital transformation has proven to provide solutions for addressing challenges in the manufacturing industry but there is still the issue of acceptance as well as lack of skills and knowledge that needs to be addressed,” said Chen. “With disruptive technology changing our world, I expect that more companies will see the value of their investments realised as this technology accelerates the creation of more individualised products and services.”

Dr. Hai Wang from NXP Semiconductors Singapore Pte Ltd agreed that more consumer-related innovations would stem from digital transformation as demand for solutions that provide efficiency and security increases. “At NXP, we look at developing advanced cyber security solutions for the automotive industry, such as tracking and analysing intelligence around connected and automated vehicles, which will help to counter any adverse threats in real time. These innovations are real and will soon mark a shift in the future of automation and manufacturing. It is vital that we embrace the change and adapt accordingly,” he said.

Other speakers at SEMICON SEA also feel strongly about the importance of Smart Manufacturing and digital transformation. David Chang of HTC Corporation, Taiwan, sees a dramatic shift in the value of being a “smart” manufacturer to address to the rising demand in consumer products and services innovation. “We have seen virtual reality technology offered by products such as HTC VIVE(TM) really shaping the future of the world. Transformative innovations such as this will pave the way for disruptive technology to be coupled into business models to benefit consumers in the long term,” he said.

These three speakers will join a long list of thought leaders from the electronics manufacturing sector – including Jamie Metcalfe from Mentor Graphics U.S., Chiang Gai Kit from Omron Asia Pacific Singapore, Ranjan Chatterjee from Cimetrix U.S. and Duncan Lee from Intel Products Malaysia – to speak at SEMICON SEA 2017. Topics discussed will cover issues relevant to the transformation of the manufacturing industry ranging from next-generation manufacturing to system-level integration, including exhibitions that will highlight the market and technology trends that are driving investment and growth in all sectors across the region.

The conference also aims to champion regional collaboration through new business opportunities for customers and foster stronger cross-regional engagement through reaching buyers, engineers and key decision-makers in the Southeast Asia microelectronics industry, including buyers from Malaysia, Singapore, Thailand, Indonesia, the Philippines, and Vietnam.

Learn more about SEMICON Southeast Asia 2017 in Penang, Malaysia on 25-27 April: http://www.semiconsea.org/.

Kulicke & Soffa Industries, Inc. (NASDAQ: KLIC) announced today the opening of its latest Process and Applications laboratory at the K&S Netherlands facility.

The 180 square meter laboratory adds to the Company’s existing base of global application facilities. The Netherlands site uniquely houses a complete prototype assembly line of K&S Advanced Packaging and Electronics Assembly equipment. The laboratory will facilitate stronger collaboration with global customers and industry partners to develop and refine next-generation of packaging solutions in direct response to the industry’s emerging challenges and opportunities. It also serves as a platform to accelerate internal development roadmaps and engineering competencies.

Bob Chylak, Kulicke & Soffa’s Vice President of Global Process Engineering, said, “This new lab marks another significant milestone for K&S and further enhances our capabilities to deploy the latest technology for component mounting, with a specific focus on applications requiring high-accuracy placement for passive components as well as active bare or packaged die. We are excited to further collaborate strategically with customers and industry partners to optimize and drive high-volume adoption of new advanced packaging processes.”

Kulicke & Soffa is proud to welcome the Guest-of-Honor, Mayor John Jorritsma, City of Eindhoven, for the Opening Ceremony. “We are very pleased with the presence of K&S in Brainport Eindhoven. The company contributes a lot to our added value chain, by creating new knowledge and employment. The opening of the new process lab proves that K&S also believes in our economic strength, which is great”, said Mayor John Jorritsma, City of Eindhoven.

In addition to the K&S Netherlands facility, Kulicke & Soffa also operates application laboratories in Taiwan, Korea, China, Singapore and the US.

The SOI market is expected to be valued at USD 1,859.3 Million by 2022, growing at a CAGR of 29.1% between 2017 and 2022, according to a new market research report “Silicon on Insulator Market by Wafer Size (200mm, 300mm), Wafer Type (RFSOI, FDSOI), Technology (BESOI, ELTRAN, SoS, SiMOX, Smart Cut), Product, Application (Automotive, Computing & Mobile, Entertainment & Gaming, Photonics) – Global Forecast to 2022,” published by MarketsandMarkets,

The factors that are driving the growth of this market include the growth in the consumer electronics market, low wafer and gate cost, low operating voltage, and miniaturization of semiconductor devices.

“300mm SOI wafers expected to hold the largest size of the SOI market by 2022“

300mm SOI wafers are expected to lead the overall SOI market by 2022. 300mm wafers is the latest size category in the SOI market. FDSOI wafers-the latest addition to the SOI wafer type segments-are built on the 300mm wafers. Besides that, the production of 300mm RF chips has already been started, which will further boost the demand for 300mm wafers. Soitec, in partnership with its Chinese partner Simgui, is planning to roll out the production of 300 mm RFSOI wafers. Also, the leading chip manufacturers, including Broadcom (U.S.), Qorvo (U.S.), Qualcomm (U.S.), and Murata (Japan), are planning to start the production of 300mm wafers.

“SOI market for FDSOI wafers expected to grow at a high rate between 2017 and 2022“

The SOI market for FDSOI wafers is expected to grow at a significant rate between 2017 and 2022. FDSOI is the next version of PDSOI wafers. FDSOI wafers stand out from the conventional bulk CMOS wafers as they have two additional layers. FDSOI wafers are around 4-5 times costlier than the conventional bulk CMOS, but they provide enhanced performance of the chips produced, power efficiency, and reduction in the energy consumption. FDSOI wafers are produced over the 300 mm SOI wafers and are competing with the FinFET technology.

“APAC expected to lead the SOI market between 2017 and 2022“

APAC is one of the key growth regions for the SOI market. APAC has been the fastest in adopting SOI products compared with other regions. This early start has kick-started the market; thus, from the demand side, APAC is a major player. APAC is witnessing high applicability of SOI owing to the presence of a large number of consumer electronics companies, smartphone manufacturers, and advanced ICT technologies. The high demand for smartphones is one of the key factors contributing to the market growth, as 99% of the smartphones make use of SOI wafers.

The major players operating in the SOI market are Soitec (France), Shin-Etsu (Japan), GlobalWafers (Taiwan), GlobalFoundries (U.S.), STMicroelectronics (Switzerland), NXP Semiconductors (Netherlands), Murata Manufacturing (Japan), Sony Corporation (Japan), MagnaChip Semiconductor (South Korea), TSMC (Taiwan), and Qualcomm (U.S.).

MagnaChip Semiconductor Corporation (NYSE: MX), a Korea-based designer and manufacturer of analog and mixed-signal semiconductor products, announced today that it will host its Annual U.S. Foundry Technology Symposium at Hilton Santa Clara, California, on June 7th, 2017.

The primary purpose of the Foundry Technology Symposium is to showcase MagnaChip’s most up-to-date technology offerings and to provide an in-depth understanding of MagnaChip’s manufacturing capabilities, its specialty technology processes, target applications and end-markets. Furthermore, during the symposium, MagnaChip plans to discuss current and future semiconductor foundry business trends, and also cover presentations in key markets through guest speeches.

While providing an in-depth overview of its specialty processes, MagnaChip will also highlight its technology portfolio and its future roadmap, including technologies such as mixed-signal, which supports applications in the Internet of Things (IoT) and RF switch sector and Bipolar-CMOS-DMOS (BCD) for high-performance analog and power management applications. In addition, MagnaChip will also feature applications regarding Ultra-High Voltage (UHV), such as LED lighting and AC-DC chargers, and cover Non-Volatile Memory (NVM)-related technologies, such as Touch IC, Automotive MCUs and other customer specific applications. Furthermore, MagnaChip will present its technologies used in applications including smartphones, tablet PCs, automotive, industrial, LED lighting and the wearables segments. MagnaChip will also review its customer-friendly design environment and an on-line customer service tool known as “iFoundry.”

“We are very pleased to host MagnaChip’s Annual Foundry Technology Symposium in the US again this year,” said YJ Kim, Chief Executive Officer of MagnaChip. “We plan to offer participants an opportunity to better understand the foundry and the application market dynamics, and to provide insights into MagnaChip’s specialty process technologies.” MagnaChip has approximately 466 proprietary process flows it can utilize and offer to its foundry customers.

SEMI, the global industry association representing the electronics manufacturing supply chain, today announced that the worldwide semiconductor photomask market was $3.32 billion in 2016 and is forecasted to reach $3.57 billion in 2018. After increasing 1 percent in 2015, the photomask market increased 2 percent in 2016. The mask market is expected to grow 4 and 3 percent in 2017 and 2018, respectively, according to the SEMI report. Key drivers in this market continue to be advanced technology feature sizes (less than 45nm) and increased manufacturing in Asia-Pacific. Taiwan remains the largest photomask regional market for the sixth year in a row and is expected to be the largest market for the duration of the forecast.

Revenues of $3.32 billion place photomasks at 13 percent of the total wafer fabrication materials market, behind silicon and semiconductor gases. By comparison, SEMI reports that photomasks represented 18 percent of the total wafer fabrication materials market in 2003. Another trend highlighted in the report is the increasing importance of captive mask shops. Captive mask shops, aided by intense capital expenditures in 2011 and 2012 continue to gain market share at merchant suppliers’ expense. Captive mask suppliers accounted for 63 percent of the total photomask market last year, up from 56 percent in 2015. Captive mask shops represented 31 percent of the photomask market in 2003.

A recent published SEMI report, 2016 Photomask Characterization Summary, provides details on the 2016 Photomask Market for seven regions of world including North America, Japan, Europe, Taiwan, Korea, China, and Rest of World. The report also includes data for each of these regions from 2003 to 2018 and summarizes lithography developments over the past year.

Analogix Semiconductor, Inc. and Beijing Shanhai Capital Management Co, Ltd. (Shanhai Capital), today jointly announced the completion of the approximately $500 million acquisition of Analogix Semiconductor. China Integrated Circuit Industry Investment Fund Co., Ltd. (China IC Fund) joined Shanhai Capital’s fund as one of the limited partners.

“We are very pleased to have completed the transaction,” said Dr. Kewei Yang, Analogix Semiconductor’s chairman and CEO. “Enhanced by the strong financial support of our new investors, Analogix’s future is brighter than ever. We are excited to continue building and growing Analogix into a global leader in high-performance semiconductors.”

“As Analogix’s key financial partner and investor, we look forward to leveraging our resources to accelerate the company’s growth into new markets,” said Mr. Xianfeng Zhao, Chairman of Shanhai Capital. “We will build on the strength of the company’s core technology and customer relationships to create an exceptional semiconductor company that will be publicly listed in China.”

Sino-American International Investment Ltd, and Needham & Company, LLC served as financial advisors to Analogix Semiconductor. O’Melveny & Myers LLP served as legal counsel to Analogix Semiconductor.

Pillsbury Winthrop Shaw Pittman LLP and Jingtian & Gongcheng acted as legal counsel to Beijing Shanhai Capital Management Co.

Cadence Design Systems, Inc. (NASDAQ:  CDNS) today announced the release of the new Virtuoso Advanced-Node Platform supporting advanced 7nm designs. Through collaboration with early 7nm FinFET customers, Cadence has expanded the Virtuoso custom design platform with innovative new capabilities to manage design complexity and process effects introduced with this advanced-node process. The Virtuoso Advanced-Node Platform update supports all major advanced FinFET technologies with proven results, while improving designer productivity at 7nm.

To address the many technical challenges of 7nm design, the Virtuoso Advanced-Node Platform offers a variety of layout capabilities, including advanced editing with multi-pattern color awareness, FinFET grids, and module generator (ModGen) device arrays. Additionally, customers can take advantage of variation analysis in their circuit design flows utilizing Monte Carlo analysis across corners to address variability with the Spectre® Accelerated Parallel Simulator, the Virtuoso ADE Product Suite and the Virtuoso Schematic Editor.

“As a leader in mobile computing, we require the highest performance, lowest power and highest density possible to deliver innovative, advanced-node designs,” said Ching San Wu, general manager of Analog Design and Circuit Technology at MediaTek. “Through our strong collaboration and continued partnership with Cadence, we have been able to develop and deploy a custom design methodology based on the Virtuoso Advanced-Node Platform. With our recent successful tapeout, we took advantage of its many unique capabilities designed to manage the challenges presented at 7nm.”

Key features in the updated Virtuoso Advanded-Node Platform include:

  • Multi-patterning and color-aware layout: Provides essential new support of a variety of fully colored “multi-patterned” custom design flows, which are a baseline requirement for the 7nm process and enable users to be more productive in their designs.
  • ModGen device arrays: Offers designers a set of modules that have been co-developed in close collaboration with key partners to improve designer productivity and mitigate layout complexities at the 7nm process node.
  • Automated FinFET placement: Provides automatic FinFET grid placement that simplifies the overall FinFET-based coloring design methodologies needed at 7nm. By adhering to 7nm process constraints, the Virtuoso Advanced-Node Platform greatly simplifies layout creation and minimizes errors that can be pervasive when designing at 7nm, while decreasing layout design time by up to 50 percent on custom digital and analog blocks.
  • Variation analysis: Enables high-performance Monte Carlo analysis targeting FinFET technology and high-sigma analysis, which can reduce the overall time to run simulations by a factor of 10.

“Through constant innovation and strategic partnerships with industry leaders, Cadence has solidified its leading role in providing advanced-node custom design tools,” said Tom Beckley, senior vice president and general manager, Custom IC & PCB Group at Cadence. “Through our extensive work with customers such as MediaTek, we’ve been able to validate that our approaches greatly reduce the overhead inherent in designing at 7nm in order to help deliver the best possible silicon. We currently have many customers that have completed successful tapeouts and delivered production designs using the Virtuoso Advanced-Node Platform.”