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Solid State Technology is thrilled to announce that several key industry leaders have joined the Advisory Board for its annual conference and networking event, The ConFab. New members include: Robert Cappel, Senior Director Corporate Marketing, KLA-Tencor; William Chen, Fellow and Senior Technical Advisor, ASE; L.T. Guttadauro, Executive Director, Fab Owners Association; Li Li, Distinguished Engineer, Cisco Systems; Ariel Meyuhas, COO, The MAX Group; Gary Patton, CTO and Head of Worldwide R&D, GLOBALFOUNDRIES and Elton Peace, General Manager North America Regional Operations, Lam Research.

“We are delighted to welcome the new additions to our Advisory Board, each of whom have a unique and valuable insight into the what makes the semiconductor manufacturing industry successful,” said Pete Singer, Editor-in-Chief of Solid State Technology and conference chair for The ConFab. “These individuals will be instrumental is ensuring that The ConFab has an expanded role in the industry and is a “must attend” event for networking and discussing critical economic and manufacturing issues.”

The ConFab 2016 conference program will focus on “The Economics of Semiconductor Manufacturing and Design”. Topics will include:

  • How IoT is Driving the Semiconductor Industry
  • Filling the Fabs of the Future: A Guide to Hot New Applications
  • MEMS Sensor Fusion and More then Moore
  • The Limits of Scaling: Understanding the Challenges of sub-10nm Manufacturing
  • Fabless, Foundries and OSATs: Optimizing the Supply Chain
  • System Integration, Advanced Packaging + 3D Integration
  • China’s New Role in the Global Semiconductor Industry
  • Legacy Fabs and the Resurgence of 200mm
  • The Impact of Continued Consolidation Across the Supply Chain
  • Wearables and Bioelectronics: The Cusp of a Revolution?
  • Tackling Rising R&D Costs in the Semiconductor Industry

The new members will be joining the existing Advisory Board, comprised of David Bennett, VP Alliances, GLOBALFOUNDRIES; Janice M. Golda, Director, Lithography Capital Equipment Development, Intel Corporation; Devan Iyer,,Director Worldwide Semiconductor Packaging Operations, Texas Instruments; Lori Nye, COO/Executive Director Customer Operations, Brewer Science; Ken Rygler, President, Rygler Associates (founder of Toppan Photomasks); Sima Salamati, VP, Fab Operations, imec; Hans Stork, CTO, ON Semiconductor Corporation; Aubrey Tobey, President, ACT International; Geoffrey Yeap, VP of Technology, Qualcomm Inc.; and Abe Yee, Sr. Director, Advanced Technology and Package Development, NVIDIA Corporation.

 The ConFab (June 12-15, 2016) is an executive-level conference and networking event for business leaders from the semiconductor manufacturing and design industry. The event features a high-level conference program, networking events and business meetings with purchasing decision makers and influencers. More information on The ConFab may be found at www.theconfab.com.

GLOBALFOUNDRIES, a provider of advanced semiconductor manufacturing technology, today announced it has partnered with Catena, a developer of Radio Frequency (RF) Communication IPs for connectivity, to offer complete Wi-Fi and Bluetooth solutions for System-on-Chip (SoC) designers targeting mobile, Internet-of-Things (IoT), RF connectivity markets.

Today, designers need an optimized, highly integrated wireless connectivity solution to satisfy the ever-increasing low-power and cost requirements of mobile platforms, wearables and other IoT devices. GLOBALFOUNDRIES’ 28nm Super Low Power (SLP) technology with integrated RF, combined with Catena’s silicon-proven RF IPs offer a power-efficient solution that provides on-chip features that can be easily integrated into customer applications.

“We are delighted to partner with GLOBALFOUNDRIES for the development of Catena´s next generation connectivity solutions,” says Mats Carlsson, Director for Business Development at Catena. “This partnership gives Catena access to advanced technology nodes supporting our comprehensive technology roadmap for Wi-Fi and BT connectivity. A close cooperation with leading foundries such as GLOBALFOUNDRIES together with the latest innovations from Catena offers our customers new levels of product performance, reliability and scalability, and it enables us to push the envelope of integrated RF Front-End innovation. The validation results of Catena´s first 28nm-SLP silicon for RF applications correlate well with simulations.”

“Catena’s IP skills and competencies in wireless RF mixed signal technologies, coupled with GLOBALFOUNDRIES RF solution enables us to further strengthen our leadership in wireless connectivity and connected devices,” said Peter Rabbeni, director of RF product marketing and business development at GLOBALFOUNDRIES. “With customer silicon content increasing with each new generation of smartphone the demand for these chips is rapidly increasing. Partnering with Catena enables us to expand our expertise and capabilities and provide radio power solutions for highly integrated mobile applications.”

Based on GLOBALFOUNDRIES’ 28nm-SLP technology with HKMG, the process technology includes a comprehensive set of design capabilities enabling chip designers to integrate critical RF SoC functionality into their products. The technology is designed for the next generation of connected devices that require low standby power and long battery life integrated with RF/wireless functionality. The technology is enabled with key RF features, including core and I/O (1.5V/1.8V) transistor RF models along with 5V LDMOS devices, which simplifies RF SoC design.

Catena’s Connectivity RF IP portfolio includes optimized, very low power Bluetooth Smart radio, Bluetooth Smart Ready radio, Wi-Fi (802.11a/b/g/n/ac 1×1, 2×2 and 4×4 MIMO) radios and combo Bluetooth / Wi-Fi radio. The radio IPs are available/under development at GLOBALFOUNDRIES 28nm-SLP technology, and may be ported to alternatives based on customer requirements. Solutions for GNSS/FM broadcast systems are also found in the offerings of Catena.

GLOBALFOUNDRIES’ 28nm-SLP technology is the first in the industry to provide design enablement support optimized to meet low power and cost requirements of integrated RF SoCs. The technology utilizes the companies’ production-proven, 28nm-SLP silicon-validated design flows, which include a complete set of libraries, compilers, and complex IP.

In 2014, the automotive sector significantly outperformed the overall market average for semiconductors. In fact, the automotive market overtook data processing to become the third largest end market for power semiconductor applications, according to IHS Inc., a global source of critical information and insight.

Based on information from the IHS Power Management Market Share and Supplier Analysis report, demand for semiconductors by the automotive industry was particularly strong in advanced driver assistance systems (ADAS) and infotainment systems. In the power management semiconductor market, power integrated circuits (ICs) grew much faster than traditional power discrete solutions. The automotive power IC category in 2015 is forecast to grow 8 percent, year over year, while discrete revenue is projected to remain flat during the same time period.

Fig 1

Fig 1

“One strategy that automakers are undertaking to control research and development costs is to develop shared designs, components, engineering, and production platforms, and using the same electronic control units (ECUs)  for many different platforms with the same features,” said Jonathan Liao, senior analyst of power semiconductors for IHS. “While over time modern cars have increased in size, suppliers prefer small and interchangeable electronic control units that can fit on various platforms, which help lower overall development costs, and expand the universe of target customers, for an improved return on investment.”

As a result of this approach, automotive power ICs are growing faster than discrete solutions. For example, Texas Instruments – the market leader in voltage regulators — controlled 8 percent of voltage regulators used by the automotive industry in 2011 and increased its voltage regulator revenues by 150 percent by the end of 2014. By comparison, Infineon — the leading automotive-market supplier of discrete power solutions — increased their power management revenues, at roughly half of Texas Instruments’ growth rate, during the same time period.

Growing demand for luxury features in non-luxury vehicles

Increased consumer demand has caused many luxury car features to find their way into the non-luxury car market, which is causing an increase in overall demand for power ICs. Adaptive cruise control, blind-spot monitoring, connected traffic updates, sophisticated infotainment systems with voice command and other advanced features are being integrated, as both options and upgrades, into mass-produced mid-range vehicles, like the Ford Fusion, which has a suggested price of $22,000. “Features that were originally designed for Mercedes-Benz, BMW, Lexus and other luxury cars have very quickly found their way into the non-luxury market,” Liao said

There are several key features that will encourage further power IC adoption, including Internet-connected cars, vehicle-to-vehicle (V2V) communications, autonomous cars, Apple’s CarPlay and Android Auto. For all of these features, application processing speed and software are critical components.

“It is crucial for the ECUs to gather, process and respond to information in real time, for the safety and convenience of the driver,” Liao said. “Sophisticated power management solutions for power-intensive multi-core processors, baseband chipsets and sensor arrays can be implemented much more easily with power ICs.”

All of these advanced features are expected help power ICs to grow faster than discrete solutions.

The overall trend of power ICs outperforming power discrete solutions in the automotive semiconductor sector is expected to continue. Switch regulators, low-dropout (LDO) regulators and power management integrated circuits (PMICs) are examples of fast-growing power IC components with better integration, efficiency and smaller footprints –especially for low voltage applications in automotive electronics.

SEMICON Taiwan 2015 opened today starting a three-day event drawing over 43,000 attendees from electronics manufacturing. Held 2-4 September, SEMICON Taiwan represents the huge Taiwan business potential with Taiwanese chipmakers and Outsourced Semiconductor Assembly and Test (OSAT) firms spending over $20 billion in the next two years on equipment and materials.

2015 is the 20th anniversary of SEMICON Taiwan and now draws more than 700 exhibitors and more than 43,000 attendees.  Over 500 will attend the SEMICON Taiwan Leadership Gala Dinner, one of the most important executive events for the high-tech industry in Taiwan.

SEMICON Taiwan features co-located events and technology theme pavilions focusing on IC design, MEMS, 3D-ICs, advanced packaging/testing, sustainable manufacturing, and secondary equipment.

Highlights of this year’s show include:

  • Executive Summit: With the theme “Conversation between Nobel Prize Laureate and Distinguished Leaders in Taiwan,” executives from Executive Yuan, Etron Technology, ASE Group, and NCTU will share their unique perspectives with Prof. Shuji Nakamura, 2014 Nobel Prize winner.
  • Market Trends Forum: Forum features speakers from Beijing Gaohua Securities, IDC Asia/Pacific, UBS Investment Bank, Sanford C. Bernstein, TechSearch, and SEMI, with moderation by TSMC.
  • CFO and Investor Summit: With the theme, “An Exciting Period of Growth and Mergers in the Semiconductor Industry,” the event features speakers from TSMC, DBS, National Tsing Hua University, imec, and Taiwan M&A and Private Equity Council, with moderation by EQUVO.
  • Memory Executive Summit: The Summit includes presenters from Everspin, imec, Inotera Memories, and ITRI.
  • SiP Global Summit 2015: With a strong focus on heterogeneous integration through System-in-a-Package (SiP) technology, the event features more than 20 industry leaders who will share their insights and solutions on 3D-IC, Through Silicon Via (TSV), 2.5D-IC with silicon interposer, and embedded substrate technologies. More than 500 industry professionals from around the world are expected to attend.
  • Advanced Packaging Technology Symposium: Presenters will cover market trends, product applications, and packaging/assembly solutions to advanced equipment and material development, and testing and reliability – covering the most advanced technology development directions for 3D-IC.
  • Sustainable Manufacturing Forum: Experts will address a wide variety of environment, health, safety (EHS) and sustainability topics that affect high-tech manufacturing.
  • Semiconductor Materials Forum: This is the newest forum — features topics including front-end materials for advanced semiconductor devises, advanced materials solutions for 10nm and beyond, challenges for local material manufacturers, and novel materials, and activities for advanced packaging.

For more information and online registration, visit the SEMICON Taiwan website: www.semicontaiwan.org

SEMI, the global association serving the electronics supply chain, today announced the appointment of Laith Altimime as president of SEMI Europe, effective October 1, 2015. Altimime will report directly to SEMI’s CEO, Denny McGuirk, and will lead SEMI’s activities in Europe and Middle East and North Africa (MENA).

Altimime has more than 25 years of experience in the semiconductor industry with the majority spent in Europe.  Most recently, he was senior director of business development at imec. Prior to this, Altimime held leadership positions at Altis/Infineon/Qimonda, KLA-Tencor, Communicant Semiconductor AG, and NEC Semiconductors.  He has deep experience driving multi-cultural globally dispersed teams to achieve ambitious goals in competitive and technically demanding markets.  Altimime holds a Bachelor’s of Science (Honors) degree in applied physics and semiconductors electronics from Heriot-Watt University in Scotland.

Altimime will have overall responsibility for SEMI Europe’s events, programs, membership, advocacy, and collaborative forums.  He will also be responsible for strategic development and world-class service of relationships with SEMI members as well as industry, government, academia and other local associations and constituents in Europe.  As SEMI is a global association, Altimime will provide navigation, support, and services to SEMI’s members from all regions that have electronics supply chain interest in Europe.

“Laith’s deep technical and leadership experience in semiconductor manufacturing and semiconductor equipment companies, as well as his experience at imec, make him an exceptional fit for leading SEMI Europe. Not only is imec a world-leading research center in nanoelectronics with global industrial partnerships, but it an important partner of SEMI,” said Denny McGuirk, president and CEO of SEMI.  “Laith is well positioned to lead SEMI Europe in the vibrant and rapidly evolving technology development and manufacturing ecosystem.”

“I wish Laith lots of success in his new role as president of SEMI Europe. Laith’s deep knowledge of semiconductors ─ the industry, the eco system, technology, roadmaps and strategies ─ make him extremely suited to advance the European semiconductor industry in these challenging times. I would like to thank Laith for his valuable contributions at imec and I’m looking forward to collaborate with him in strengthening Europe’s semiconductor ecosystem as President of SEMI Europe” said Luc Van den hove, President and CEO, imec.

EV Group (EVG), a supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced that the company is experiencing strong demand for its automated 300mm polymer adhesive wafer bonding systems. Over the past 12 months, the company’s order intake has doubled for these systems, including the EVG 560, GEMINI and EVG 850 TB/DB series of wafer bonders. This includes multiple system orders from leading foundries and outsourced semiconductor assembly and test (OSAT) providers headquartered in Asia. Much of the increase in demand is being fueled by advanced packaging applications, where manufacturers are ramping up production of CMOS image sensors as well as vertically stacked semiconductors incorporating 2.5D and 3D-IC through silicon via (TSV) interconnect technology.

According to market research and strategy consulting firm Yole Developpement, the equipment market for 3D-IC and wafer-level packaging (WLP) applications is expected to grow significantly, from $933 million in 2014 to $2.6 billion in 2019 (total revenue), at a compound annual growth rate of 19 percent over the next five years*. Adhesive wafer bonding plays a critical role in supporting these applications.

Automated adhesive wafer bonding enables high yields on stacked devices
Adhesive wafer bonding is a technique that uses an intermediate layer (typically a polymer) for bonding two substrates, which is an important process technology for advanced packaging applications. The main advantages of using this approach are low temperature processing, surface planarization and tolerance to wafer topography. For CMOS image sensors, polymer adhesive bonding provides a protective barrier between the surface of the image sensor and the glass cover wafer. For 3D-IC TSV applications, polymer adhesive bonding plays an important role in temporary bonding and debonding applications, where product wafers are temporarily mounted on carriers with the aid of organic adhesives to enable reliable thinning and backside processing.

For both CMOS image sensor and stacked memory/logic applications, fully automated wafer bonding solutions are essential to support manufacturers’ migration to larger (300mm) wafer substrates to lower their overall cost of production. For example, minimizing total thickness variation (TTV) of the adhesive layer after bonding is crucial in defining the final product thickness tolerance. This ultimately has an impact on enabling thinner wafers and devices, which in turn enableshigher interconnect densities and lower TSV integration costs. EVG’s automated wafer bonding systems provide superior control of TTV and other parameters through repeatable wafer-to-wafer processing and integrated inline metrology to monitor TTV throughout the bonding process. As a result, manufacturers are increasingly turning to EVG to support their automated wafer bonding needs.

“We’ve truly entered the era of 3D-ICs, with demand for TSV wafers rising on a number of fronts—from CMOS image sensors for smart phone cameras and automotive surround view imaging, to 3D stacked memory and memory-on-logic to support high-performance, high-bandwidth applications such as networking, gaming, data centers and mobile computing,” stated Hermann Waltl, executive sales and customer support director at EV Group. “Automated wafer bonding is a critical process for supporting the volume manufacturing needs of CMOS image sensor and semiconductor device makers addressing these applications. EVG has invested years in the development of wafer bonding technology to make it a critical value-add solution for the advanced packaging market. Our breadth of knowledge in wafer bonding equipment and processes—along with our strong network of supply chain partners—has positioned us well to anticipate future industry trends and develop new solutions that meet our customers’ emerging production requirements.”

The digital world once existed largely in non-material form. But with the rise of connected homes, smart grids and autonomous vehicles, the cyber and the physical are merging in new and exciting ways. These hybrid forms are often called cyber-physical systems (CPS), and are giving rise to a new Internet of Things.

Such systems have unique characteristics and vulnerabilities that must be studied and addressed to make sure they are reliable and secure, and that they maintain individuals’ privacy.

The National Science Foundation (NSF), in partnership with Intel Corporation, one of the world’s leading technology companies, today announced two new grants totaling $6 million to research teams that will study solutions to address the security and privacy of cyber-physical systems. A key emphasis of these grants is to refine an understanding of the broader socioeconomic factors that influence CPS security and privacy.

“Advances in the integration of information and communications technologies are transforming the way people interact with engineered systems,” said Jim Kurose, head of Computer and Information Science and Engineering at NSF. “Rigorous interdisciplinary research, such as the projects announced today in partnership with Intel, can help to better understand and mitigate threats to our critical cyber-physical systems and secure the nation’s economy, public safety, and overall well-being.”

The partnership between NSF and Intel establishes a new model of cooperation between government, industry and academia to increase the relevance and impact of long-range research. Key features of this model for projects funded by NSF and Intel include joint design of a solicitation, joint selection of projects, an open collaborative intellectual property agreement, and a management plan to facilitate effective information exchange between faculty, students and industrial researchers.

This model will help top researchers in the nation’s academic and industrial laboratories transition important discoveries into innovative products and services more easily.

“The new CPS projects, announced today, enable researchers to collaborate actively with Intel, resulting in strong partnerships for implementing and adopting technology solutions to ensure the security and privacy of cyber-physical systems,” said J. Christopher Ramming, director of the Intel Labs University Collaborations Office. “We are enthusiastic about this new model of partnership.”

The NSF-Intel partnership further combines NSF’s experience in developing and managing successful large, diverse research portfolios with Intel’s long history of building research communities in emerging technology areas through programs such as its Science and Technology Centers Program.

The projects announced today as part of the NSF/Intel Partnership on Cyber-Physical Systems Security and Privacy are:

Rapidly increasing incorporation of networked computation into everything from our homes to hospitals to transportation systems can dramatically increase the adverse consequences of poor cybersecurity, according to Philip Levis, who leads a team at Stanford University that received one of the new awards. Levis’ team investigates encryption frameworks for testing and protecting networked infrastructure.

“Our research aims to lay the groundwork and basic principles to secure computing applications that interact with the physical world as they are being built and before they are used,” Levis said. “The Internet of Things is still very new. By researching these principles now, we hope to help avoid many security disasters in the future.”

The team, consisting of researchers from Stanford University, the University of California, Berkeley, and the University of Michigan, considers how new communication architectures and programming frameworks can help developers avoid decisions that lead to vulnerabilities.

Another project explores the unique characteristics of cyber-physical systems, such as the physical dynamics, to provide approaches that mix prevention, detection and recovery, while assuring certain levels of guarantees for safety-critical automotive and medical systems.

“With this award, we will develop robust, new technologies and approaches that work together to lead to safer, more secure and privacy-preserving cyber-physical systems by developing methods to tolerate attacks on physical environment and cyberspace in addition to preventing them,” said Insup Lee, who leads a team at the University of Pennsylvania, along with colleagues at Duke University and the University of Michigan.

“New smart cyber-physical systems technologies are driving innovation in sectors such as food and agriculture, energy, transportation, building design and automation, healthcare, and advanced manufacturing,” Kurose said. “With proper protections in place, CPS can bring tremendous benefits to our society.”

The new program extends NSF’s investments in fundamental research on cyber-physical systems, which has totaled more than $200 million in the past five years.

NSF is also separately investing in three additional CPS security and privacy projects that address the safety of autonomous vehicles, the privacy of data delivered by home sensors and the trustworthiness of smart systems:

Lasertec Corporation announced today that ROHM Co., Ltd. (“ROHM”), a company in power semiconductor device manufacturing, selected the latest model of Lasertec’s SICA, SiC wafer inspection and review system.

ROHM provides various high-quality high-performance semiconductor devices that feature the state-of-the art process and design technologies for worldwide customers. Their corporate mission is “Quality is our top priority.” ROHM is a global leader in the manufacture of power devices, especially of silicon carbide or SiC devices. ROHM has decided to introduce the latest model of SICA as part of its efforts to further enhance SiC device quality and production infrastructure.

Silicon carbide is a new material with properties suitable for power semiconductors and is viewed as a vitally important option for power device manufacturing. For mass production of SiC wafers and devices, further quality enhancement is expected. Amid various challenges, one of the critical factors in the mass production of high quality devices is to reduce defects that are commonly generated during grind and epitaxial processes. In this respect, it is extremely important to have a capability to accurately and quickly detect and categorize defects that affect device performance. Defects of interest (DOI) include not only scratches and epi-defects on wafer surface but also crystal-related defects such as basal plane dislocations (BPD) and stacking faults (SF) inside epi-layers. Eliminating these killer defects early in the process ensures high device yield in mass production.

The latest model of SICA incorporates a photoluminescence-based technology that enables the simultaneous detection of both surface defects and crystal defects at a significantly higher throughput. Lasertec will continue to pursue the development and advancement of defect inspection technologies in order to facilitate the further enhancement of power device quality and productivity.

SEMI today announced the second annual SEMI South America Semiconductor Strategy Summit (SA SSS) at the Sheraton Rio on November 10-12 in Rio De Janeiro, Brazil.   Unitec Semiconductor, ABI SEMI, and the Brazil Development Bank BNDES are making the event possible.  With the continued globalization of the microelectronics industry, and localization of manufacturing capabilities within growing electronic markets, the South American market presents new opportunities for both electronics manufacturing and supply chain companies.  Investors and analysts, equipment and materials suppliers, researchers, IC developers, and others ready to explore emerging opportunities in South America should attend. The unique delegation-style summit will provide an exceptional opportunity to meet face-to-face with representatives and executives from local companies, government officials, industry experts, economic development specialists, and analysts.

Device manufacturers, including Unitec Blue in Argentina, and Unitec Semiconductor and CEITEC in Brazil, are making new investments in front- and back-end manufacturing.  In 2012, Unitec Semiconductor S.A. announced an investment of US$400 million to build the most modern semiconductor factory in the Southern Hemisphere.  Located in Ribeirao Neves, the facility produces customized chips used in industrial and medical applications. Other leaders in the Latin American semiconductor industry include CEITEC S.A., which has operated a design center and a foundry since 2012, and HT Micron, a joint-venture between South Korean Hana Micron and Brazilian Parit Participações.  In addition, the Brazilian Government recently created a tax incentive program, called PADIS, to provide fiscal incentives for companies that pledge to invest in R&D and in the national development of the sector in the country.

“SEMI is pleased to organize this pioneering event to help build the successful growth of the South America semiconductor industry,” said Karen Savala, president of SEMI Americas. “SEMI is helping our members explore new opportunities with the latest information from corporate stakeholders and government officials. This event brings together global and regional industry leaders ─ fostering the connections and relationships that lead to business and market growth.”

The conference will provide overviews of the current industry environment in South America, address the challenges and opportunities for supply chain companies in the region, and explore the next steps in building the region’s microelectronics industry infrastructure. Panel discussions include: Smart Cards and Banking Technologies, Life Science Technologies, Smart Cities, and Challenges and Next Steps.

Registration, agenda, and sponsorship information is available online at www.semi.org/southamerica.

North America-based manufacturers of semiconductor equipment posted $1.59 billion in orders worldwide in July 2015 (three-month average basis) and a book-to-bill ratio of 1.02, according to the July EMDS Book-to-Bill Report published today by SEMI.  A book-to-bill of 1.02 means that $102 worth of orders were received for every $100 of product billed for the month.

SEMI reports that the three-month average of worldwide bookings in July 2015 was $1.59 billion. The bookings figure is 5.1 percent higher than the final June 2015 level of $1.52 billion, and is 12.5 percent higher than the July 2014 order level of $1.42 billion.

The three-month average of worldwide billings in July 2015 was $1.56 billion. The billings figure is 0.3 percent higher than the final June 2015 level of $1.55 billion, and is 18.2 percent higher than the July 2014 billings level of $1.32 billion.

“Year-to-date, the bookings and billings reported in the SEMI North American equipment book-to-bill report indicate a solid year for the industry,” said SEMI president and CEO Denny McGuirk. “The outlook for the remainder of the year is somewhat clouded, but we see investments in 3D NAND and advanced packaging as drivers.”

The SEMI book-to-bill is a ratio of three-month moving averages of worldwide bookings and billings for North American-based semiconductor equipment manufacturers. Billings and bookings figures are in millions of U.S. dollars.

Billings
(3-mo. avg)

Bookings
(3-mo. avg)

Book-to-Bill
February 2015 

$1,280.1

$1,313.7

1.03
March 2015 

$1,265.6

$1,392.7

1.10
April 2015 

$1,515.3

$1,573.7

1.04
May 2015 

$1,557.3

$1,546.2

0.99
June 2015 (final)

$1,554.9

$1,517.4

0.98
July 2015 (prelim)

$1,559.3

$1,594.3

1.02

Source: SEMI (www.semi.org), August 2015