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“2017 was an excellent year for CIS , with growth observed in all segments except computing,” commented Pierre Cambou, Principal Analyst, Technology & Market, Imaging at Yole Développement (Yole). Driven by new applications, the industry’s future remains on strong footing.

Yole announces its annual technology & market analysis focused on the CIS industry, from 2017 to 2023, titled: Status of the CMOS Image Sensor Industry. In 2017 the CIS market reached US$13.9 billion. The market research & strategy consulting company forecasts a 9.4% CAGR between 2017 and 2023, driven mainly by smartphones integrating additional cameras to support functionalities like optical zoom, biometry, and 3D interactions.

Yole proposes this year again a comprehensive technology & market analysis of the CMOS Image Industry. In addition to a clear understanding of the CIS ecosystem, analysts detail in this new edition, 2017-2023 forecasts, a relevant description of the M&A activities, an impressive overview of the dual and 3D camera trends for mobile. Mobile and consumer applications are also well detailed in this 2018 edition, with a deep added-value section focused on technology evolution.
In collaboration with Jean-Luc Jaffard, formerly at STMicroelectronics and part of Red Belt Conseil, Pierre Cambou pursued his investigation all year long and reveals today the status of the CIS industry.

2017 saw aggregated CIS industry revenue of US$13.9 billion. And 5 years later, the consulting company Yole announces more than US$ 23 billion. The YoY growth hit a peak at 20% due to the exceptional increase in image sensor value, across almost all markets, but primarily in the mobile sector. “CIS keeps its momentum”,confirms Pierre Cambou from Yole.

Revenue is dominated by mobile, consumer, and computing, which represent 85% of total 2017 CIS revenue. Mobile alone represents 69%. Security is the second-largest segment, behind automotive.

The CIS ecosystem is currently dominated by the three Asian heavyweights: Sony, Samsung, and Omnivision. Europe made a noticeable comeback. Meanwhile, the US maintains a presence in the high-end sector.

The market has benefited from the operational recovery of leading CIS player Sony, which captured 42% market share. “…Apple iPhone has had a tremendous effect on the semiconductor industry, and on imaging in particular. It offered an opportunity for its main supplier, Sony, to reach new highs in the CIS process, building on its early advances in high-end digital photography…”, explains Pierre Cambou in its article: Image sensors have hugely benefited from Apple’s avant-garde strategy posted on i-micronews.com.

The CIS industry is able to grow at the speed of the global semiconductor industry, which also had a record year, mainly due to DRAM revenue growth. CIS have become a key segment of the broader semiconductor industry, featuring in the strategy of most key players, and particularly the newly-crowned industry leader Samsung. Mobile, security and automotive markets are all in the middle of booming expansion, mostly benefiting ON Semiconductor and Omnivision.

These markets are boosting most players that are able to keep up with technology and capacity development through capital expenditure. The opportunities are all across the board, with new players able to climb the rankings, such as STMicroelectronics and Smartsense. Technology advancement and the switch from imaging to sensing is fostering innovation at multiple levels: pixel, chip, wafer, all the way to the system.

CIS sensors are also at the forefront of 3D semiconductor approaches. They are a main driver in the development of artificial intelligence. Yole’s analysts foresee new techniques and new applications all ready to keep up the market growth momentum… A detailed description of this report is available on i-micronews.com, imaging reports section.

According to data compiled by Inkwood Research, the global semiconductor market is projected to grow at a CAGR of 7.67% during the forecast period from 2017 to 2024. Data reflects that the market is driven by rising demand for consumer electronics, the growing automotive semiconductor market, the emerging internet of things (IoT) market and investments into New Product Development and R&D. Consumer electronics are primarily fueling the market due to demand for products such as tablets, smartphones, laptops and wearable devices. As semiconductor technology begins to advance, new segments are swiftly being integrated into the market, such as Machine Learning. Squire Mining Ltd. (OTC: SQRMF), Intel Corporation (NASDAQ: INTC), Texas Instruments Incorporated (NASDAQ: TXN), NXP Semiconductors N.V. (NASDAQ: NXPI), Skyworks Solutions, Inc. (NASDAQ: SWKS)

According to data by MarketsandMarkets, the global machine learning sector is expected to grow from USD 1.41 Billion in 2017 to USD 8.81 Billion in 2022 while registering a CAGR of 44.1% during the forecast period. The segment is rapidly growing due to many businesses adopting machine learning to gather intelligence for security and consumer interaction benefits, which can help eliminate human errors. However, machine learning is also being integrated into modern day technology, such as the automotive industry, to build autonomous vehicles. In a report by Forbes, Daniel Newman Principal Analyst and Founding Partner of Futurum Research, explained, “When dealing with a technology as advanced as machine learning, there simply isn’t an industry that would not benefit. I mean how could a business not take advantage of a technology that would make them more successful? In the next year, there will be multiple new uses for machine learning in all of these industries available for the taking and I’m not just talking about in marketing and sales.”

Squire Mining Ltd. (OTCQB: SQRMF) is also listed on the Canadian Securities Exchange under the ticker (CSE: SQR). Yesterday, the Company announced breaking news that, “to report on its prototype ASIC chip testing event held in Seoul, South Korea. With executives and board members from Squire, Future Farm, CoinGeek, Gaonchips and Samsung Electronics in attendance, Peter Kim, President of Squire’s subsidiary AraCore Technology Corp. (“Aracore”), and his team of front-end microchip engineers and programmers, unveiled and tested a working prototype mining system comprised of a newly engineered FPGA (field programmable gate array) ASIC microchip that will be converted into AraCore’s first ASIC chip utilizing 10 nanometer technology for mining Bitcoin Cash, Bitcoin and other associated cryptocurrencies. The test results confirm Aracore’s original design specifications indicating that the ASIC chip, once mass manufactured by Samsung Electronics, will be capable of delivering a projected hash rate of 18 to 22 terahash per second (TH/s) with an energy consumption of between 700 and 800 watts.

Taras Kulyk, Chief Executive Officer of CoinGeek Mining and Hardware, said ‘The CoinGeek team is very pleased with the progress of our strategic partners; Squire Mining and Aracore. With this next generation technology, CoinGeek will continue to pull the blockchain industry out of the proverbial basement and into the boardroom.’

Stefan Matthews, Chairman of nChain, one of the industry leaders in blockchain research and development, and a director of Squire Mining added, ‘The early results indicate that this ASIC microchip has the potential to be the next generation leader in providing hash power for enterprise mining of Bitcoin Cash and other associated crypto currencies. It has also demonstrated the potential to rapidly process consensus protocols across the blockchain faster whilst utilizing less energy than anything currently in this sector.’

Hash rate speed and microchip efficiency are the two most important measuring criteria in the crypto-mining industry to enable end-users to maximize profitability and ROI in their day to day mining operations.

Simon Moore, Executive Chairman and CEO of Squire Mining, stated, ‘Aracore’s time and investment to date have been validated by the impressive results of this new microchip. Once completed, we believe the speed and efficiency of our ASIC microchip combined with our respective mining systems powered by this Samsung manufactured microchip together have the potential to substantially increase the profitability of enterprise mining facilities around the globe. We look forward to releasing our mining system to the market in the first half of next year through our exclusive distribution partners CoinGeek, and competing for a significant piece of this multi-billion-dollar enterprise mining market.’

By Julian West

Process power and reactive gas subsystems for semiconductor manufacturing equipment have grown at a CAGR of 21% since 2013. The segment growth is considerably above the critical subsystems industry average of 9.5% and is attributable to higher demand for vacuum processing equipment over the period.

Process power and reactive gas subsystems now account for approximately 12% of all expenditures on critical subsystems used on semiconductor manufacturing equipment, up from 7% in 2013. The main driver of this exceptional growth has been the rise in vacuum processing steps (deposition and etch) during the manufacturing processes of both logic and memory devices. Most deposition and etch processes require an RF generator to provide a plasma energy source in the chamber, increasing demand for tools with power subsystems such as RF power supplies and matching networks.

Multiple patterning and the advent of 3D NAND in high-volume manufacturing have significantly increased the number of deposition and etch processing steps and, in the case of 3D NAND, longer and more difficult etch processes are requiring a wider range of power solutions. Further analysis shows that 3D NAND has been the principle growth catalyst, with the total share of power subsystems going to memory applications increasing 8 percentage points since 2013. Memory applications now account for almost half of all power subsystems demand in 2018.

Interestingly, investigation of power subsystems by tool type reveals that a clear majority of power subsystems (60%) find their way on to etch tools with only 40% on deposition tools. This can be explained by the fact that more delicate etch processes can require multiple RF power solutions per tool, whereas deposition does always use plasma energy sources, for example in thermal deposition processes.

Despite the staggering growth performance of the power subsystems segment over the past five years, we expect the growth rate to moderate significantly in the run-up to 2023. Now that 3D NAND has been adopted in high-volume manufacturing, we expect the rate of increase in vacuum/plasma processing steps to slow down. The introduction of EUV also has the potential to taper demand for vacuum processing equipment. However, it is not expected the reverse the trend as multiple patterning techniques will still be needed in conjunction with EUV to achieve the desired improvements in device density and performance. The future growth trend for power and reactive gas subsystems is forecast to be in line with the critical subsystems industry average at approximately 2.0% CAGR until 2023.

Originally published on the SEMI blog.

STATS ChipPAC Pte. Ltd. (“STATS ChipPAC” or the “Company”), a provider of advanced semiconductor packaging and test services, announced Friday that the Board of Directors of its holding company, Jiangsu Changjiang Electronics Technology Co., Ltd (‘JCET’) has appointed Dr. Lee Choon Heung as Chief Executive Officer (‘CEO’) for JCET Group, as well as Chief Executive Officer and Chairman for STATS ChipPAC.

Dr. Lee brings to JCET a wealth of expertise and veteran leadership with 20 years of extensive semiconductor packaging and test experience. Dr. Lee served in several senior management positions at Amkor Technology Inc. including head of their R&D centre, head of global procurement, group vice president, senior vice president and Chief Technology Officer. Dr. Lee, holds a Ph.D. in Theoretical Solid State Physics from Case Western Reserve University, currently holds 59 industry patents, and has published 19 academic papers around the world.

“We are excited about the opportunity to bring on board an industry leader of the calibre of Dr. Lee Choon Heung as our new JCET Group CEO,” stated JCET Chairman, Mr. Wang Xinchao. “We are confident in his ability to lead JCET as we continue our growth in both technology and scale moving forward,” continued Mr. Wang. Mr. Wang will continue in his role as Chairman of JCET Group.

The JCET Board of Directors and the management team also expressed their utmost gratitude and appreciation to Dr. Han Byung Joon and Mr. Lai Chih-Ming for their outstanding leadership and valuable contributions during their tenure at STATS ChipPAC. Dr. Han is resigning as chairman of the board of STATS ChipPAC. Mr. Lai will now serve in a new role as executive vice president of JCET Group.

Canon Marketing Japan Inc. (CEO: Masahiro Sakata) has signed an exclusive distribution agreement in Japan with ClassOne Technology Inc. (CEO: Byron Exarcos) and it will start receiving orders for ECD tool Solstice® in 2018.

ClassOne Technology Inc. is a supplier of wet process equipment for the 200mm and smaller semiconductor industry. The Solstice® platform delivers the highest quality plating of Au, Ni, and Cu at low cost, as well as variety of wet process functionality, such as metal lift off, resist strip, Au de-plating, UBM etch, and anodization.

Solstice® is available in 2-, 4-, and 8-chamber variants, and provides industry-leading uniformity and throughput with the smallest footprint, automation capability, controllability, and lowest cost of ownership. Solstice® is ideally suited to growing customers who need to move from ≤200mm wet bench processing to high-volume automated single-wafer production.

The agreement with ClassOne Technology will assist CMJ in expanding its business in the high-growth segment of high speed optical communication, 3D sensing including ToF, high frequency power devices, and related device markets. CMJ offers extensive experience in introducing the highest quality equipment from around the world and will provide world-class technical and field support for ClassOne products after system delivery.

Picosun Group, a global provider of ALD (Atomic Layer Deposition) thin film coating solutions, and Suzhou Institute of Nano-Tech and Nano-Bionics (SINANO) report excellent quality titanium nitride (TiN) deposited with Picosun’s plasma-ALD technology.

In microelectronic component manufacturing, the ohmic contact between metallic and semiconducting material layers is critical regarding the component functionality and lifetime. Typically, pure metals such as titanium have been employed as the metallic material, but they have certain drawbacks which is why titanium nitride has been proposed as the substitute. TiN is metallic as well, and its conductivity and thermal stability are better than those of pure titanium metal, but to obtain high quality TiN films, the manufacturing method and conditions are critical.

This is where Picosun’s remote plasma ALD (RPEALD) technology shows its strength. In Picosun’s approach, the plasma source is located on a high enough distance from the substrate, so that instead of aggressive ion bombardment, highly reactive radicals react at the substrate surface. This allows low process temperatures without thermal stress or physical ion damage to the substrate and enables deposition of also conductive materials without the risk of short-circuiting, or gas back-diffusion into the plasma source. The right selection of precursor chemicals and plasma gases guarantees high purity TiN films with very low oxygen content and work function, low sheet resistivity, exact stoichiometry, and high uniformity (*). Furthermore, the process window is wide regarding the process parameters and temperature, enabling the process to be introduced on a large variety of substrate materials.

“We are happy to report these excellent TiN results to our customers in micro- and optoelectronic industries. TiN is a central material in their applications, especially in components manufactured on GaN and on small, up to 200 mm diameter Si wafers. Picosun is specially dedicated to providing cost-efficient, turn-key production solutions for up to 200 mm wafer markets. We would like to welcome you all to meet us at the 4th China ALD conference which takes place 14-17 October 2018 in the city of Shenzhen, and where we are again the platinum sponsors, to discuss further how our ALD technology could improve your products and enable new breakthroughs in your industry,” say Mr. Edwin Wu, CEO of Picosun Asia Pte. Ltd. and Mr. Jurgen Yeh, CTO of Picosun China Co. Ltd.

“It is always a pleasure to work with Picosun. The quality of their ALD equipment is outstanding and enables us to develop cutting-edge ALD processes to be introduced to our other collaboration partners in the industries. An immensely important benefit in using PICOSUN™ ALD tools is also the smooth scalability of the processes to production scale, as all PICOSUN™ ALD systems, from R&D units to full-scale industrial production platforms share the same core design and operating principles,” continues Prof. Sunan Ding from the Nano-X lab of SINANO.

SINANO and Picosun have been collaborating since the beginning of 2017. The goal of the collaboration is to develop advanced micro- and optoelectronic components such as HEMTs (high-electron mobility transistors) and laser diodes, and lithium ion batteries utilizing ALD in their joint lab in Suzhou, one of China’s most prominent hubs for electronics and other high-tech products manufacturing. The lab is equipped with several state-of-the-art PICOSUN™ ALD systems. The collaboration is further supported by Picosun’s local subsidiary, Picosun China Co. Ltd. also located in Suzhou.

By Jay Chittooran

Last week, more than a dozen senior semiconductor executives traveled to Washington, DC for the first-ever Fall Washington Forum. The SEMI Washington Forum, a venue for SEMI members to educate lawmakers about the industry, focused on action against China, both in the form of tariffs and export controls.

Our industry is global, and companies rely heavily on trade. In 2017, more than 90 percent of equipment made in the United States was exported. Because of this dynamic, the United States holds a nearly $9 billion trade surplus in this industry. SEMI is supportive of trade policies that open foreign markets.

In the meetings, the executives expressed deep concern that the tariffs would inflict deep damage to the U.S. economy, including to SEMI members. Estimates suggest that the Sec. 301 tariffs (and the Chinese retaliatory tariffs) will cost semiconductor companies more than $700 million annually, dramatically increasing the cost of doing business. These tariffs also threaten U.S. technological leadership. The United States has led innovation for decades. However, by pursuing policies that limit market access opportunities, company-led R&D and innovation will slow, which, in turn, will curb further export potential.

SEMI companies also stressed that because of the blunt application of these tariffs, this action will actually hurt U.S. companies as much as it hurts their Chinese competitors. Indeed, about 40 percent of imports in our sector from China are from U.S. or other non-Chinese companies. Further, the semiconductor industry relies on a vast network of supply chains, which have been built and qualified over the course of years. A fundamental revamp of supply chains is simply not feasible. This would be expensive, time-consuming, and resource-intensive.

With a growing number of policy issues that are central to and could have significant impact for semiconductor companies, SEMI hosted its first ever Fall Washington Forum for members of its North American Advisory Board (NAAB). SEMI also invited several other industry executives. In total, 14 senior industry executives, including representatives from equipment manufacturers, component suppliers, and materials providers, attended the Fall Forum.

During the two days of meetings, SEMI met with several senior Administration officials to better the policies being enacted and considered as well as encourage all parties to not impose barriers to commerce, which would severely impact the semiconductor industry. SEMI also met with Members of Congress and their staffs on this issue.

All told, attendees at the Fall Forum had more than 15 meetings with policymakers, reflecting the great impact of public policy on SEMI members companies. At a time when the stakes for the industry could not be higher, direct engagement with lawmakers is critical. The Washington Forum offers an incredible opportunity for members to better understand the impact of key public policy issues and gain firsthand experience in influencing policy and helping lawmakers better understand the industry.

If you are interested in learning more about the SEMI Washington Forum or SEMI’s public policy program, please contact Jay Chittooran by email at [email protected].

Mark Lipacis, Managing Director of Jefferies Group LLC and a leading analyst in identifying semiconductor industry trends and opportunities, will present a featured keynote during the GSA Silicon Summit – East, being held Tuesday, October 9 in Saratoga Springs, NY.

The inaugural conference is presented by the Saratoga County Prosperity Partnership (Saratoga Partnership), Saratoga County, NY’s economic development agency; the Global Semiconductor Alliance (GSA), a leading voice for the worldwide semiconductor industry; and the Center for Economic Growth (CEG), a regional economic and business development organization.

A top executive with the world’s only independent full-service global investment banking firm, Lipacis will discuss “The 4th Tectonic Shift in Computing – The Next Growth Opportunity for Semis.” Highlighting the technical innovations that translate to tectonic shifts in computing, his remarks will focus on the current evolution to a parallel processing/Internet of Things (IoT) model, driven by improvements in parallel processing and Artificial Intelligence (AI) technologies.

“Mark Lipacis is a thought leader with a deep market research expertise in edge computing and IoT. We look forward to Mark’s closing keynote and the important insights that he will share on the 4th tectonic shift in computing and the new opportunities it brings for the semiconductor industry and end markets,” said Dr. Shrikant Lohokare, Executive Director and Senior Vice President, GSA. “As rapid innovation continues to disrupt computing, and the impact of the semiconductor industry ripples through the world of business, his outlook will be of particular significance in addressing challenges and harnessing opportunities.”

“With the presence of GLOBALFOUNDRIES marking Saratoga County as a global leader in advanced semiconductor manufacturing, Silicon Summit – East is the ideal venue for Mark Lipacis to present a worldview of the latest industry evolution in computing,” said Marty Vanags, President of the Saratoga County Prosperity Partnership. “We are eager to hear his vision for the future, and in the process, to connect companies throughout the supply chain with opportunites to locate and grow high-tech business in Saratoga County.”

Lipacis has 18 years of experience in equity research, having joined Jefferies Group LLC in 2011 from Morgan Stanley, where he spent four years as a senior semiconductor analyst, and most recently as a managing director. In 2010, he was a runner-up in the institutional investor analyst survey, ranked number three in the Greenwich Associates poll, and ranked highly in previous Wall Street Journal and Starmine Polls – including being recognized as the number one semiconductor stock picker by Starmine in 2009. Previously, he was a first vice president and senior semiconductor analyst at Prudential, and prior to that a director and lead communicatons semiconductor analyst at Merrill Lynch.

Scheduled to deliver the opening keynote is Dr. Gary Patton, Chief Technology Officer and Senior Vice President of Worldwide Research and Development at GLOBALFOUNDRIES. A well-recognized industry leader in semiconductor technology R&D with over 30 years of semiconductor experience, Patton is responsible for GLOBALFOUNDRIES’ semiconductor technology R&D roadmap, operations and execution. His address will discuss “Market Drivers for Moore and Beyond Moore Semiconductor Technologies.”

The Networking Break Sponsor for GSA Silicon Summit – East is Micron. Gold Sponsors are Analog Devices, BBL and National Grid. Complete information about the event, including the program and sponsorship opportunities, can be found at https://www.gsaglobal.org/2018sse/.

GSA Silicon Summit – East was created through a strategic alliance established last year by the Saratoga Partnership and GSA. The event, with a theme of “Harnessing Emerging Semiconductor Market Opportunities,”  is designed to promote partnerships and drive efficiencies that advance semiconductor technology and business, while also informing the regional ecosystem on growth opportunities.

The ConFab – an exclusive conference and networking event targeted to semiconductor manufacturing and design executives from leading device makers, OEMs, OSATs, fabs, suppliers and fabless/design companies – is proud to announce its opening Keynote speaker, the distinguished Dr. Jeffrey J. Welser from IBM Research – Almaden. Being held at The Cosmopolitan of Las Vegas from May 14-17, Pete Singer, The ConFab Conference Chair and Editor in Chief of Solid State Technology, will welcome Dr. Welser to the stage on May 15.

In what promises to bring the audience valuable insights, Dr. Welser will continue on the theme established at The ConFab in 2018: Artificial Intelligence. AI, which represents a market opportunity $2 trillion on top of the existing $1.5-2B information technology industry, is seen as a huge game changer in the semiconductor industry. In addition to AI chips from traditional IC companies such as Intel, IBM and Qualcomm, more than 45 start-ups are working to develop new AI chips, with VC investments of more than $1.5B. Tech giants such as Google, Facebook, Microsoft, Amazon, Baidu and Alibaba are also developing AI chips. Dr. Welser will describe how making AI semiconductor engines will require a wildly innovative range of new materials, equipment, and design methodologies. To get to the next level in performance/Watt, innovations being researched at the AI chip level – at IBM and elsewhere — include: low precision computing, analog computing and resistive computing.

“Dr. Welser has great insight into how AI will be used to analyze the vast amounts of unstructured data being generated today, the various approaches to AI, and the kinds of innovations that will be needed at the chip level,” said Pete Singer. “We did a deep dive into AI in 2018 with speakers from IBM, Google, Nvidia, HERE Technologies, Silicon Catalyst, TechInsights, Siemens and Qorvo, among others. We’re delighted that Dr. Welser will build upon that in 2019 with his kickoff keynote.”

As Vice President and Lab Director at IBM Research – Almaden, Dr. Welser oversees exploratory and applied research. Home of the relational database and the world’s first hard disk drive, Almaden today continues its legacy of advancing data technology and analytics for Cloud and AI systems and software, and is increasingly focused on advanced computing technologies for AI, neuromorphic devices and quantum computing. After joining IBM Research in 1995, Dr. Welser has worked on a broad range of technologies, including novel silicon devices, high performance CMOS and SOI device design, and next generation system components. He has directed teams in both development and research as well as running industrial, academic and government consortiums, including the SRI Nanoelectronics Research Initiative.

Additional industry experts adding to The ConFab 2019 Agenda will be announced soon.

MagnaChip Semiconductor Corporation (“MagnaChip”) (NYSE: MX), a designer and manufacturer of analog and mixed-signal semiconductor products, announced today that it will hold a Foundry Technology Symposium at the Shangri-La in Shenzhen, China, on November 27, 2018. After holding a successful Foundry Technology symposium in Shenzhen, China in 2015, this second technology symposium in Shenzhen is part of MagnaChip’s global foundry targeted geographic strategy to increase MagnaChip’s brand awareness in China.

Major topics to be discussed are MagnaChip’s current Foundry service offerings and future business roadmap, specialty technology processes, target applications and end-markets. This symposium is being conducted as a direct response to the increased interest and demand from current fabless customers in China for advanced analog and mixed-signal specialized foundry technologies.

During the symposium in Shenzhen, MagnaChip will highlight its technology portfolio along with discussions focused on mixed-signal, low-power technologies in the Internet of Things (IoT) sector, Bipolar-CMOS-DMOS (BCD) for high-performance analog and power management applications, Ultra-High Voltage (UHV) and Non-Volatile Memory (NVM). In addition, MagnaChip will present technologies used in applications including smartphones, tablet PCs, automotive, LED lighting, consumer wearables and IoT.

“We hope that this Foundry Technology Symposium in Shenzhen will better position us to understand our customers’ needs in China,” said YJ Kim, Chief Executive Officer of MagnaChip. “With our technology symposiums held in United States, Taiwan and now in Shenzhen, China, we strongly believe that we will be able to better serve our global customers with our long history of providing successful foundry services and with our deep technological expertise.”

A multitude of fabless companies, IDMs (Integrated Device Manufacturers) and other semiconductor companies are expected to attend MagnaChip’s Shenzhen technology symposium.

To sign up for the event, and to receive more detailed information regarding the symposium, please visit www.magnachip.com or ifoundry.magnachip.com.