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Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that its full-flow digital and signoff tools have achieved certification for Samsung Foundry’s 7-nanometer (nm) Low Power Plus (LPP) process technology. The Cadence® tools were certified for the Process Design Kit (PDK) and foundation library on the 7LPP process and confirmed to meet Samsung Foundry’s accuracy requirements, enabling systems and semiconductor companies to accelerate the delivery of 7LPP designs.

The Cadence RTL-to-GDSII design flow that has been certified for the 7LPP process technology is based on the Design Methodology (DM) of Samsung Foundry using an OpenRISC OR1200 design.

The Cadence digital and signoff tools are available via a quick-start kit. The certified tools include the Innovus Implementation System, GenusSynthesis Solution, Joules RTL Power Solution, Conformal® Equivalence Checking, Conformal Low Power, Modus DFT Software Solution, VoltusIC Power Integrity Solution, Tempus Timing Signoff Solution, Quantus Extraction Solution, Cadence Physical Verification System (PVS), Cadence CMP Predictor (CCP) and Cadence Litho Physical Analyzer (LPA).

“Our 7LPP process provides the best power, performance and area that we have seen so far in advanced FinFET nodes, and we expect this will provide great benefits for our mutual customers’ next generation SoC designs,” said Ryan Sanghyun Lee, vice president of the Foundry Marketing at Samsung Electronics. “By working closely with Cadence, we have been able to ensure that our customers can get these benefits quickly and easily using the certified Cadence digital and signoff full flow.”

“Using our full RTL-to-GDSII reference flow, our customers can take advantage of the advanced-node innovation provided in the 7LPP process,” said KT Moore, vice president, product management in the Digital & Signoff Group at Cadence. “Our ongoing collaboration with Samsung Foundry enables us to provide the tools our customers require to quickly complete the most complex designs.”

As silicon-based semiconductors reach their performance limits, gallium nitride (GaN) is becoming the next go-to material to advance light-emitting diode (LED) technologies, high-frequency transistors and photovoltaic devices. Holding GaN back, however, is its high numbers of defects.

This material degradation is due to dislocations — when atoms become displaced in the crystal lattice structure. When multiple dislocations simultaneously move from shear force, bonds along the lattice planes stretch and eventually break. As the atoms rearrange themselves to reform their bonds, some planes stay intact while others become permanently deformed, with only half planes in place. If the shear force is great enough, the dislocation will end up along the edge of the material.

As silicon-based semiconductors reach performance limits, gallium nitride is becoming the next go-to material for several technologies. Holding GaN back, however, is its high numbers of defects. Better understanding how GaN defects form at the atomic level could improve the performance of the devices made using this material. Researchers have taken a significant step by examining and determining six core configurations of the GaN lattice. They present their findings in the Journal of Applied Physics. This image shoes the distribution of stresses per atom (a) and (b) of a-edge dislocations along the <1-100> direction in wurtzite GaN. Credit: Physics Department, Aristotle University of Thessaloniki

Layering GaN on substrates of different materials makes the problem that much worse because the lattice structures typically don’t align. This is why expanding our understanding of how GaN defects form at the atomic level could improve the performance of the devices made using this material.

A team of researchers has taken a significant step toward this goal by examining and determining six core configurations of the GaN lattice. They presented their findings in the Journal of Applied Physics, from AIP Publishing.

“The goal is to identify, process and characterize these dislocations to fully understand the impact of defects in GaN so we can find specific ways to optimize this material,” said Joseph Kioseoglou, a researcher at the Aristotle University of Thessaloniki and an author of the paper.

There are also problems that are intrinsic to the properties of GaN that result in unwanted effects like color shifts in the emission of GaN-based LEDs. According to Kioseoglou, this could potentially could be addressed by exploiting different growth orientations.

The researchers used computational analysis via molecular dynamics and density functional theory simulations to determine the structural and electronic properties of a-type basal edge dislocations along the <1-100> direction in GaN. Dislocations along this direction are common in semipolar growth orientations.

The study was based on three models with different core configurations. The first consisted of three nitrogen (N) atoms and one gallium (Ga) atom for the Ga polarity; the second had four N atoms and two Ga atoms; the third contained two N atoms and two Ga core-associated atoms. Molecular dynamic calculations were performed using approximately 15,000 atoms for each configuration.

The researchers found that the N polarity configurations exhibited significantly more states in the bandgap compared to the Ga polarity ones, with the N polar configurations presenting smaller bandgap values.

“There is a connection between the smaller bandgap values and the great number of states inside them,” said Kioseoglou. “These findings potentially demonstrate the role of nitrogen as a major contributor to dislocation-related effects in GaN-based devices.”

Researchers at Tokyo Institute of Technology have developed flexible terahertz imagers based on chemically “tunable” carbon nanotube materials. The findings expand the scope of terahertz applications to include wrap-around, wearable technologies as well as large-area photonic devices.

Carbon nanotubes (CNTs) are beginning to take the electronics world by storm, and now their use in terahertz (THz) technologies has taken a big step forward.

The CNT THz imager enabled clear, non-destructive visualization of a metal paper clip inside an envelope. Credit: ACS Applied Nano Materials

Due to their excellent conductivity and unique physical properties, CNTs are an attractive option for next-generation electronic devices. One of the most promising developments is their application in THz devices. Increasingly, THz imagers are emerging as a safe and viable alternative to conventional imaging systems across a wide range of applications, from airport security, food inspection and art authentication to medical and environmental sensing technologies.

The demand for THz detectors that can deliver real-time imaging for a broad range of industrial applications has spurred research into low-cost, flexible THz imaging systems. Yukio Kawano of the Laboratory for Future Interdisciplinary Research of Science and Technology, Tokyo Institute of Technology (Tokyo Tech), is a world-renowned expert in this field. In 2016, for example, he announced the development of wearable terahertz technologies based on multiarrayed carbon nanotubes.

Kawano and his team have since been investigating THz detection performance for various types of CNT materials, in recognition of the fact that there is plenty of room for improvement to meet the needs of industrial-scale applications.

Now, they report the development of flexible THz imagers for CNT films that can be fine-tuned to maximize THz detector performance.

Publishing their findings in ACS Applied Nano Materials, the new THz imagers are based on chemically adjustable semiconducting CNT films.

By making use of a technology known as ionic liquid gating[1], the researchers demonstrated that they could obtain a high degree of control over key factors related to THz detector performance for a CNT film with a thickness of 30 micrometers. This level of thickness was important to ensure that the imagers would maintain their free-standing shape and flexibility, as shown in Figure 1.

“Additionally,” the team says, “we developed gate-free Fermi-level[2] tuning based on variable-concentration dopant solutions and fabricated a Fermi-level-tuned p?n junction[3] CNT THz imager.” In experiments using this new type of imager, the researchers achieved successful visualization of a metal paper clip inside a standard envelope (see Figure 2.)

The bendability of the new THz imager and the possibility of even further fine-tuning will expand the range of CNT-based devices that could be developed in the near future.

Moreover, low-cost fabrication methods such as inkjet coating could make large-area THz imaging devices more readily available.

GLOBALFOUNDRIES today announced that Socionext Inc. will manufacture the third and latest generation of its graphics display controllers, the SC1701, on GF’s 55nm Low Power Extended (55LPx) process technology with embedded non-volatile memory (SuperFlash®). The 55LPx platform enables several new features in Socionext’s SC1701 series including enhanced diagnostic and security protection capabilities, cyclic redundancy code (CRC) checks, picture freeze detection, and multi window signature unit for advanced in-vehicle display systems. The shipping of the SC1701 from Socionext will start at the end of July.

In recent years, the number of in-vehicle electronic systems has risen exponentially with increasing requirements for multiple content-rich displays. Socionext’s SC1701 controller integrates a variety of system component features along with APIX®3 technology and automotive safety functions to meet the increasing demand for high speed video and data connectivity and stringent safety requirements. The device supports display resolution up to one U-HD (4K) or two F-HD (2K) at 30bpp, and capable of receiving two separate video streams over a single link by utilizing the VESA® display stream compression (DSC) method. Moreover, the SC1701 offers video content protection through built-in HDCP decryption technology that enables a richer user experience.

“The SC1701 display controller is designed to support high performance computing within a vehicle, with one of the most innovative evolutions in automotive system architectures,” said Koichi Yamashita, senior vice president and head of IoT and Graphics Solution Business Unit at Socionext. “GF’s automotive grade 1 qualified 55LPx platform, with its low power logic and highly reliable embedded non-volatile memory, was ideal for our product.”

GF’s 55LPx platform, with SST’s SuperFlash® memory technology, provides a fast path-to-product solution, and is fully qualified for consumer, industrial and automotive grade 1 applications. The implementation of SuperFlash® on 55LPx provides a small bitcell size, increased fast read speed along with superior data retention and endurance.

“GF is excited to be working with Socionext, who is a leader in state-of-the-art SoC technology,” said Dave Eggleston, vice president of embedded memory at GF. “Socionext joins our rapidly growing client base for GF’s 55LPx platform, which offers a combination of superior low power logic, embedded non-volatile memory, extensive IP, and superior reliability for the industrial and automotive grade 1 system-on-chip markets.”

The 55LPx-enabled platform is in volume production at GF’s 300mm line in Singapore. In addition to the SC1701, Socionext is currently developing several products on the technology, joining On Semiconductor, Silicon Mobility and Fudan Microelectronics, who are currently optimizing their chip designs with GF’s 55LPx platform for wearable IoT and automotive products.

Process design kits and an extensive offering of silicon proven IP are available now. For more information on GF’s mainstream CMOS solutions, contact your GF sales representative or go to globalfoundries.com.

An international collaborative research group including Tokyo Institute of Technology, Universite PARIS DIDEROT and CNRS has discovered that CO2 is selectively reduced to CO[1] when a photocatalyst[2] composed of an organic semiconductor material and an iron complex is exposed to visible light. They have made clear that it is possible to convert CO2, the major factor of global warming, into a valuable carbon resource using visible light as the energy source, even with a photocatalyst composed of only commonly occurring elements.

This is CO2 reduction using a photocatalyst combining carbon nitride and an iron compl. Credit: Osamu Ishitani

In recent years, technologies to reduce CO2into a resource using metal complexes and semiconductors as photocatalysts are being developed worldwide. If this technology called artificial photosynthesis can be applied, scientists would be able to convert CO2, which is considered the major factor of global warming and is being treated as a villain, into a valuable carbon resource using sunlight as the energy source.

Complexes and inorganic semiconductors containing precious and rare metals such as ruthenium, rhenium, and tantalum have been used in highly active photocatalysts reported so far. However, considering the tremendous amount of CO2, there was a need to create new photocatalysts made only with elements widely available on Earth.

Professor Osamu Ishitani, Associate Professor Kazuhiko Maeda, research staff Ryo Kuriki and others of Tokyo Tech, with the support of JST (Japan Science and Technology Agency)’s Strategic Basic Research Programs (CREST Establishment of Molecular Technology towards the Creation of New Functions) for international collaborative research projects, performed collaborative research with the research group of Professor Marc Robert of Universite PARIS DIDEROT and CNRS. As a result, by fusing carbon nitride, an organic semiconductor, with a complex made of iron and organic materials and using it as a photocatalyst, they succeeded in turning CO2 into a resource at high efficiency under the condition of exposure to visible light at ordinary temperature and pressure.

By combining the organic semiconductor carbon nitride[3], made of carbon and nitrogen, with an iron complex and using it as a photocatalyst, they found that they could reduce carbon dioxide (CO2) to carbon monoxide (CO) at high efficiency. This photocatalytic reaction progresses when exposed to visible light, which is the major component in the wavelength band of sunlight. The carbon nitride absorbs visible light and drives the migration of electrons from the reducing agent to the iron complex, the catalyst. The iron complex uses that electrons to reduce CO2 to CO. The turnover number[4], the external quantum efficiency[5], and the selectivity[6] of CO2 reduction–performance indicators for the formation of CO–reached 155, 4.2%, and 99%, respectively. These values are almost the same as when precious metal or rare metal complexes are used, and about ten times more than photocatalysts reported so far using base metals or organic molecules.

This research was the first to demonstrate that CO2 can be reduced into a resource efficiently using sunlight as the energy source, even by using materials which exist abundantly on Earth, such as carbon, nitrogen, and iron. Tasks remaining are to further improve their function as a photocatalyst and to succeed in fusing them with oxidation photocatalysts which can use water, which exists abundantly on Earth and is inexpensive, as a reducing agent.

TowerJazz, the global specialty foundry, today announced a ramp for its radio frequency silicon-on-insulator (RF SOI) 65nm process in its 300mm Uozu, Japan fab. TowerJazz has signed a contract with long-term partner, SOITEC, a semiconductor materials supplier to guarantee a supply of tens of thousands of 300mm SOI silicon wafers, securing wafer prices for the next years and ensuring supply to its customers, despite a very tight SOI wafer market.

With best in class metrics, TowerJazz’s 65nm RF SOI process enables the combination of low insertion loss and high power handling RF switches with options for high-performance low-noise amplifiers as well as digital integration. The process can reduce losses in an RF switch improving battery life and boosting data rates in handsets and IoT terminals.

According to Mobile Experts, LLC, a market research firm for mobile communications, the mobile RF front-end market is estimated to reach $22 billion in 2022 from an estimated $16 billion in 2018. TowerJazz’s breakthrough RF SOI technology continues to support this high-growth market and is well-poised to take advantage of next-generation 5G standards which will boost data rates and provide further content growth opportunities in the coming years.

TowerJazz is also proud to announce its relationship with Maxscend, a provider of RF components and IoT integrated circuits, ramping in this new technology.

“We chose TowerJazz for its advanced technology capabilities and its ability to deliver in high volume while continuously innovating with a strong roadmap. We specifically selected its 300mm 65nm RF SOI platform for our next-generation product line due to its superior performance, enabling low insertion loss and high power handling,” said Zhihan Xu, Maxscend Chief Executive Officer.

“We are delighted to see the strong adoption of 300mm RF SOI through this large capacity and supply agreement with TowerJazz to augment our already significant 200mm RF SOI partnership.  TowerJazz was the first foundry to ramp our RFeSI products to high volume production in 200mm and continues as one of the industry leaders in innovation in this exciting RF market with advanced and differentiated offerings,” said Paul Boudre, SOITEC Chief Executive Officer.

“We are thrilled about our continued partnership with Maxscend as they bring breakthrough products to market, manufactured using our latest 300mm 65nm RF SOI platform. Also, we are very pleased with our SOITEC partnership to secure tens of thousands of 300mm RF SOI wafers to feed the strong demand in our 300mm Japan factory,” said Russell Ellwanger, TowerJazz Chief Executive Officer.

For more information on TowerJazz’s 65nm RF SOI technology, please visit: http://www.towerjazz.com/sige-bicmos_rf-cmos.html.

Micron Technology, Inc. (Nasdaq:MU) today announced volume production on its 8Gb GDDR6 memory. Built on experience and execution for several generations of GDDR memory, GDDR6 – Micron’s fastest and most powerful graphics memory designed in Micron’s Munich Development Center – is optimized for a variety of applications that require high performance memory, including artificial intelligence (AI), networking, automotive and graphics processing units (GPUs). Additionally, Micron has worked with core ecosystem partners to ramp GDDR6 documentation and interoperability, enabling faster time to market for designs.

“Micron is a pioneer in developing advanced high bandwidth memory solutions and continues that leadership with GDDR6. Micron demonstrated this leadership by recently achieving throughput up to 20 Gb/s on our GDDR6 solutions,” said Andreas Schlapka, director, Compute Networking Business Unit, Micron. “In addition to performance increases, Micron has developed a deep partner ecosystem to enable rapid creation of GDDR6 designs, enabling faster time to market for customers looking to leverage this powerful new memory technology.”

The need for high performance GDDR6 memory has grown as end-users demand advanced applications. GDDR6 enables advanced performance with lower power consumption in a number of segments including:

  • Artificial Intelligence – Artificial intelligence, machine learning, deep learning are memory intensive applications that require more bandwidth from memory solutions. GDDR6 delivers the higher bandwidth required to accelerate AI in applications like computer vision, autonomous driving and the many other applications that require this higher bandwidth.
  • Graphics – Enabling significant performance improvements for today’s top GPUs, GDDR6 delivers enhanced graphic memory speeds to enable higher application bandwidth. Micron GDDR6 will be a core enabling technology of advanced GPU applications, including acceleration, 4K video and improved rendering, VR/AR and crypto mining applications.
  • Networking – Advanced networking technologies require access to high speed/high bandwidth memory. GDDR6-powered smart Network Interface Cards (NIC) enable significant improvements in network bandwidth. Additionally, high bandwidth RAID controllers featuring GDDR6 memory deliver dramatic enhancements to data access and protection.
  • Automotive – As auto manufacturers push for autonomous vehicles, high performance memory is required to process the vast amounts of real-time data required to make this technology a reality. Micron GDDR6 delivers 448 GB/s auto qualified memory solutions, that deliver more than double the bandwidth of LPDDR5 automotive memory solutions.

“As demand for advanced automotive applications such as ADAS and other autonomous driving solutions grows, the need for high bandwidth memory in automotive will grow as well. Advanced high bandwidth GDDR6 memory solutions are a key enabling technology for autonomous vehicles and will be an important tool for the automotive industry as they develop next generation transportation initiatives,” said Kris Baxter, vice president, Marketing, Micron’s Embedded Business Unit.

Targeting up to 64GB/s in one package, GDDR6 brings a significant improvement over the fastest available GDDR5. This unprecedented level of single-chip performance, using proven, industry-standard BGA packaging provides designers a powerful, cost-efficient and low-risk solution using the most scalable, high-speed discrete memory available to the market.

In order to deliver this leading edge high bandwidth memory technology to customers, Micron is working directly with ecosystem partners in order to enable learning on both pre-silicon verification as well as validation. Prior to mass production of GDDR6 memory, Micron shipped early validation silicon to our ecosystem partners to accelerate engineering efforts behind validating intellectual property and build robust models and toolsets in the ecosystem and deliver board layout validation. This ensures that engineers are able to implement GDDR6 in designs at a faster rate and bring bandwidth intensive applications to the marketplace. These ecosystem partners include Rambus and more.

“With nearly 30 years’ experience in implementing designs for high-speed interfaces, Rambus is the first IP provider to launch a comprehensive GDDR6 PHY solution for next-generation AI, ADAS, networking and graphics applications and continues to be at the leading edge of implementing industry standards. We are proud to work with Micron and other ecosystem partners to help customers accelerate time to market for GDDR6 designs and deliver the most advanced solutions based on GDDR6 memory,” said Frank Ferro, senior director of product marketing, Rambus.

Micron GDDR6 memory solutions will be on display in booth B-1340 at ISC 2018, June 24-28, in Frankfurt, Germany. For more information, visit www.micron.com.

Leti, a research institute of CEA Tech, today announced that field trials of its new Low Power Wide Area (LPWA) technology, a waveform tailored for Internet of Things (IoT) applications, showed significant performance gains in coverage, data-rate flexibility and power consumption compared to leading LPWA technologies.

Leti’s LPWA approach includes its patented Turbo-FSK waveform, a flexible approach to the physical layer. It also relies on channel bonding, the ability to aggregate non-contiguous communication channels to increase coverage and data rates. The field trials confirmed the benefits of Leti’s LPWA approach in comparison to LoRaTM and NB-IoT, two leading LPWA technologies that enable wide-area communications at low cost and long battery life.

The results indicate the new technology is especially suitable for long-range massive machine-type communication (mMTC) systems. These systems, in which tens of billions of machine-type terminals communicate wirelessly, are expected to proliferate after 5G networks are deployed, beginning in 2020. Cellular systems designed for humans do not adequately transmit the very short data packets that define mMTC systems.

Figure 1: Performance chart comparison

Designed to demonstrate the performance and flexibility of the new waveform, the field-trial results stem primarily from the system’s flexible approach of the physical layer. The flexibility allows data-rate scaling from 3Mbit/s down to 4kbit/s, when transmission conditions are not particularly favorable and/or a long transmission range is required.

Under favorable transmission conditions, e.g. a shorter range and line of sight, the Leti system can select high data rates using widely deployed single-carrier frequency-division multiplexing (SC-FDM) physical layers to take advantage of the low power consumption of the transmission mode. Under more severe transmission conditions, the system switches to more resilient high-performance orthogonal frequency division multiplexing (OFDM). When both very long-range transmission and power efficiency are required, the system selects Turbo-FSK, which combines an orthogonal modulation with a parallel concatenation of convolutional codes and makes the waveform suitable to turbo processing. The selection is made automatically via a medium access control (MAC) approach optimized for IoT applications.

“Leti’s Turbo-FSK receiver performs close to the Shannon limit, which is the maximum rate that data can be transmitted over a given noisy channel without error, and is geared for low spectral efficiency,” said Vincent Berg, head of Leti’s Smart Object Communication Laboratory. “Moreover, the waveform exhibits a constant envelope, i.e. it has a peak-to-average-power ratio (PAPR) equal to 0dB, which is especially beneficial for power consumption. Turbo-FSK is therefore well adapted to future LPWA systems, especially in 5G cellular systems.”

In the new system, the MAC layer exploits the advantages of the different waveforms and is designed to self-adapt to context, i.e. the usage scenario and application. It optimally selects the most appropriate configuration according to the application requirements, such as device mobility, high data rate, energy efficiency or when the network becomes crowded, and is coupled with a decision module that adapts the communication depending on the radio environment. The optimization of the application transmission requirements is realized by the dynamic adaptation of the MAC protocol, and the decision module controls link quality.

Synopsys, Inc. (Nasdaq: SNPS) today announced that Samsung Electronics Co., Ltd. has certified the Synopsys Custom Design Platform for Samsung Foundry’s 7-nanometer (nm) Low Power Plus (LPP) process Samsung Foundry’s 7LPP is its first semiconductor process technology to use extreme ultraviolet (EUV) lithography, a process technology that greatly reduces complexity and offers significantly better yield and fast turnaround time when compared to its 10-nanometer (10nm) FinFET predecessors. Synopsys custom design tools have been updated to support Samsung Foundry’s 7LPP requirements. In addition, a Synopsys-ready process design kit (PDK) and custom design reference flow are available from Samsung Foundry.

The Synopsys Custom Design Platform has been certified for Samsung Foundry’s 7LPP process technology. The platform is centered around the Custom Compiler custom design and layout environment, and includes HSPICE, FineSim SPICE and CustomSim FastSPICE circuit simulation, StarRC parasitic extraction, and IC Validator physical verification. To support efficient 7LPP custom design, Synopsys and Samsung Foundry have collaborated to develop a reference flow that includes a set of tutorials illustrating key requirements of 7-nm design and layout. These tutorials include sample design data and step-by-step instructions for performing typical design and layout tasks. Topics covered include electrical rule checking, circuit simulation, mixed-signal simulation, Monte Carlo analysis, layout, parasitic analysis, and electromigration.

To achieve certification from Samsung Foundry, Synopsys tools have been optimized to support the demanding requirements of 7-nm design, including:

  • Accurate FinFET device modeling with device aging effect
  • Advanced Monte Carlo simulation features to enable efficient analysis
  • High-performance transient noise simulation for analog and RF designs
  • High-performance post-layout simulation to enable parasitic-aware design and simulation
  • Dynamic circuit ERC for device voltage checks
  • High-performance transistor-level EM/IR analysis to minimize over-design
  • Efficient symbolic editing of FinFET device arrays
  • EUV support
  • Coverage-based via resistance extraction

“Our custom design collaboration with Synopsys has expanded substantially over the past two years,” said Ryan Sanghyun Lee, vice president of Foundry Marketing Team at Samsung Electronics. “With this latest effort, we have added Synopsys Custom Design Platform support for our 7LPP process, including a custom design reference flow based on Synopsys tools.”

“We’ve been collaborating closely with Samsung Foundry to simplify custom design using FinFET process technology,” said Bijan Kiani, vice president of product marketing at Synopsys. “Together we have delivered certified tools, a reference flow, a PDK, simulation models, and runsets to enable Samsung customers to achieve robust custom designs on the 7LPP process.”

Researchers at Chalmers University of Technology, Sweden, have developed a graphene assembled film that has over 60 percent higher thermal conductivity than graphite film – despite the fact that graphite simply consists of many layers of graphene. The graphene film shows great potential as a novel heat spreading material for form-factor driven electronics and other high power-driven systems.

Until now, scientists in the graphene research community have assumed that graphene assembled film cannot have higher thermal conductivity than graphite film. Single layer graphene has a thermal conductivity between 3500 and 5000 W/mK. If you put two graphene layers together, then it theoretically becomes graphite, as graphene is only one layer of graphite.

Today, graphite films, which are practically useful for heat dissipation and spreading in mobile phones and other power devices, have a thermal conductivity of up to 1950 W/mK. Therefore, the graphene-assembled film should not have higher thermal conductivity than this.

Research scientists at Chalmers University of Technology have recently changed this situation. They discovered that the thermal conductivity of graphene assembled film can reach up to 3200 W/mK, which is over 60 percent higher than the best graphite films.

In the graphene film, phonons — quantum particles that describe thermal conductivity — can move faster in the graphene layers rather than interact between the layers, thereby leading to higher thermal conductivity. Credit: Chalmers University of Technology/Krantz Nanoart

Professor Johan Liu and his research team have done this through careful control of both grain size and the stacking orders of graphene layers. The high thermal conductivity is a result of large grain size, high flatness, and weak interlayer binding energy of the graphene layers. With these important features, phonons, whose movement and vibration determine the thermal performance, can move faster in the graphene layers rather than interact between the layers, thereby leading to higher thermal conductivity.

“This is indeed a great scientific break-through, and it can have a large impact on the transformation of the existing graphite film manufacturing industry”, says Johan Liu.

Furthermore, the researchers discovered that the graphene film has almost three times higher mechanical tensile strength than graphite film, reaching 70 MPa.

“With the advantages of ultra-high thermal conductivity, and thin, flexible, and robust structures, the developed graphene film shows great potential as a novel heat spreading material for thermal management of form-factor driven electronics and other high power-driven systems”, says Johan Liu.

As a consequence of never-ending miniaturisation and integration, the performance and reliability of modern electronic devices and many other high-power systems are greatly threatened by severe thermal dissipation issues.

“To address the problem, heat spreading materials must get better properties when it comes to thermal conductivity, thickness, flexibility and robustness, to match the complex and highly integrated nature of power systems”, says Johan Liu. “Commercially available thermal conductivity materials, like copper, aluminum, and artificial graphite film, will no longer meet and satisfy these demands.”

The IP of the high-quality manufacturing process for the graphene film belongs to SHT Smart High Tech AB, a spin-off company from Chalmers, which is going to focus on the commercialisation of the technology.