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The entire semiconductor industry, not to mention Silicon Valley, is built on the propensity of electrons in silicon to get kicked out of their atomic shells and become free. These mobile electrons are routed and switched though transistors, carrying the digital information that characterizes our age.

An international team of physicists and chemists based at the University of California, Berkeley, has for the first time taken snapshots of this ephemeral event using attosecond pulses of soft x-ray light lasting only a few billionths of a billionth of a second.

While earlier femtosecond lasers were unable to resolve the jump from the valence shell of the silicon atom across the band-gap into the conduction electron region, the new experiments now show that this transition takes less than 450 attoseconds.

“Though this excitation step is too fast for traditional experiments, our novel technique allowed us to record individual snapshots that can be composed into a ‘movie’ revealing the timing sequence of the process,” explained Stephen Leone, UC Berkeley professor of chemistry and physics.

Leone, his UC Berkeley colleagues and collaborators from the Ludwig-Maximilians Universität in Munich, Germany, the University of Tsukuba, Japan, and the Molecular Foundry at the Department of Energy’s Lawrence Berkeley National Laboratory report their achievement in the Dec. 12 issue of the journal Science.

Century-old discovery observed

Leone notes that more than a century has elapsed since the discovery that light can make certain materials conductive. The first movie of this transition follows the excitation of electrons across the band-gap in silicon with the help of attosecond extreme ultraviolet (XUV) spectroscopy, developed in the Attosecond Physics Laboratory run by Leone and Daniel Neumark, UC Berkeley professor of chemistry.

In semiconducting materials, electrons are initially localized around the individual atoms forming the crystal and thus cannot move or contribute to electrical currents. When light hits these materials or a voltage is applied, some of the electrons absorb energy and get excited into mobile states in which the electrons can move through the material. The localized electrons take a “quantum jump” into the conduction band, tunneling through the barrier that normally keeps them bound to atoms.

These mobile electrons make the semiconductor material conductive so that an applied voltage results in a flowing current. This behavior allows engineers to make silicon switches, known as transistors, which have become the basis of all digital electronics.

The researchers used attosecond XUV spectroscopy like an attosecond stop watch to follow the electron’s transition. They exposed a silicon crystal to ultrashort flashes of visible light emitted by a laser source. The subsequent illumination with x-ray-pulses of only a few tens of attoseconds (10-18 seconds) in duration allowed the researchers to take snapshots of the evolution of the excitation process triggered by the laser pulses.

Unambiguous interpretation of the experimental data was facilitated by a series of supercomputer simulations carried out by researchers at the University of Tsukuba and the Molecular Foundry. The simulations modeled both the excitation process and the subsequent interaction of x-ray pulses with the silicon crystal.

Electron jump makes atoms rebound

The excitation of a semiconductor with light is traditionally conceived as a process involving two distinct events. First, the electrons absorb light and get excited. Afterwards, the lattice, composed of the individual atoms in the crystal, rearranges in response to this redistribution of electrons, turning part of the absorbed energy into heat carried by vibrational waves called phonons.

In analyzing their data, the team found clear indications that this hypothesis is true. They showed that initially, only the electrons react to the impinging light while the atomic lattice remains unaffected. Long after the excitation laser pulse has left the sample – some 60 femtoseconds later – they observed the onset of a collective movement of the atoms, that is, phonons. This is near the 64 femtosecond period of the fastest lattice vibrations.

Based on current theory, the researchers calculated that the lattice spacing rebounded about 6 picometers (10-12 meters) as a result of the electron jump, consistent with other estimates.

“These results represent a clean example of attosecond science applied to a complex and fundamentally important system,” Neumark said.

The unprecedented temporal resolution of this attosecond technology will allow scientists to resolve extremely brief electronic processes in solids that to date seemed too fast to be approached experimentally, says Martin Schultze, who was a guest researcher in Leone’s lab last year, visiting from the Ludwig-Maximilians Universität München. This poses new challenges to the theory of light-matter interactions, including the excitation step, its timescale and the interpretation of experimental x-ray spectra.

“But here is also an advantage,” Schultze added. “With our ultrashort excitation and probing pulses, the atoms in the crystal can be considered frozen during the interaction. That eases the theoretical treatment a lot.”

A team of researchers led by North Carolina State University has found that  stacking materials that are only one atom thick can create semiconductor junctions that transfer charge efficiently, regardless of whether the crystalline structure of the materials is mismatched – lowering the manufacturing cost for a wide variety of semiconductor devices such as solar cells, lasers and LEDs.

“This work demonstrates that by stacking multiple two-dimensional (2-D) materials in random ways we can create semiconductor junctions that are as functional as those with perfect alignment” says Dr. Linyou Cao, senior author of a paper on the work and an assistant professor of materials science and engineering at NC State.

“This could make the manufacture of semiconductor devices an order of magnitude less expensive.”

Schematic illustration of monolayer MoS2 and WS2 stacked vertically. Image: Linyou Cao.

Schematic illustration of monolayer MoS2 and WS2 stacked vertically. Image: Linyou Cao.

For most semiconductor electronic or photonic devices to work, they need to have a junction, which is where two semiconductor materials are bound together. For example, in photonic devices like solar cells, lasers and LEDs, the junction is where photons are converted into electrons, or vice versa.

All semiconductor junctions rely on efficient charge transfer between materials, to ensure that current flows smoothly and that a minimum of energy is lost during the transfer. To do that in conventional semiconductor junctions, the crystalline structures of both materials need to match. However, that limits the materials that can be used, because you need to make sure the crystalline structures are compatible. And that limited number of material matches restricts the complexity and range of possible functions for semiconductor junctions.

“But we found that the crystalline structure doesn’t matter if you use atomically thin, 2-D materials,” Cao says. “We used molybdenum sulfide and tungsten sulfide for this experiment, but this is a fundamental discovery that we think applies to any 2-D semiconductor material. That means you can use any combination of two or more semiconductor materials, and you can stack them randomly but still get efficient charge transfer between the materials.”

Currently, creating semiconductor junctions means perfectly matching crystalline structures between materials – which requires expensive equipment, sophisticated processing methods and user expertise. This manufacturing cost is a major reason why semiconductor devices such as solar cells, lasers and LEDs remain very expensive. But stacking 2-D materials doesn’t require the crystalline structures to match.

“It’s as simple as stacking pieces of paper on top of each other – it doesn’t even matter if the edges of the paper line up,” Cao says.

The paper, “Equally Efficient Interlayer Exciton Relaxation and Improved Absorption in Epitaxial and Non-epitaxial MoS2/WS2 Heterostructures,” was published as a “just-accepted” manuscript in Nano Letters Dec. 3.

Lead authors of the paper are Yifei Yu, a Ph.D. student at NC State; Dr. Shi Hu, a former postdoctoral researcher at NC State; and Liqin Su, a Ph.D. student at the University of North Carolina at Charlotte. The paper was co-authored by Lujun Huang, Yi Liu, Zhenghe Jin, and Dr. Ki Wook Kim of NC State; Drs. Alexander Puretzky and David Geohegan of Oak Ridge National Laboratory; and Dr. Yong Zhang of UNC Charlotte. The research was funded by the U.S. Army Research Office under grant number W911NF-13-1-0201 and the National Science Foundation under grant number DMR-1352028.

Holst Centre, imec and their partner Evonik have realized a general-purpose 8-bit microprocessor, manufactured using complementary thin-film transistors (TFTs) processed at temperatures compatible with plastic foil substrates (250°C). The new “hybrid” technology integrates two types of semiconductors—metal-oxide for n-type TFTs (iXsenic, Evonik) and organic molecules for p-type TFTs—in a CMOS microprocessor circuit, operating at unprecedented for TFT technologies speed—clock frequency 2.1kHz. The breakthrough results were published online in Scientific Reports, an open access journal from the publisher of Nature.

Low temperature thin-film electronics are based on organic and metal-oxide semiconductors. They have the potential to be produced in a cost effective way using large-area manufacturing processes on plastic foils. Thin-film electronics are, therefore, attractive alternatives for silicon chips in simple IC applications, such as radio frequency identification (RFID) and near field communication (NFC) tags and sensors for smart food packaging, and in large-area electronic applications, such as flexible displays, sensor arrays and OLED lamps. Holst Centre’s (imec and TNO) research into thin-film electronics aims at developing a robust, foil-compatible, high performance technology platform, which is key to making these new applications become a reality.

The novel 8-bit microprocessor performs at a clock frequency of 2.1 kHz. It consists of two separate chips: a processor core chip and a general-purpose instruction generator (P2ROM). For the processor core chip, a complementary hybrid organic-oxide technology was used (p:n ratio 3:1). The n-type transistors are 250°C solution-processed metal-oxide TFTs with typically high charge carrier mobility (2 cm2/Vs). The p-type transistors are small molecule organic TFTs with mobility of up to 1 cm2/Vs. The complementary logic allows for a more complex and complete standard cell library, including additional buffering in the core and the implementation of a mirror adder in the critical path. These optimizations have resulted in a high maximum clock frequency of 2.1kHz. The general-purpose instruction generator or P2ROM is a one-time programmable ROM memory configured by means of inkjet printing, using a conductive silver ink. The chip is divided into a hybrid complementary part and a unipolar n-TFT part and is capable of operating at frequencies up to 650 Hz, at an operational voltage of Vdd=10V.

Interested companies can join Holst Centre’s R&D program on organic and oxide transistors, exploring and developing new technologies for producing thin-film transistors (TFTs) on plastic foils.

thin film microprocessor

Entegris, Inc., a developer of yield-enhancing materials and solutions for highly advanced manufacturing environments, announced the release and global availability of their next generation of 450mm wafer carrier solutions (P2) for the safe and reliable transport of 450mm wafers used in semiconductor manufacturing. The 450 mm P2 wafer carriers enable customers to efficiently ship and process SEMI M1 standard wafers through precise alignment with 450mm equipment standards, low particle generation, and reduced cleaning cycle time.

“As the industry transitions to 450mm, manufacturers are facing new wafer handling challenges to maintain the level of cleanliness required to produce SEMI standard M1 quality wafers,” said Todd Edlund, senior vice president and chief operating officer of Entegris. “Entegris has been closely collaborating with leading silicon suppliers and OEMs to expand the shipment and processing of 450 mm wafers. As part of these collaborations, we have shipped our 450mm wafer handling solutions to more than 50 critical industry players.”

The 450mm P2 Multiple Application Carriers (MAC) and 450mm Front Opening Unified Pod (FOUP) have been extensively tested by the Global 450mm Consortium (G450C) in Albany, New York at SUNY Polytechnic Institute. With this collaboration, Entegris has improved the architecture of the MAC and FOUP carriers to ensure seamless equipment interoperability within the fab. Dave Skilbred, Director of Program Coordination/Management at G450C said, “The launch of the 450mm P2 MAC and FOUP clearly demonstrates Entegris’ leadership and commitment to support the industry transition to M1 450mm wafer quality and to continue to advance progress on fully patterned 450mm wafers.”

With robust sealing and an optimized mechanism for “capturing” the wafer as it enters the carrier, the P2 MAC delivers a cleaner wafer environment with improved protection from handling and environmentally induced particle generation. The 450mm wafer carrier design also reduces the cleaning cycle time by 25-50 percent for increased fab efficiency.  In addition, the 450mm P2 MAC shipping system has been tested to meet both MAC and FOSB SEMI standards of performance.

450mm entegris

Crossbar, Inc., a start-up company pioneering a new category of very high capacity and high-performance non-volatile memory, today announced it will be disclosing another major technology breakthrough in their development of Resistive RAM (RRAM) at next week’s IEEE International Electron Devices Meeting (IEDM).  Continuing to meet key technological milestones, the company first unveiled its RRAM technology in August 2013 and then demonstrated pre-production 1MB arrays using Crossbar’s patented “1TnR” technology for read/write operationsin June 2014.

Presented by Dr. Sung Hyun Jo, Crossbar senior fellow, the presentation will discuss how to overcome a common design challenge in high-density RRAM development, and will describe how a Field Assisted Superlinear Threshold (FAST) selector device can successfully suppress the sneak path current inherent in RRAM memory, another significant milestone needed to commercialize RRAM memory for high-density data applications.

Presentation Title:  3D-stackable Crossbar Resistive Memory Based on Field Assisted Superlinear Threshold (FAST) Selector

Speaker:  Sung Hyun Jo, Ph.D., Crossbar’s Senior Fellow, Technology Development

When:  Monday, December 15th at 4:05 pm

Track:  Session 6: Memory Technology – Resistive RAM

Where:  IEDM Conference in the Hilton San Francisco Union Square, San Francisco, CA

Location:  Continental Ballroom 6

Two-dimensional (2D) layered materials are now attracting a lot of interest due to their unique optoelectronic properties at atomic thicknesses. Among them, graphene has been mostly investigated, but the zero-gap nature of graphene limits its practical applications. Therefore, 2D layered materials with intrinsic band gaps such as MoS2, MoSe2, and MoTe2 are of interest as promising candidates for ultrathin and high-performance optoelectronic devices.

Here, Pil Ju Ko and colleagues at Toyohashi University of Technology, Japan have fabricated back-gated field-effect phototransistors made of MoSe2 crystals having a thickness of only twenty nanometers. The devices were fabricated by mechanical cleavage of MoSe2 crystals into few-layered flakes, followed by transfer onto a silicon wafer with pre-deposited titanium electrodes.

Despite their ultra-thin physical size, the devices showed excellent field-effect phototransistor characteristics. The measured photoresponsivity of 97.1 AW-1 at zero back gate voltage was higher than previous reports of photodetectors fabricated using GaS, GaSe, MoS2, and InSe. The photoresponse of the MoSe2 was much faster (less than 15 msec) than ultrasensitive photodetectors based on monolayer MoS2. Furthermore, the theoretical external quantum efficiency was 280-fold higher than of commercial Si and InGaAs photodiodes.

The research shows that MoSe2 is a promising material for photodetector applications. The group is optimization the device performance by studying thickness-dependent of the photosensitivity.

Nanoelectronics research center imec and global ICT leader Huawei announced today that they have taken a further step in their strategic partnership focusing on optical data link technology. The joint research on silicon-based optical interconnects is expected to deliver benefits including high speed, low power consumption and cost savings.

Silicon photonics is a key enabling technology expected to revolutionise optical communications by paving the way for the creation of highly integrated, low power optical transceivers used for data transmission and telecommunications.

Huawei has now joined imec’s research program which focuses on optimizing bandwidth density, power consumption, thermal robustness and cost at the system level. Huawei engineers will work closely with imec’s R&D team in Leuven, Belgium, with a view to achieving technological progress in this vital area for delivering connectivity matching the needs of the Europe of tomorrow.

In 2013, Huawei acquired photonics company Caliopa spin-off from imec and UGent, thereby adding silicon photonics research to its European R&D portfolio. Delivering on its commitment of boosting Caliopa’s development, Huawei has been investing in its human resources and infrastructure, prompting it to move offices to keep step with its rapid growth.

“This is an important next step in our collaboration with Huawei on silicon photonics. This collaboration, together with Huawei’s recent acquisition of our spin-off Caliopa that focuses on developing silicon photonics-based optical transceivers for the telecommunications industry, shows that our silicon photonics research is important for advancing next-generation high-bandwidth ICT solutions,” stated Luc Van den hove, president and CEO at imec.“We expect this partnership to give a further boost to our silicon photonics research over the coming years.”

“Having acquired cutting-edge expertise in the field of silicon photonics thanks to our acquisition of Caliopa last year, this partnership with imec is the logical next move towards next-generation optical communication. By combining our strengths in this strategic area, we can deliver ICT innovation that translates into value for businesses and consumers in Europe and beyond,” said Hudson Liu, CEO at Huawei Belgium.

Imec’s role as a global leader in the field of silicon electronics, combined with Caliopa’s expertise in this field – leveraged by Huawei’s global reach – make this new partnership a strategic advantage for all sides.

Thanks to Huawei’s global platform and network, the company can bring silicon photonics research results to the market, effectively speeding up the commercialisation of its products. This means creating a win-win situation where R&D success translates into industrial achievement: the expertise achieved in Belgium will make a direct contribution to improving communications technology at a global level.

The collaboration further deepens Huawei’s engagement with the European research ecosystem in pursuit of its strategy to build a better-connected Europe by investing in local talent. The announcement follows the recent purchase of Internet of Things pioneering company Neul in the UK, the launch of an innovation centre in Walldorf, Germany, and the opening of an R&D site in Sophia Antipolis, France.

​SEMATECH announced today that promising progress has been made in qualifying outgassing specifications for extreme ultraviolet (EUV) lithography. As the first to certify a resist family using witness sample-based resist outgas testing, this achievement has the potential to realize substantial cost savings by significantly improving the resist learning cycle.

​The reduction of EUV resist outgassing to minimize or prevent possible contamination of EUV exposure tools is critical to the development of EUV resists. Therefore, it is vital that resist chemistries meet stringent outgassing specifications before being used in an EUV scanner. Today, however, the resist learning cycle is excessively long and inefficient due in part to the lengthy outgas tests that resist material formulations must undergo before being subjected to exposure in a production EUV scanner.

In a joint collaboration with the JSR Corporation, SEMATECH has experimentally proven an improved evaluation method that reduces the amount of testing of commercial EUV resists from every formulation to just three samples per family. The results confirm that the concentration of the major components in a resist can be varied without the need for requalification, which can result in a potential savings of few hundred outgas tests for each resist family.

“In mutual effort to develop leading-edge resists and materials, and accelerate optimized processes for EUV high-volume manufacturing, JSR and SEMATECH have made significant progress in identifying solutions for key outgassing issues,” said Tooru Kimura, General Manager of Semiconductor Materials Laboratory at JSR. “Through sophisticated process capabilities, the goal of our work is to discover new materials for the next generation EUV exposure tools that further stimulates resist development by enabling a more efficient way for outgas testing.”

“In order to ensure the affordable evolution of state-of-the-art lithography technologies, it is critical to predict a material’s outgassing level and understand the link between performance and resist outgassing,” said Kevin Cummings, SEMATECH’s Director of Lithography. “SEMATECH has been working with JSR over the last several months to make sure all test procedures meet industry guidelines for outgas testing. Now we are able to reduce the sample tests per each resist family for all resist suppliers, further enabling the infrastructure that will afford cost-effective EUV manufacturing.”

Over the past decade, SEMATECH has reduced resist and materials development cycle time by providing the industry access to successive generations of small field exposure tools. SEMATECH’s projects have succeeded in measuring the outgassing characteristics in hundreds of EUV resists and materials formulations, and delivering thousands of EUV exposure shifts to member companies to evaluate tens of thousands of materials formulations.

Cymer, LLC, an ASML company, a supplier of light sources used by chipmakers to pattern advanced semiconductor chips, today announced its new argon fluoride (ArF) immersion light source, the XLR 700ix. Built on the XLR platform, the 700ix provides improvements in bandwidth, wavelength and energy stability, enabling higher scanner throughput and process stability for advanced 14nm chip manufacturing and beyond.

The XLR 700ix provides chipmakers tighter bandwidth control (300+5fm) that essentially eliminates bandwidth as a source of process variation for on-wafer performance. Cymer’s patented technology applies high-speed closed loop control on a pulse-by-pulse basis, resulting in extremely stable performance.

“As chip geometries continue to shrink, bandwidth plays an increasing role in control of wafer critical dimension,” said Ed Brown, Chief Executive Officer of Cymer Light Source. “Our newest product, the XLR 700ix, significantly improves bandwidth performance, reducing process excursions and ensuring stable and repeatable on-wafer results. Additionally, as part of Cymer’s commitment to the sustainable use of natural resources, the XLR 700ix has been designed to use significantly less helium and energy than our previous light sources.”

The XLR 700ix introduces a reduction in helium consumption by 50 percent, while providing stable performance across all conditions, even at high-duty cycles. Helium is mainly used in the Line Narrowing Module (LNM) as a critical purge gas due to its unique thermal properties to ensure stable optical performance. Additionally, the XLR 700ix reduces power consumption by 15 percent through the inclusion of the latest, field-proven Master Oscillator (MO) chamber design, enabling chipmakers to decrease operating costs.

The XLR 700ix also includes software updates that enhance light source predictability and availability, such as auto chamber conditioning and automated gas optimization, delivering the highest system efficiency to meet demanding manufacturing schedules.

Cymer’s XLR 700ix will begin shipping in Q1 2015.

EV Group (EVG), a supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced that it has established the NILPhotonics Competence Center, which is designed to assist customers in leveraging EVG’s suite of nanoimprint lithography (NIL) solutions to enable new and enhanced products and applications in the field of photonics. These include light emitting diodes (LEDs) and photovoltaic (PV) cells, where NIL-enabled photonic structures can improve light extraction and light capturing, respectively, as well as laser diodes, where photonic structures enable the tailoring of device characteristics to improve performance. The NILPhotonics Competence Center includes dedicated, global process teams, pilot-line production facilities and services at its cleanrooms at EVG’s headquarters in Austria as well as its subsidiaries in North America and Japan.

nanoimprint

“Nanoimprint lithography is an enabling technology for the design and manufacture of all kinds of photonic structures, which can significantly shorten time to market and lower cost of production compared to conventional technologies, such as electron-beam writing and stepper systems for optical lithography,” stated Markus Wimplinger, corporate technology development and IP director at EV Group. “For example, compared with conventional lithography, our full-wafer nanoimprinting technology can pattern true three-dimensional structures in the sub-micron to nano-range as well as features as small as 20nm, which opens up a range of new photonic applications. With our NILPhotonics Competence Center, we’re not just providing our customers with the most advanced NIL systems; we’re also working closely with them during product development to help them determine how best to optimize their product designs and processes to take advantage of the resolution and cost-of-ownership benefits that NIL brings.”

The new NILPhotonics Competence Center builds on more than 15 years of NIL experience at EVG with the largest installed base of NIL systems worldwide. EVG’s NIL equipment portfolio includes the recently introduced EVG7200 UV-NIL system, which supports EVG’s next-generation SmartNIL large-area soft NIL process for high-volume manufacturing. The EVG7200 with SmartNIL provides unmatched throughput and cost-of-ownership advantages over competing NIL approaches.