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In its upcoming Mid-Year Update to The McClean Report 2018 (to be released at the end of July), IC Insights forecasts that the 2018 global electronic systems market will grow 5% to $1,622 billion while the worldwide semiconductor market is expected to surge by 14% this year to $509.1 billion, exceeding the $500.0 billion level for the first time.  If the 2018 forecasts come to fruition, the average semiconductor content in an electronic system will reach 31.4%, breaking the all-time record of 28.8% that was set in 2017 (Figure 1).

Figure 1

Historically, the driving force behind the higher average annual growth rate of the semiconductor industry as compared to the electronic systems market is the increasing value or content of semiconductors used in electronic systems.  With global unit shipments of cellphones (-1%), automobiles (3%), and PCs (-1%) forecast to be weak in 2018, the disparity between the moderate growth in the electronic systems market and high growth of the semiconductor market is directly due to the increasing content of semiconductors in electronic systems.

While the trend of increasing semiconductor content has been evident for the past 30 years, the big jump in the average semiconductor content in electronic systems in 2018 is expected to be primarily due to the huge surge in DRAM and NAND flash ASPs and average electronic system sales growth this year. After slipping to 30.2% in 2020, the semiconductor content percentage is expected to climb to a new high of 31.5% in 2022.  IC Insights does not anticipate the percentage will fall below 30% any year through the forecast period.

The trend of increasingly higher semiconductor value in electronic systems has a limit.  Extrapolating an annual increase in the percent semiconductor figure indefinitely would, at some point in the future, result in the semiconductor content of an electronic system reaching 100%.  Whatever the ultimate ceiling is, once it is reached, the average annual growth for the semiconductor industry will closely track that of the electronic systems market (i.e., about 4%-5% per year).

Micron (Nasdaq:MU) and Intel today announced an update to their 3D XPoint™ joint development partnership, which has resulted in the development of an entirely new class of non-volatile memory with dramatically lower latency and exponentially greater endurance than NAND memory.

The companies have agreed to complete joint development for the second generation of 3D XPoint technology, which is expected to occur in the first half of 2019. Technology development beyond the second generation of 3D XPoint technology will be pursued independently by the two companies in order to optimize the technology for their respective product and business needs.

The two companies will continue to manufacture memory based on 3D XPoint technology at the Intel-Micron Flash Technologies (IMFT) facility in Lehi, Utah.

“Micron has a strong track record of innovation with 40 years of world-leading expertise in memory technology development, and we will continue driving the next generations of 3D XPoint technology,” said Scott DeBoer, executive vice president of Technology Development at Micron. “We are excited about the products that we are developing based on this advanced technology which will allow our customers to take advantage of unique memory and storage capabilities. By developing 3D XPoint technology independently, Micron can better optimize the technology for our product roadmap while maximizing the benefits for our customers and shareholders.”

“Intel has developed a leadership position delivering a broad portfolio of Optane products across client and data center markets with strong support from our customers,” said Rob Crooke, senior vice president and general manager of Non-Volatile Memory Solutions Group at Intel Corporation. “Intel Optane’s direct connection to the world’s most advanced computing platforms is achieving breakthrough results in IT and consumer applications. We intend to build on this momentum and extend our leadership with Optane, which combined with our high-density 3D NAND technology, offer the best solutions for today’s computing and storage needs.”

By Shannon Davis

Steve Jobs. Benjamin Franklin. Albert Einstein. Marie Curie. What do these world-changers all have in common? Where did their drive to innovate come from? Melissa Schilling, PhD, had to find out.

“Innovation and creativity has been a hot area of research for a long time, but we don’t tend to study outliers and in part that’s because there’s methodological challenges with that,” she explained to the audience during her keynote address on Tuesday at SEMICON West 2018.

Melissa Schilling, PhD, New York University

So, the New York University professor created a multiple case study research project to tackle these questions, which are addressed at length in her latest book, “Quirky: The Remarkable Story of the Traits, Foibles, and Genius of Breakthrough Innovators Who Changed the World.” Her book invites us into the lives of eight world-famous game-changers — Albert Einstein, Benjamin Franklin, Elon Musk, Dean Kamen, Nikola Tesla, Marie Curie, Thomas Edison, and Steve Jobs – and identifies the common traits and experiences that drove them to make spectacular breakthroughs, again and again. Schilling believed that once we understand what makes someone a serial innovator; we can also understand the breakthrough innovation potential in all of us.

The first common trait Schilling identified in her research was a sense of separateness – a discovery that she found remarkable.

“I thought most people would be super connected with lots of diverse connections,” she said. “I was wrong about that. Every single person I studied, with the exception of Benjamin Franklin, had this…feeling of detachment.”

Einstein, said Schilling, even went so far as to say he didn’t need direct contact with individual humans, even his own family. Marie Curie and her husband eventually sent both of their daughters to be raised by their grandparents, so that they could devote more time to their research. Dean Kamen’s feelings of separateness helped to shield him when his peers didn’t believe it was possible to create a two-wheeled wheelchair (which we now know as the Segway).

What can we learn from this? “First thing we have to learn is that we need norms that permit people to be unorthodox,” said Schilling. “We need to be able to embrace weirdness.”

Schilling pushed back against the idea of brainstorming teams in the tech world, a practice she says has potential innovators stuck putting out ideas that are more likely to get consensus from the rest of their team. She instead suggested to allow employees to work alone first, to commit to an idea and elaborate on it before sharing it with a team.

“Brainstorming teams cause people to come to mediocre compromises,” she said.

The second shared trait of serial innovators Schilling discussed was self-efficacy.

“Self-efficacy is that faith you have that you can overcome obstacles to achieve your goals and it makes you take on bigger projects,” Schilling explained.

She pointed to Elon Musks’ persistence in developing reusable rockets, in spite of NASA’s claims that it couldn’t be done, and Nikola Tesla’s dream of harnessing the power of Niagara Falls to provide electricity, despite having only seen a picture of Niagara on a postcard when he was a child in Croatia.

“Encourage people to try even if they fail,” she said, and warned against rescuing people who could benefit from learning things on their own.

The third trait Schilling outlined was one she said seven of the eight innovators possessed, which was having an intensely idealistic goal that mattered more to them than just about anything else.

“When you have an idealistic goal that people in your company can identify with, they’re going to work harder, they’re going to work longer, they’re going to think bigger, and they’re going to love it more,” she said.

And while timing and luck often did play an undeniable role in many of the serial innovators lives, Schilling was most surprised to learn that access to capital didn’t affect her research subjects’ abilities to innovate.

“Every single one of these people… started out flat broke,” she said. “They did not become innovators because they had access to capital.”

What was more important, she said, was their access to other people who had resources.

“One of the most valuable things you can do is help connect people to the other people they need,” she concluded.

Multi-Trigger chemistry, which is designed specifically for EUV, creates a high- chemical gradient at pattern boundaries, significantly reducing blurring and improving line-edge roughness to reduce the RLS trade off.

BY DAVID URE, ALEXANDRA MCCLELLAND and ALEX ROBINSON, Irresistible Materials, Wellesley, MA and Birmingham, U.K.

The semiconductor industry has invested billions of dollars to develop extreme ultraviolet (EUV) lithography and high-volume deployment of the technology is imminent. However, EUV lithography is not yet a complete solution. Most notably, new photoresist materials that enable the full benefits of EUV have yet to be developed.

While incremental modifications of incumbent ‘chemically amplified resists’ will be used for the planned initial EUV introduction in 2019, there are presently no clear solutions that address the industry feature size targets, defectivity requirements, and sensitivity needs for 2020 and onwards. This is a significant concern and continues to cast a shadow over the industry’s long anticipated switch to EUV lithography. Indeed, the lack of a suitable resist for EUV lithography is now one of the biggest problems faced by the semiconductor industry.

What makes a good resist?

The critical performance parameters for any successful resist are: 1) Resolution (R): How narrow the lines on a microchip are, 2) Line-edge roughness LER (L): How ‘wobbly’ the lines are; and 3) Sensitivity (S): How small a dose of radiation is required (how quickly the pattern can be formed). These performance metrics are known as the RLS targets, and they are set out in the ITRS. For a given material, these metrics have a conflicting relationship (one can only be improved at the cost of another): The ‘RLS tradeoff’. For a given material, improving one or two of the metrics leads to a loss in the third. To improve the RLS tradeoff, it is necessary to move to a new RLS graph. This can only be done by changing the resist material as illustrated in FIGURE 1.

In addition to the primary RLS targets, there are a series of critical secondary peformance metrics a commercially successful resist system needs to address, including the ability to pattern with extraordinarily low level of defects, high durability in the post processing steps, ultra-low contamination levels and wide process latitude.

The limitations with current state-of-art resist technology

Existing state-of-the-art photoresists are polymer- based platforms known as Chemically Amplified Resists (or CARs). The original CAR was based on a poly(hydroxystryene) chain with acid-labile tBOC protecting groups on the phenols, mixed with a photoacid generator. The photoacid released upon light exposure diffused through the polymer matrix catalytically removing the protecting groups, leading to a strong change in the solubility. While modern chemically amplified resists have increased in complexity, often using proprietary co-polymers with multiple functional units to address etch durability, adhesion and other properties, the core mechanisms of patterning have remained the same as the original CAR technology.

Such materials have demostrated significant design flexibility to address the evolving needs of the lithog- raphy industry. However, as feature sizes have continued to shrink, the diffuse nature of the acid – required for high senstitivity – has hampered resolution, and the acid quenchers, added to address this, have driven defects and roughness up. These limitations have risen to the fore as the industry prepares for the introduction of EUV lithography and the targeted feature sizes are increas- ingly incompatible with CAR technology.

Solving the EUV resist problem?

Given the limitations of polymer-platform photoresists originally developed for 193nm lithography, as the industry prepares for EUV introduction, the approach to photoresist development is being challenged. Indeed, device manufacturers and scanner suppliers have urged the photoresist suppliers to consider novel approaches to design photoresist systems specifically to meet the needs of EUV lithography.

One of the new photoresist platforms that has risen to prominence has been given the name ‘molecular resist’ because it represents a departure from polymer- based photoresists to formulations based around ‘small molecules.’ Originally developed to reduce the chemical ‘pixel’ size of the resist, this platform has demonstrated promise in reducing line-edge roughness, but until recently has not fulfilled its early promise in EUV.

Another novel approach has been the development of metal-oxide resist platforms. These have demonstrated a compelling combination of high resolution, and low-line edge roughness, and sensitivities have improved recently. However, like other contenders, these materials currently demonstrate high defects and face a hurdle due to concerns over the use of metals in a cleanroom environment.

Another leading new ‘EUV specific’ resist system is being developed by Irresistible Materials Ltd (IM), a company headquartered in Birmingham, England. IM has developed a new approach to achieve high-resolution, high sensitivity, and a low LER resist called the Multi-Trigger Resist platform(MTR). MTRs comprise a small proprietary resin molecule; an MTR process compatible cross-linker; and (like a chemically amplified resist) a photo-acid generator (PAG). However, the novel Multi-Trigger chemistry creates a high-chemical gradient at pattern boundaries, significantly reducing blurring and improving line-edge roughness to reduce the RLS trade off (FIGURE 2).

In a Multi-Trigger material, resist exposure proceeds via a catalytic process in a similar manner to a chemically amplified resist. However, instead of a single photoacid causing a single deprotection event and then being regen- erated, the Multi-Trigger resist uses multiple photoacids to activate multiple acid sensitive molecules, which then react with each other to cause a single resist event while also regenerating the photoacids. Importantly, it is only when two complimentary activated molecules react with each other that the resist is exposed – a single activated molecule, which is not near another will quench the acid, and remain unexposed.

In areas with a high number of activated photoacids (higher dose areas, for instance at the centre of a pattern feature), resist components are activated in close proximity and the multi-step resist exposure reaction proceeds, ending with photoacids regeneration and thus further reactions, ensuring high sensitivity. In areas with only a low number of activated photoacids (lower dose areas, for instance at the edge of a pattern feature), the activated resist components are too widely separated to react and the photoacids are thus removed, stopping the catalytic chain. The Multi- Trigger resist creates an increase in the chemical gradient at the edge of patterned features and reduces undesirable acid diffusion out of the patterned area. FIGURE 3 and 4 illustrate how the Multi-Trigger approach departs from the traditional approach used in existing state-of-the-art resist systems (CARs).

How good is the MTR system and where is it in its development cycle?

The MTR system is presently in an advanced development phase. Results have already shown this system can match and exceed the performance capabilities of state-of-the- art CARs. Furthermore, the specific formulation of the MTR system can be tailored by changing the ratio of the components within the resist. To date, IM has demonstrated that the sensitivity of the resist can be varied from 12 mJ/cm2 to over 50 mJ/cm2, with the patterned resolution ranging from 20nm half pitch to under 16nm half pitch respectively, to meet varying lithographic requirements.

Some example data from the ASML NXE 3300 scanner at IMEC in Belgium is included for reference below. ASML’s NXE platform is the industry’s first production platform for extreme ultraviolet lithography (EUVL), using 13.5 nm EUV light, generated by a tin-based plasma source.

FIGURE 5 shows results for 20nm half-pitch lines patterned on a pitch of 40nm. At a dose of 44.5 mJ/cm2, the LER is 2.6nm. FIGURE 6 shows 16nm half-pitch lines patterned on a pitch of 32nm. At a dose of 38.5 mJ/cm2, the LER is 3.7nm (unbiased values). These LER values compare very favorably with existing state-of-the-art CAR resists modified for EUV lithography. Importantly, the MTR technology is at the very beginning of its optimization cycle, with significant further performance enhancements expected as the technology matures. To this end, IM is in the process of scaling operations to accelerate the optimization of the MTR system in preparation for commercial launch.

The roadmap to commercial readiness

Prior to commercial integration into a Fab, it is also critical to address the ‘secondary’ performance metrics previously discussed. It is these tests that often prove a stumbling block to progressing from a promising new material. For an SME such as Irresistible Materials, passing this testing is a challenge as often new infrastructure and a specialist, custom tool set is required to pass stringent tests such as contamination. A resist that meets all lithography criteria could still fail to be adopted if, for example, the solubility of the components has not be synthesised with the required solubility in common fabrication solvents which will be present in the waste system.

For IM’s MTR, a precipitation test using waste drain solvents passed the precipitation test with no precipitate optically visible. These results indicate that the IM resist can be used within a fabrication facility with no precipitation issues. The resist also passes outgassing requirements so that it does not contaminate the lithog- raphy tool. Furthermore, because the resist is not metal based, there are no inherent track contamination issues. Metallic ion migration is a key concern for advanced device manufacturers and IM has implemented several protocols to address metal ion related concerns — the current contaminant metal levels are below 15ppb for each individual metal and will reduce further as production system are optimized.

Another major step in the commercialization roadmap is the ability to produce material in a quality controlled, high-volume manufacturing process at commercially competitive costs. To address this requirement, IM has established a partnership with Nano-C for the high- volume supply of IM’s proprietary resin molecule. Nano-C, Inc. is a leading supplier of specialist small molecules and has recently doubled the footprint at its Massachusetts site as preparations are made to scale production of the IM materials.

Looking towards the future

IM is targeting launch of its initial MTR products in 2020 (to address the industry N5 node),and is presently engaged in a variety of tests/trials with potential end-user and distribution partners as the resist system is optimized, scaled and readied for commercial release. However, IM also recognizes the potential of this resist system to go beyond N5 and has a clear pathway for addressing future industry nodes, to N3 and potentially beyond. Notable upgrade pathways from the gen 1 MTR include optimizing the metastable nature of the proton quenching, increasing opacity, reducing the number of components in the resist to reduce the impact of stochastics, and optimizing the ancillary process.

By Pete Singer

Increasingly complicated 3D structures such finFETs and 3D NAND require very high aspect ratio etches. This, in turn, calls for higher gas flow rates to improve selectivity and profile control. Higher gas flow rates also mean higher etch rates, which help throughput, and  higher rates of removal for etch byproducts.

“Gas flow rates are now approaching the limit of the turbopump,” said Dawn Stephenson, Business Development Manager – Chamber Solutions at Edwards Vacuum. “No longer is it only the process pressure that’s defining the size of the turbopump, it’s now also about how much gas you can put through the turbopump.”

Turbopumps operate by spinning rotors at very high rates of speed (Figure 1). These rotors propel gases and process byproducts down and out of the pump. The rotors are magnetically levitated (maglev) to reduce friction and increase rotor speed.

Figure 1. Spinning rotors propel gases and process byproducts out of the pump.

The challenge starts with processes that have high gas flow rates, over a thousand sccm, and lower chamber pressures, below 100 mTorr.  Such processes include chamber clean steps where high flows of oxygen-containing gases are used to remove and flush the process byproducts from inside the chamber, through Silicon via (TSV) in which SF6is widely used at high gas flowrates for deep silicon reactive ion etch (RIE) and more recently, gaseous chemical oxide removal (COR) which typically uses HF and NH3to remove oxide hard masks.

However, the challenge is intensified with the more general trend to higher aspect ratio etch across all technologies.

Stephenson said the maximum amount of gas you can put through a maglev turbo is determined by two things: the motor power and the rotor temperature. Both of these are affected adversely by the molecular weight of the gas. “The heavier the molecule, the lower the limit. For motor power, if the gas flow rate is increased, the load on the rotor is increased, and then you need more power. Eventually you reach a gas flow at which you exceed the amount of power you have to keep the rotor spinning and it will slow down,” she said.

The rotor temperature is an even bigger limiting factor. “As gas flow rates increase, the number of molecules hitting the rotor are increased. The amount of energy transferred into the rotors is also increased which elevates the temperature of the rotor. Because the rotor is suspended in a vacuum and because it’s levitated, it’s not very easy to remove that heat from the rotor because its primary thermal transfer is through radiation,” she explained.

Pumping heavier gases, particularly ones that have poor thermal conductivity, cause the rotor temperature to rise, leading to what is known as “rotor creep.”Rotor creep is material growth due to high temperature and centrifugal force (stress).  Rotor creep deformation over time narrows clearances between rotor and stator and can eventually lead to contact and catastrophic failure (Figure 2).

Figure 2. Edwards pumps have the highest benchmark for rotor creep life temperature in the industry, due to the use of a premium aluminum alloy as the base material for its mag-lev rotors, combined with a low stress design.

Where it gets even worse are in applications where the turbopump is externally heated to reduce byproduct deposition inside the pump. Such a heated pump will have a higher baseline rotor temperature and significantly lower allowable gas flowrates than an unheated one. This becomes a challenge particularly for the heated turbopumps on semiconductor etch and flat panel display processes using typical reactant gases such as HBr and SF6.  “Those are very heavy gases with low thermal conductivity and the maximum limit of the turbopump is actually quite low,” Stephenson said.

The good news is that Edwards has been diligently working to overcome these challenges. “What we have done to maximize the amount of gas you can put into our turbopumps is to  ensure our rotors can withstand the highest possible temperature design limit for a 10 year creep lifetime.   We use a premium alloy for the base rotor material and then beyond that we have done a lot of work with our proprietary modeling techniques to design a very low stress rotor because the creep is due to two factors: the temperature and the centrifugal stress. Because of those two things combined, we’re able to achieve the highest benchmark for rotor creep life temperature in the industry,” she said.

Furthermore, the company has worked on thermal optimization of the turbopump platform. “That means putting in thermal isolation where needed to try to help keep the rotor and motor cool. At the same time, we also need to keep the gas path hot to stop byproducts from depositing. We have also released a high emissivity rotor coating that helps keep the rotor cool,” Stephenson said. A corrosion resistant, black ceramic rotor coating is used to maximize heat radiation, which helps keep the rotor cool and gives more headroom on gas flowrate before the creep life temperature is reached.

Edwards has also developed a unique real-time rotor temperature sensor: Direct, dynamic rotor temperature reporting eliminates over-conservative estimated max gas flow limits and allows pump operation at real maximum gas flow in real duty cycle while maintaining safety and lifetime reliability.

In summary, enabling higher flows at lower process pressures is becoming a critical capability for advanced Etch applications, and Edwards have addressed this need with several innovations, including optimized rotor design to minimize creep, high emissivity coating, and real time temperature monitoring.

By Ed Korcynzski

Industry R&D consortium imec runs a series of technology forums around the world, starting in June in Antwerp, Belgium, and including a stop in July in San Francisco in coordination with SEMICON West. Greg McIntyre, imec Director of Advanced Patterning, discussed the state-of-the-art in Extreme Ultra-Violet (EUV) lithography technology with Solid State Technology during the Antwerp event. While still focusing on “path-finding” R&D for industry, the recent technology challenges associated with commercializing EUV lithography has pulled imec into work on patterning ecosystem materials such as resists and pellicles.

With each NXE:3400B model EUV stepper from ASML valued at US$125 million it costs $1 billion to invest in a set of 8 tools to begin high-volume manufacturing, and the entire lithography materials supply-chain is engaged in improving availability and throughput of this expensive tool-set. For high performance logic ICs we need EUV to reach the smallest and most powerful FETs possible, so EUV is in pilot production for logic chips at Samsung and TSMC this year, and will likely begin pilot ramps at Intel and GlobalFoundries next year.

The first use of EUV in IC HVM will be as “cut-masks” for use in self-aligned multi-patterning (SAMP) process flows that start with argon-fluoride-immersion (ArFi) deep ultra-violet (DUV) steppers. Such a first use allows for substitution of three ArFi “multi-color” cut-masks in place of the one EUV mask, in case there are unanticipated issues with the new EUV steppers. Second use in HVM will then happen using a single-exposure of EUV to pattern metal layers, but with no ability to use multiple ArFi exposure as a back-up.

“We will not put EUV in our critical path,” commented Dr. Gary Patton, GlobalFoundries’ CTO and SVP of Worldwide R&D, during a presentation in Antwerp, “But it’s clear that it’s coming and it will offer compelling advantages.” Patton said the company is experimenting with two of ASML’s EUV steppers in a New York fab, and will launch the company’s “7-nm-node” finFET production first with ArFi and then move to EUV when the throughput and uptime of the process make it affordable in their cost models.

Figure 1 shows the extremely small patterning process window around 18nm half-pitch line arrays (P36) using EUV lithography with Dipole source-mask optimization (SMO):  micro-bridging between lines starts below 15.5nm, while breaks within lines start above 18nm. These stochastic failures (Ref:  “Waddle-room for Black Swans:  EUV Stochastics”, SemiMD.com) are caused by variations in the photons absorbed by the resist (a.k.a. “shot noise”), the quantum efficiency of photo-acid generation (PAG) and diffusion, thequencher distribution,and optical and chemical interactions with under-layers for adhesion, anti-reflective coatings, and hardmasks.

Figure 1. Stochastic failures due to atomic-scale variability are shown in top-down CD-SEM images taken from 36-nm Pitch (P36) line/space arrays of post-etched photoresist that had been patterned using EUV lithography, which define the limits of the patterning process window when plotted as Percent Not-OK (%NOK) within an inspected area. (Source: imec)

Every nanometer of resolution is difficult to achieve when patterning below 20nm half-pitch, with many parameters contributing noise to the signal. For EUV lithography using reflective optics, the mask surface causes undesired “flare” reflections from the un-patterned area, such that bright-field masks inherently distort images more than dark-field masks. Since cuts typically only expose <20% of the field, these masks will be much less noisy as dark-fields.

Given the need for dark-field cut-masks, the ideal photoresist will be positive-tone (PT) which means that reformulations of Chemically-Amplified Resists (CAR) based on organic molecules can be used. Standard organic CAR tuned for ArFi lithography provides some sensitivity to EUV, and blends of standard CAR molecules can be tuned to improve trade-offs within the inherent Resolution, Line-Edge-Roughness (LER), and Sensitivity trade-off triangle. Consequently, all of the suppliers of ArFi CAR are capable of supplying some EUV CAR. Since stochastic effects are interdependent, resist vendors have to explore integration options within the entire stack of patterning materials.

JSR co-founded with imec the EUV Resist Manufacturing & Qualification Center NV (EUV RMQC) in Leuven, Belgium, where an EUV stepper at imec is available for experiments. “RMQC is running at full speed, and shipping out production lots,” said McIntyre. “Intel’s Britt Turkot mentioned at SPIE this year that the resist qualification work being done at IMEC has been very beneficial.”

ASML now owns the critical-dimension scanning-electron microscopy (CD-SEM) technology of Hermes Microvision Inc (HMI), and Neal Callan, ASML’s Vice President of Pattern Fidelity Metrology, spoke with Solid State Technologyabout controlling EUV patterning. Electron-beams cause shrinkage in organic films like CAR, and that shrinkage results in a CD bias that can be more than one nanometer. Different CAR formulations from different vendors shrink at different rates, and the effect is more difficult to model in 2D structures. ”We’re being pushed for accurate metrology in terms that can be quantified,” explained Callan. “The biggest issues are in terms of CD-bias with 2D features. We need to build more accurate models to create better data for OPC and for computational lithography, and also for our etch modeling peers.”

“Design rules for EUV need to be stochastically aware,“ confided McIntyre. “Designers need to know how much can be sacrificed in a design rule such as tip-to-tip spacing depending on the pattern pitch. There are different ways that we can think about minimizing stochastic effects.”

While stochastics and systematic yield losses increase in relative importance with decreasing device dimensions, losses due to random defects are also more difficult to control. Figure 2 shows second-generation EUV pellicles made from carbon nano-tubes (CNT) by imec to protect EUV masks from random particles while transmitting ~95%. First-generation pellicles reportedly transmit <90%.

Figure 2. Second generation EUV pellicles based on carbon nano-tubes (CNT) demonstrate increased transmission of ~95% while maintaining sufficient mechanical stability to protect reticles. (Source: imec)

“Today, new purity challenges are not only faced by the fab but also by their materials suppliers driving sharp increases in the use of filtration and purification systems to prevent wafer defects and process excursions,” explained Clint Harris, Senior Vice President and General Manager, Microcontamination Control Division, Entegris, to Solid State Technology.“The transition from 45nm- to 10nm-node has resulted in a 2.5x increase in the changeout frequency of filters as well as a 4x reduction of maximum allowable contaminant size. This trend is expected to continue as device parametric performance becomes more sensitive to particles, gels, metals, mobile ions, and other organic contaminants.”

[As a TECHCET Analyst, Ed Korczynski writes the TECHCET Critical Materials Report (CMR) on Photoresists & Ancillaries. https://techcet.com/product/photoresists-and-photoresist-ancillaries/]

The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, today announced worldwide sales of semiconductors reached $38.7 billion for the month of May 2018, an increase of 21.0 percent compared to the May 2017 total of $32.0 billion. Global sales in May were 3 percent higher than the April 2018 total of $37.6 billion. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average.

“The global semiconductor market has posted consistent growth of greater than 20 percent for 14 consecutive months, and May 2018 marked the industry’s highest-ever monthly sales,” said John Neuffer, president and CEO, Semiconductor Industry Association. “The Americas led the way once again, with sales increasing by more than 30 percent compared to last year, and sales were up across all major semiconductor product categories on both a year-to-year and month-to-month basis.”

Year-to-year sales increased solidly across all regions: the Americas (31.6 percent), China (28.5 percent), Europe (18.7 percent), Japan (14.7 percent), and Asia Pacific/All Other (8.7 percent). Month-to-month sales increased more modestly across all regions: China (6.3 percent), Japan (2.6 percent), Asia Pacific/All Other (1.2 percent), the Americas (1.1 percent), and Europe (1.0 percent).

If your laptop or cell phone starts to feel warm after playing hours of video games or running too many apps at one time, those devices are actually doing their job.

Whisking heat away from the circuitry in a computer’s innards to the outside environment is critical: Overheated computer chips can make programs run slower or freeze, shut the device down altogether or cause permanent damage.

As consumers demand smaller, faster and more powerful electronic devices that draw more current and generate more heat, the issue of heat management is reaching a bottleneck. With current technology, there’s a limit to the amount of heat that can be dissipated from the inside out.

Researchers at the University of Texas at Dallas and their collaborators at the University of Illinois at Urbana-Champaign and the University of Houston have created a potential solution, described in a study published online July 5 in the journal Science.

Researchers at the University of Texas at Dallas and their collaborators have created and characterized tiny crystals of boron arsenide, like the one shown here imaged with an electron microscope, that have high thermal conductivity. Because the semiconducting material efficiently transports heat, it might be used in future electronics to help keep smaller, more powerful devices from overheating. The research is described in a study published online July 5, 2018 in the journal Science. Credit: University of Texas at Dallas

Bing Lv (pronounced “love”), assistant professor of physics in the School of Natural Sciences and Mathematics at UT Dallas, and his colleagues produced crystals of a semiconducting material called boron arsenide that have an extremely high thermal conductivity, a property that describes a material’s ability to transport heat.

“Heat management is very important for industries that rely on computer chips and transistors,” said Lv, a corresponding author of the study. “For high-powered, small electronics, we cannot use metal to dissipate heat because metal can cause a short circuit. We cannot apply cooling fans because those take up space. What we need is an inexpensive semiconductor that also disperses a lot of heat.”

Most of today’s computer chips are made of the element silicon, a crystalline semiconducting material that does an adequate job of dissipating heat. But silicon, in combination with other cooling technology incorporated into devices, can handle only so much.

Diamond has the highest known thermal conductivity, around 2,200 watts per meter-kelvin, compared to about 150 watts per meter-kelvin for silicon. Although diamond has been incorporated occasionally in demanding heat-dissipation applications, the cost of natural diamonds and structural defects in manmade diamond films make the material impractical for widespread use in electronics, Lv said.

In 2013, researchers at Boston College and the Naval Research Laboratory published research that predicted boron arsenide could potentially perform as well as diamond as a heat spreader. In 2015, Lv and his colleagues at the University of Houston successfully produced such boron arsenide crystals, but the material had a fairly low thermal conductivity, around 200 watts per meter-kelvin.

Since then, Lv’s work at UT Dallas has focused on optimizing the crystal-growing process to boost the material’s performance.

“We have been working on this research for the last three years, and now have gotten the thermal conductivity up to about 1,000 watts per meter-kelvin, which is second only to diamond in bulk materials,” Lv said.

Lv worked with postdoctoral research associate Sheng Li, co-lead author of the study, and physics doctoral student Xiaoyuan Liu, also a study author, to create the high thermal conductivity crystals at UT Dallas using a technique called chemical vapor transport. The raw materials — the elements boron and arsenic — are placed in a chamber that is hot on one end and cold on the other. Inside the chamber, another chemical transports the boron and arsenic from the hot end to the cooler end, where the elements combine to form crystals.

“To jump from our previous results of 200 watts per meter-kelvin up to 1,000 watts per meter-kelvin, we needed to adjust many parameters, including the raw materials we started with, the temperature and pressure of the chamber, even the type of tubing we used and how we cleaned the equipment,” Lv said.

David Cahill and Pinshane Huang’s research groups at the University of Illinois at Urbana-Champaign played a key role in the current work, studying defects in the boron arsenide crystals by state-of-the-art electron microscopy and measuring the thermal conductivity of the very small crystals produced at UT Dallas.

“We measure the thermal conductivity using a method developed at Illinois over the past dozen years called ‘time-domain thermoreflectance’ or TDTR,” said Cahill, professor and head of the Department of Materials Science and Engineering and a corresponding author of the study. “TDTR enables us to measure the thermal conductivity of almost any material over a wide range of conditions and was essential for the success of this work.”

The way heat is dissipated in boron arsenide and other crystals is linked to the vibrations of the material. As the crystal vibrates, the motion creates packets of energy called phonons, which can be thought of as quasiparticles carrying heat. Lv said the unique features of boron arsenide crystals — including the mass difference between the boron and arsenic atoms — contribute to the ability of the phonons to travel more efficiently away from the crystals.

“I think boron arsenide has great potential for the future of electronics,” Lv said. “Its semiconducting properties are very comparable to silicon, which is why it would be ideal to incorporate boron arsenide into semiconducting devices.”

Lv said that while the element arsenic by itself can be toxic to humans, once it is incorporated into a compound like boron arsenide, the material becomes very stable and nontoxic.

The next step in the work will include trying other processes to improve the growth and properties of this material for large scale applications, Lv said.

By integrating the design of antenna and electronics, researchers have boosted the energy and spectrum efficiency for a new class of millimeter wave transmitters, allowing improved modulation and reduced generation of waste heat. The result could be longer talk time and higher data rates in millimeter wave wireless communication devices for future 5G applications.

The new co-design technique allows simultaneous optimization of the millimeter wave antennas and electronics. The hybrid devices use conventional materials and integrated circuit (IC) technology, meaning no changes would be required to manufacture and package them. The co-design scheme allows fabrication of multiple transmitters and receivers on the same IC chip or the same package, potentially enabling multiple-input-multiple-output (MIMO) systems as well as boosting data rates and link diversity.

Researchers from the Georgia Institute of Technology presented their proof-of-concept antenna-based outphasing transmitter on June 11 at the 2018 Radio Frequency Integrated Circuits Symposium (RFIC) in Philadelphia. Their other antenna-electronics co-design work was published at the 2017 and 2018 IEEE International Solid-State Circuits Conference (ISSCC) and multiple peer-reviewed IEEE journals. The Intel Corporation and U.S. Army Research Office sponsored the research.

Georgia Tech researchers are shown with electronics equipment and antenna setup used to measure far-field radiated output signal from millimeter wave transmitters. Shown are Graduate Research Assistant Huy Thong Nguyen, Graduate Research Assistant Sensen Li, and Assistant Professor Hua Wang. (Credit: Allison Carter, Georgia Tech)

“In this proof-of-example, our electronics and antenna were designed so that they can work together to achieve a unique on-antenna outphasing active load modulation capability that significantly enhances the efficiency of the entire transmitter,” said Hua Wang, an assistant professor in Georgia Tech’s School of Electrical and Computer Engineering. “This system could replace many types of transmitters in wireless mobile devices, base stations and infrastructure links in data centers.”

Key to the new design is maintaining a high-energy efficiency regardless whether the device is operating at its peak or average output power. The efficiency of most conventional transmitters is high only at the peak power but drops substantially at low power levels, resulting in low efficiency when amplifying complex spectrally efficient modulations. Moreover, conventional transmitters often add the outputs from multiple electronics using lossy power combiner circuits, exacerbating the efficiency degradation.

“We are combining the output power though a dual-feed loop antenna, and by doing so with our innovation in the antenna and electronics, we can substantially improve the energy efficiency,” said Wang, who is the Demetrius T. Paris Professor in the School of Electrical and Computer Engineering.  “The innovation in this particular design is to merge the antenna and electronics to achieve the so-called outphasing operation that dynamically modulates and optimizes the output voltages and currents of power transistors, so that the millimeter wave transmitter maintains a high energy efficiency both at the peak and average power.”

Beyond energy efficiency, the co-design also facilitates spectrum efficiency by allowing more complex modulation protocols. That will enable transmission of a higher data rate within the fixed spectrum allocation that poses a significant challenge for 5G systems.

“Within the same channel bandwidth, the proposed transmitter can transmit six to ten times higher data rate,” Wang said. “Integrating the antenna gives us more degrees of freedom to explore design innovation, something that could not be done before.”

Sensen Li, a Georgia Tech graduate research assistant who received the Best Student Paper Award at the 2018 RFIC symposium, said the innovation resulted from bringing together two disciplines that have traditionally worked separately.

“We are merging the technologies of electronics and antennas, bringing these two disciplines together to break through limits,” he said. “These improvements could not be achieved by working on them independently. By taking advantage of this new co-design concept, we can further improve the performance of future wireless transmitters.”

The new designs have been implemented in 45-nanometer CMOS SOI IC devices and flip-chip packaged on high-frequency laminate boards, where testing has confirmed a minimum two-fold increase in energy efficiency, Wang said.

The antenna electronics co-design is enabled by exploring the unique nature of multi-feed antennas.

“An antenna structure with multiple feeds allows us to use multiple electronics to drive the antenna concurrently. Different from conventional single-feed antennas, multi-feed antennas can serve not only as radiating elements, but they can also function as signal processing units that interface among multiple electronic circuits,” Wang explained. “This opens a completely new design paradigm to have different electronic circuits driving the antenna collectively with different but optimized signal conditions, achieving unprecedented energy efficiency, spectral efficiency and reconfigurability.”

The cross-disciplinary co-design could also facilitate fabrication and operation of multiple transmitters and receivers on the same chip, allowing hundreds or even thousands of elements to work together as a whole system. “In massive MIMO systems, we need to have a lot of transmitters and receivers, so energy efficiency will become even more important,” Wang noted.

Having large numbers of elements working together becomes more practical at millimeter wave frequencies because the wavelength reduction means elements can be placed closer together to achieve compact systems, he pointed out. These factors could pave the way for new types of beamforming that are essential in future millimeter wave 5G systems.

Power demands could drive adoption of the technology for battery-powered devices, but Wang says the technology could also be useful for grid-powered systems such as base stations or wireless connections to replace cables in large data centers. In those applications, expanding data rates and reducing cooling needs could make the new devices attractive.

“Higher energy efficiency also means less energy will be converted to heat that must be removed to satisfy the thermal management,” he said. “In large data centers, even a small reduction in thermal load per device can add up. We hope to simplify the thermal requirements of these electronic devices.”

In addition to those already mentioned, the research team included Taiyun Chi, Huy Thong Nguyen and Tzu-Yuan Huang, all from Georgia Tech.

Global semiconductor industry revenue declined 3.4 percent in the first quarter of 2018 falling to $115.8 billion. Semiconductor industry performance was negatively affected by the declining sales and first-quarter seasonality in the wireless communications market. Other sectors, such as automotive and consumer semiconductors, experienced nominal market growth, according to IHS Markit (Nasdaq: INFO).

The memory category experienced the highest growth of 1.7 percent in the first quarter, reaching $39.7 billion, as demand for memory components increased in the enterprise and storage markets. In fact, DRAM pricing and shipments both increased during the quarter, as strong demand for server DRAM continued to propel the semiconductor market. However, NAND began to show signs of softening, with slight revenue declines during the quarter, mainly due to single-digit price declines. “Even with the slight revenue decline during the quarter, the NAND market still achieved its second-highest revenue quarter on record, with strong demand coming from the enterprise and client solid-state drive markets,” said Craig Stice, senior director, memory and storage, IHS Markit.

Semiconductor market share

Led by its dominant position in the memory market, Samsung Electronics led the semiconductor industry in the first quarter of 2018, with 16.1 percent of the market, followed by Intel at 13.6 percent and SK Hynix at 7.0 percent. Quarter-over-quarter market shares were relatively flat, with no change in the top-three ranking list. However, on a year-over-year basis, Samsung supplanted Intel as the leading semiconductor company, compared to the first quarter of 2017.

Analog component sales for Texas Instruments, Maxim Integrated, ON Semiconductor and other companies with a strategic focus on industrial and automotive industries managed single-digit sales increases in the first quarter. In contrast, analog component revenue declined by double digits for Qualcomm, Skyworks Solutions, Oorvo and other companies targeting the wireless industry.

Memory IC companies — Samsung Electronics, SK Hynix, Micron Technologies and Toshiba — continued to dominate the top ten semiconductor companies. Micron achieved the highest growth rate in the top ten, recording 9.8 percent growth in the first quarter, compared to the previous quarter. Qualcomm revenue fell 13.6 percent, which was the largest sequential drop, due to the weakness in the wireless communication market. Qualcomm and nVidia were the only two fabless companies remaining in the top ten.