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The global mask alignment systems market is expected to grow at a CAGR of more than 9% during the forecast period, according to Technavio’s latest market research.

In this market research report, Technavio covers the market outlook and growth prospects of the global mask alignment systems market for 2017-2021. The market is further categorized based on application (microelectromechanical system (MEMS) devices, compound semiconductors, and LED devices) and end-user (foundry, memory, and integrated device manufacturer (IDM)).

APAC: largest mask alignment systems market

APAC has the presence of several prominent semiconductor foundries such as Taiwan Semiconductor Manufacturing Company (TSMC), Samsung, and SMIC. This has created demand for mask alignment systems in the region. The major revenue contributors to the mask alignment systems market in APAC are Taiwan, South Korea, and Japan. These countries contribute significantly to the market revenue as they are home to many leading semiconductor device manufacturers.

“In the APAC region, the presence of dominant players in the global consumer electronics and mobile devices markets such as Samsung, Sony, LG Electronics, Toshiba, and Panasonic is supporting the demand for semiconductor devices that include lithography equipment such as mask alignment systems. Furthermore, the major chip vendors in the region are investing in infrastructure development such as the construction of new fabs to increase the throughput,” says Rohan Joy Thomas, a lead semiconductor equipment research expert from Technavio.

Mask alignment systems market in EMEA

In EMEA, the demand for mask alignment systems comes mainly from companies such as Infineon Technologies, NXP Semiconductors, and STMicroelectronics. Germany and the UK are the major revenue contributors to the mask alignment systems market in EMEA due to the presence of several prominent automobile manufacturers such as AUDI, BMW, Daimler (Mercedes-Benz), and Volkswagen.

“The increased focus on safety, passenger comfort, and engine efficiency require more number of ICs and the fabrication of these ICs will need more semiconductor equipment, including mask alignment systems. This will fuel the growth of the mask alignment systems market in EMEA during the forecast period,” says Rohan.

Mask alignment systems market in the Americas

The Americas has a comparatively lower share than the other two regions. But, the Americas can expect some changes in its market share during the forecast period. Several prominent semiconductor vendors are headquartered in this region, even though their manufacturing facilities are in APAC (due to the cost-effectiveness of production in APAC). The governing authorities of the Americas are promising special packages in the form of subsidies and incentives to encourage manufacturers to bring back their production facilities to the Americas. The American Recovery and Reinvestment Act is an example of such initiatives.

The presence of prominent semiconductor manufacturers such as Global Foundries and Intel will create demand for lithography systems such as mask alignment systems during the forecast period. In addition, the region boasts of a few major car manufacturers that are looking to integrate semiconductor devices and components into their products. This will also create demand for semiconductor production equipment such as mask alignment systems from the region during the forecast period

The top vendors in the global mask alignment systems market as highlighted in this market research analysis are:

  • EV Group
  • Neutronix
  • SUSS Microtek

 

Industry enters the age of WOW


December 13, 2017

By Christian G. Dieseldorff, Industry Research & Statistics Group, SEMI, Milpitas, California

The semiconductor industry has been there before, with large increases in investments followed by dramatic downturns. While the most dramatic downturns, 2001 and 2009, were due to, in a large part, acro-economic factors, the industry has typically observed one to two years of increased investment spending followed by a down period. This time around, the industry will achieve a “WOW” with three consecutive years of fab investment growth, a pattern not observed since the mid-1990s.

Why are things different this time?  A diverse array of technology drivers promise more robust long-term growth, such as Mobile applications, Internet of Things (IoT), Automotive & Robotics, Industrial, Augmented Reality & Virtual Reality (AR&VR), Artificial Intelligence (AI), and 5G networking. Each of these new technologies inspires a big “WOW” as the industry embarks on the beginning of a promising journey of growth.

Driven by these technologies, on average the semiconductor revenue CAGR from 2016 to 2021 is forecasted to be 6 percent (in comparison to the previous 2011-2016 CAGR of 2.3 percent). For the first time in the industry’s history, semiconductor revenues will exceed the US$400 billion revenue milestone in 2017. Demand for chips is high, pricing is strong for memory, and the competition is fierce. All of this is spurring increased fab investments, with many companies investing at previously unseen levels for new fab construction and fab equipment. See Figure 1.

Figure 1

Figure 1

The World Fab Forecast report, published on December 4, 2017, by SEMI, is modeling that fab equipment spending in 2017 will total US$57 billion or 41 percent year-over-year (YoY) growth. In 2018, spending is expected to shoot up another 11 percent at US$63 billion. The two spending jumps in 2017 and 2018 are contributing to the “WOW” factor and to two consecutive years of record fab investments. Following historic large investments, some slowdown is expected for 2019.

Many companies, such as Intel, Micron, Toshiba (and Western Digital), and GLOBALFOUNDRIES, have increased fab investments in 2017 and 2018; however, the strong increases we see in both years are not caused by these companies but by one company and primarily one region. See Figure 2.

Figure 2

Figure 2

The first jump – a Big WOW – in 2017 is the surge of investments in Korea, due mainly to Samsung. Samsung is expected to increase its fab equipment spending by 128 percent in 2017 from US$8 billion to US$18 billion. No single company has invested so much in a single year in its fabs and much of its spending is in Korea. SK Hynix also increased fab equipment spending, by about 70 percent, to US$5.5 billion, its largest spending level in its history.  While the bulk of Samsung’s and SK Hynix’s spending remains in Korea, some will also go to China, and in the case of Samsung to the United States. Both Samsung and SK Hynix are expected to maintain high levels of investments for 2018.

The second jump – another WOW – is investment growth for 2018 in China. China is expected to begin equipping the many fabs that were constructed in 2017. In the past, non-Chinese companies made the majority of the fab investments in China but for the first time in 2018, Chinese-owned companies will approach parity, spending nearly as much on fab equipment as non-Chinese device manufacturers.

Between 2013 and 2017, fab equipment spending in China by Chinese-owned companies typically ranged between US$1.5 billion to US$2.5 Billion per year, while non-Chinese companies invested between US$2.5 billion to US$5 billion per year. In 2018, Chinese-owned companies are expected to invest about US$5.8 billion, while non-Chinese will invest US$6.7 billion. Many new companies such as Yangtze Memory Technology, Fujian Jin Hua, Hua Li, and Hefei Chang Xin Memory are investing heavily in the region.

New fabs being built

Historic highs in equipment spending in 2017 and 2018 reflect growing demand. This spending follows unprecedented growth in construction spending for new fabs also detailed in SEMI’s World Fab Forecast report. Construction spending will reach all-time highs with China construction spending taking the lead: US$6 billion in 2017 and US$6.6 billion in 2018, shattering another record – no region has ever spent more than US$6 billion in a single year for construction. More new fabs mean another wave of spending on equipping fabs in the next few years. See Figure 3.

Fab-forecast-Chart3

Figure 3

Considering all of these “WOW” factors, there is good reason to feel positive about the semiconductor industry. Even with a slowdown, the industry has and will continue to enjoy a positive outlook for long-term growth. In the meantime, hold on tight and enjoy the “WOW.”

More details are available in SEMI’s just-published World Fab Forecast, December 4, 2017, edition which covers quarterly data (spending, capacity, technology nodes, wafer sizes, and product types) per fab until end of 2018.

Today, SEMI, the global industry association representing the electronics manufacturing supply chain, released its Year-end Forecast at the annual SEMICON Japan exposition. SEMI projects that worldwide sales of new semiconductor manufacturing equipment will increase 35.6 percent to US$55.9 billion in 2017, marking the first time that the semiconductor equipment market has exceeded the previous market high of US$47.7 billion set in 2000. In 2018, 7.5 percent growth is expected to result in sales of US$60.1 billion for the global semiconductor equipment market – another record-breaking year.

The SEMI Year-end Forecast predicts a 37.5 percent increase in 2017, to $45.0 billion, for wafer processing equipment. The other front-end segment, which consists of fab facilities equipment, wafer manufacturing, and mask/reticle equipment, is expected to increase 45.8 percent to $2.6 billion. The assembly and packaging equipment segment is projected to grow by 25.8 percent to $3.8 billion in 2017, while semiconductor test equipment is forecast to increase by 22.0 percent to $4.5 billion this year.

In 2017, South Korea will be the largest equipment market for the first time. After maintaining the top spot for five years, Taiwan will place second, while China will come in third. All regions tracked will experience growth, with the exception of Rest of World (primarily Southeast Asia). South Korea will lead in growth with 132.6 percent, followed by Europe at 57.2 percent, and Japan at 29.9 percent.

SEMI forecasts that in 2018, equipment sales in China will climb the most, 49.3 percent, to $11.3 billion, following 17.5 percent growth in 2017. In 2018, South Korea, China, and Taiwan are forecast to remain the top three markets, with South Korea maintaining the top spot at $16.9 billion. China is forecast to become the second largest market at $11.3 billion, while equipment sales to Taiwan are expected to approach $11.3 billion.

The following results are in terms of market size in billions of U.S. dollars:

equipment forecast

Leti, a research institute of CEA Tech, has integrated hybrid III-V silicon lasers on 200mm wafers using standard CMOS process flow. This breakthrough shows the way to transitioning away from 100mm wafers and a process based on bulk III-V technology that requires contacts with noble metals and lift-off based patterning.

The project, carried out in the framework of the IRT Nanoelec program, which is headed by Leti, demonstrated that the hybrid device’s performance is comparable to the reference device fabricated with the current process on 100mm wafers. The fabrication flow is fully planar and compatible with large-scale integration on silicon-photonic circuits.

The results were reported Dec. 5 at IEDM 2017 in a paper titled “Hybrid III-V/Si DFB Laser Integration on a 200mm Fully CMOS-compatible Silicon Photonics Platform”.

CMOS compatibility with silicon photonics lowers fabrication costs, and provides access to mature and large-scale facilities, which enables packaging compatibility with CMOS driving circuits.

“Silicon-photonic technologies are becoming more mature, but the main limitation of these platforms is the lack of an integrated light source,” said Bertrand Szelag, a co-author of the paper. “This project showed that a laser can be integrated on a mature silicon-photonic platform with a modular approach that does not compromise baseline process performances. We demonstrated that the entire process can be done in a standard CMOS fabrication line with conventional process and materials, and that it is possible to integrate all the photonic building blocks at large scale.”

The integration required managing a thick silicon film, typically 500nm thick, for the hybrid laser, and a thinner one, typically 300nm, for the baseline silicon-photonic platform. This required locally thickening the silicon by adding 200nm of amorphous silicon via a damascene process, which presents the advantage of leaving a flat surface favorable for bonding III-V silicon. The laser can be integrated on a mature silicon photonic platform with a modular approach that does not compromise the baseline process performance.

The novelty of the approach also included using innovative laser electrical contacts that do not contain any noble metals, such as gold. The contacts also prohibit integration lift-off-based processes. Nickel-based metallization was used with an integration technique similar to a CMOS transistor technique, in which tungsten plugs connect the device to the routing metal lines.

Next steps include integrating the laser with active silicon-photonic devices, e.g. a modulator and photodiode with several interconnect metal levels in a planarized backend. Finally, III-V die bonding will replace III-V wafer bonding in order to process lasers on the entire silicon wafer.

Tilted scanning electron microscopy view of the III-V/Si DFB laser after the IIIV patterning steps.

Tilted scanning electron microscopy view of the III-V/Si DFB laser after the IIIV patterning steps.

Laser spectrum at 160 mA injection currents

Laser spectrum at 160 mA injection currents

The Semiconductor Industry Association (SIA) today announced worldwide sales of semiconductors reached $37.1 billion for the month of October 2017, an increase of 21.9 percent from the October 2016 total of $30.4 billion and 3.2 percent more than last month’s total of $36.0 billion. October marked the global industry’s largest-ever monthly sales total. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average. Additionally, the latest WSTS industry forecast was revised upward and now projects annual global market growth of 20.6 percent in 2017 and 7.0 percent in 2018.

“The global semiconductor market continued to grow impressively in October, with sales surpassing the industry’s highest-ever monthly total and moving closer to topping $400 billion for 2017,” said John Neuffer, president and CEO, Semiconductor Industry Association. “Market growth continues to be driven in part by high demand for memory products, but combined sales of all other semiconductor products were up substantially as well, showing the breadth of the market’s strength this year.”

Regionally, year-to-year sales increased in the Americas (40.9 percent), Europe (19.5 percent), China (19.1 percent), Asia Pacific/All Other (16.3 percent), and Japan (10.7 percent). Compared with last month, sales were up more modestly across all regions: the Americas (6.8 percent), China (2.6 percent), Europe (2.6 percent), Japan (1.8 percent), and Asia Pacific/All Other (1.5 percent).

Additionally, SIA today endorsed the WSTS Autumn 2017 global semiconductor sales forecast, which projects the industry’s worldwide sales will be $408.7 billion in 2017. This would mark the industry’s highest-ever annual sales, its first time topping $400 billion, and a 20.6 percent increase from the 2016 sales total. WSTS projects double-digit year-to-year increases across all regional markets for 2017: the Americas (31.9 percent), Asia Pacific (18.9 percent), Europe (16.3 percent), and Japan (12.6 percent). Beyond 2017, growth in the semiconductor market is expected to moderate across all regions. WSTS tabulates its semi-annual industry forecast by convening an extensive group of global semiconductor companies that provide accurate and timely indicators of semiconductor trends.

To find out how to purchase the WSTS Subscription Package, which includes comprehensive monthly semiconductor sales data and detailed WSTS Forecasts, please visit http://www.semiconductors.org/industry_statistics/wsts_subscription_package/. For detailed data on the global and U.S. semiconductor industry and market, consider purchasing the 2017 SIA Databook: https://www.semiconductors.org/forms/sia_databook/.

Oct 2017

Billions

Month-to-Month Sales                              

Market

Last Month

Current Month

% Change

Americas

7.99

8.54

6.8%

Europe

3.28

3.37

2.6%

Japan

3.14

3.20

1.8%

China

11.36

11.65

2.6%

Asia Pacific/All Other

10.18

10.33

1.5%

Total

35.95

37.09

3.2%

Year-to-Year Sales                         

Market

Last Year

Current Month

% Change

Americas

6.06

8.54

40.9%

Europe

2.82

3.37

19.5%

Japan

2.89

3.20

10.7%

China

9.78

11.65

19.1%

Asia Pacific/All Other

8.88

10.33

16.3%

Total

30.43

37.09

21.9%

Three-Month-Moving Average Sales

Market

May/Jun/Jul

Aug/Sep/Oct

% Change

Americas

6.94

8.54

23.0%

Europe

3.20

3.37

5.1%

Japan

3.04

3.20

5.2%

China

10.68

11.65

9.1%

Asia Pacific/All Other

9.77

10.33

5.8%

Total

33.63

37.09

10.3%

A new illumination technology compares favorably to conventional bright field illumination.

BY GURVINDER SINGH, Director, Product Management, Rudolph Technologies, Inc., Wilmington, MA

A new optical technique can reveal defects and contaminants that escape conventional inspection technologies in many advanced packaging applications. As wafer level packaging (WLP), and especially fan-out wafer and panel level packaging (FOWLP/FOPLP), gains broader accep- tance, certain classes of defects that are characteristic of these processes present significant challenges to standard optical inspection tools. A new optical technology demonstrates increased sensitivity to transparent defects, such as residual dielectric films and photoresist, which are only marginally visible with conventional tools. At the same time, it is less sensitive to nuisance defects, such as those caused by the varying contrast and texture of grains in metal films, that should correctly be ignored.

Challenges in advanced packaging applications

Advanced packaging processes often involve the use of front-end-like technologies in back-end applications. Fan-out packaging is no exception, and, not surpris- ingly, it is following a similar development path, with increasing circuit complexity accompanied by shrinking circuit geometries. Redistribution layer (RDL) line widths, which were around 20μm in early implementations, will soon reach 2μm and are unlikely to stop there. Just as front-end processes placed increasing emphasis on enhanced process monitoring and control, advanced packaging processes will be forced to include more and better inspection and metrology capability at critical steps to maintain control and improve yields.

Advanced packaging processes, such as fan-out, face unique challenges that, for inspection systems, result in overcounting nuisance defects and undercounting yield-robbing critical defects. These advanced packaging techniques make extensive use of metal and organic polymers. Layers of metal are used to define conductive paths and organic polymer dielectric materials are used to provide insulation between conductors and planar surfaces between the layers. Dark field and bright field inspection results often include tens of thousands of nuisance defects. These occur because the inspection algorithms are designed to find random aberrations in highly repeatable patterns and the variable grain patterns of metal conductors appear as defects when are not. If not excluded, their large numbers can quickly overwhelm the real defects. Metal grain features can be as large as 50μm, much larger than RDL lines, which are currently as small as 2μm, and likely to reach 1μm in the near future.

Another class of defects that has proven difficult for conventional optical inspection techniques is caused by the presence of organic residues left after etching and descumming operations. They are hard to find because these materials tend to be transparent at visible wavelengths, yielding little signal in bright field and dark field inspection. They can be especially troublesome when they occur on contacts such as bumps and pillars. The new illumination method effectively eliminates nuisance noise from metal surface textures and enhances signal strength from organic defects.

ClearfindTM technology

The results presented here were all acquired using a FireflyTM inspection system (Rudolph Technologies) that incorpo- rates the new Clearfind (CF) illumination technology1. The new method takes advantage of the fact that many organic polymers exhibit distinctive optical properties that are not present in metals, silicon or other common inorganic materials used in semiconductor manufacturing. These properties tend to be unique to organic molecules displaying a high degree of conjugation, such as polycyclic aromatic hydrocarbons, and in linear or branched chain organic polymers with multiple regularly interspersed pi-bonds. This phenomenon results in the generation of a readily detectable, high color-contrast signal when the feature is appropriately illuminated against a metallic or other inorganic surface. The emission tends to be anisotropic and therefore less sensitive to surface topography that could potentially direct most ordinary bright field or dark field reflected light away from the detector. This results in increased sensitivity to organic residues and reduced sensitivity to interference from surrounding features. The method has the additional advantage of being relatively insensitive to signal variations caused by metal grains. FIGURE 1 presents a simplified illustration comparing the new technology to traditional white light inspection.

Screen Shot 2017-12-05 at 1.12.48 PM Screen Shot 2017-12-05 at 1.12.56 PM

The light source for the new technology is laser based, rather than the broadband source typically used in white light inspection systems. Thus, the light output is more stable in terms of both spectral range and output power. Autofocusing of the samples is accomplished using a patented high speed, near infrared-based laser triangulation system that maintains a constant distance between the imaging optics and the area being scanned. Images are acquired at high speed with a high-resolution camera. The result images compared in this article using bright field, dark field and CF technology were all acquired on the same inspection platform using different illumination techniques.

Through Silicon Via (TSV)

The sample is a 300mm silicon wafer with revealed TSV pillars2. TSV nail diameter is about 8μm and the distance between TSVs is about 56μm. The TSVs are on the backside of the wafer and the front side of the wafer is attached to a carrier.

In FIGURE 2a, the top shows a bright field image of two TSVs. The TSV on the left, circled in red, is covered with unetched organic residue and the TSV on the right, circled in green, is completely exposed. In the bright field image both TSVs look good and the residue is not visible. The images at the bottom left of figure 2 were acquired with CF technology and show the same TSVs. The TSV on the left, circled in red, has a bright blob while the one on the right, circled in green, is completely dark. The organic residue remaining on the left TSV now emits a readily detectable signal.

FIGURE 2b shows the inspection result from the full TSV wafer. The dots on the wafer map represent defect locations. There is a heavy concentration of organic residue on TSVs on the right side of the wafer. Metal pads approximately 35μm in diameter will be placed on top of the TSVs. Any organic residue between the TSV and the pad can cause deplanarization, which may result in connectivity issues when the die is stacked together. In addition, organic residue can increase the resistance of the contact when the die is stacked. If the defects are found before the next process step the wafer can be reworked.

Screen Shot 2017-12-05 at 1.13.03 PM

Under Bump Metal (UBM)

The sample is a 300mm wafer with RDL and under bump metallization (UBM). The UBM pads are about 50μm wide. In FIGURE 3a, the bright field image of two UBM pads shows the left pad is completely exposed and the right pad is covered with unetched organic film. However, the film is transparent and both pads look good in this image. Note the random metal texture visible in the bright field image, which adds noise and makes sensitive inspection for small defects more difficult. The image at lower left, acquired with CF technology, shows the same pads. The left pad, with no residue, appears black. The right pad, covered by residue, is significantly brighter. Also note that the metal texture seen in the bright field image with absent in CF illumination, permitting sensitive inspection for defects down to the pixel level.

FIGURE 3b shows a map of the full wafer where there is a heavy concentration of defects on UBM pads near the edge of the wafer. As in the TSV example, residue remaining on the UBM pads can cause increased resistance or loss of connectivity to a bump deposited on the pad. Bumps deposited on the residue are higher than normal bumps, leading to loss of coplanarity and connectivity issues. If the problem is found before starting the bump process, the wafer can be reworked and the residues removed.

Screen Shot 2017-12-05 at 1.13.10 PM

Redistribution Layer (RDL)

The sample is a 300mm molding compound wafer for fan-out packaging. FIGURE 4a shows a bright field image that includes a UBM pad and several RDL lines. The middle image shows the same area viewed with the new illumination technology. In the bright field image, the metal of the UBM pad and the RDL lines is very similar to the underlying metal visible through an interposed transparent film. The texture and graininess of the metals add noise to the image, increasing the difficulty of detecting small defects. Inspection with bright field illumination resulted in high nuisance defect counts without finding real process issues on the wafer. In FIGURE 4b, the top surface metal features, RDL and UBM, stand out against the background of the transparent film, while the underlying metal features are barely visible. FIGURE 4c shows a full wafer map acquired using CF technology and reveals a rectangular pattern that corresponds to the reticle of the lithography tool. The rectangular pattern was not visible in the bright field wafer map.

Screen Shot 2017-12-05 at 1.13.19 PM

FIGURE 5 shows additional RDL inspection results on the same wafer. CF technology revealed thinner lines toward the lower left corner of the reticle pattern. Ultimately, it was determined that these thinner lines were caused by a defect in the condenser lens of the lithography tool. The improved contrast between the first layer metal features in the underlying organic film, and the reduced noise, permitted more accurate and sensitive measurements using the new illumination technology. A bright field inspection of 20 wafers containing the same defect did not detect any thinner lines.

Screen Shot 2017-12-05 at 1.13.25 PM

Photoresist

The sample is a 300mm patterned silicon wafer from a large memory manufacturer3. It contains die approximately 11.7mm x 7.6mm in size, and containing arrays of about 9,000 metal pillars, each pillar approximately 22μm in diameter. The customer was interested to know if the new illumination technology would find defects not found by bright field inspection. FIGURE 6a shows a wafer map overlaying bright field defects (blue triangles) and CF defects (green triangles). In both cases the defects appear to be randomly distributed and not clustered. As depicted by the bar chart in FIGURE 6b, bright field illumination found 2,279 defects compared to 289 defects found by CF technology. Most interestingly, only 32 of the defects found by CF technology were also found with bright field inspection. 257 defects would have been missed by bright field inspection. The bar chart (FIGURE 6c) shows the size distribution of defects discovered by both techniques. Bright field inspection found a very large number of small defects (less than 5μm) and more defects larger than 25μm. Defects found by the CF technology were between 5-25μm in size.

Screen Shot 2017-12-05 at 1.13.34 PM

FIGURE 7 compares CF technology results (top) and bright field results (bottom). Each vertical pair shows a defect missed by bright field inspection and detected by CF technology. The enhanced brightness and circular shape of the defects detected by the new method strongly imply that they are associated with polymer residues. The enhanced brightness of the defects against the very black background is a unique and valuable feature of CF technology. Overall, these results demonstrate the value of supplementing bright field inspection with CF technology. All of the defects found by CF technology were of sufficient size to impact yield.

Screen Shot 2017-12-05 at 1.13.44 PM

Conclusion

Results shown here demonstrate the benefits of imaging with the new CF illumination technology when compared to conventional bright field illumination. The new technology allows detection of transparent organic residues that are not visible with bright field illumination.

It was also shown to detect types and sizes of defects that were not detected by bright field inspection. Equally important, its ability to reduce noise caused by metal texture and graininess significantly improves its sensitivity to small defects on metal features and dramatically reduces the detection of nuisance defects.

References

1. Gurvinder Singh, et al, “Advanced packaging lithography and inspection solution for next generation FOWLP-FOPLP processing”, IEEE Xplore, October 2016.
2. Woo Young Han, et al, “Inspection challenges in wafer level packaging”, International Wafer Level Packaging Conference, October 2017
3. Jonathan Cohen, et al, “Photoresist residue detection in advanced packaging”, International Wafer Level Packaging Conference, October 2017

By Walt Custer, Custer Consulting

SEMICON Europa 2017 and productronica were co-located November 14 to 17 at Messe Munchen in Munich, Germany. Attendance was very good and the mood was upbeat.

The third quarter of this year has seen broad growth both globally and also for the European electronic supply chain.

Chart 1 shows 3Q’17/3Q’16 growth by electronic sector for the world. SEMI and PCB process equipment and semiconductors stand out but almost all key sectors expanded.

Custer-Chart-1-Global-Elec-

Chart 2 shows third quarter growth for Europe.  SEMI equipment leads but the third quarter Eurozone expansion was broad based.

Custer-Chart-2-EUropean-Ele

At productronica, Custer Consulting presented at the “Business Outlook for the Global Electronic Supply Chain” event (with emphasis on Europe).  For a copy of Walt’s charts, please email [email protected].

The ConFab 2018, to be held at The Cosmopolitan of Las Vegas on May 21-23, is thrilled to announce the newest opening day Keynote speaker, Professor John M. Martinis. John is a Research Scientist who heads up Google’s Quantum AI Lab. He also holds the Worster Chair of Experimental Physics at the University of California, Santa Barbara. The lab is particularly interested in applying quantum computing to artificial intelligence and machine learning, and as one of Google’s quantum computing gurus, John shared the company’s “stretch goal”. That is to build and test a 49-qubit (“quantum bit”) quantum computer by the end of this year. The test will be a milestone in quantum computer technology.

The conference team is also very excited to have IBM distinguished Engineer, Rama Divakaruni – who is responsible for IBM Advanced Process Technology Research – present his Keynote Address: How Artificial Intelligence is driving the “New” Semiconductor Era. Both Keynotes, set for May 21, promise to be outstanding presentations.

Additional outstanding speakers at The ConFab 2018 include:

  • Dan Armbrust, CEO and Co-founder of Silicon Catalyst will present: “Enabling a Startup Ecosystem for Semiconductors” describing the current environment for semiconductor startups.
  • George Gomba, GLOBALFOUNDRIES VP of Technology Research will discuss the EUV lithography project with SUNY Polytechnic Institute now finding its way into advanced semiconductor manufacturing.
  • John Hu, Director of Advanced Technology for Nvidia – John heads up R&D of Advanced IC Process Technologies and programs, Design For Manufacturing, Testchips, and New technology/ IC product.
  • Tom Sonderman, President of Sky Water Technology Foundry will focus on smart manufacturing ecosystems based on big data platform, predictive analytics and IoT.
  • Kou Kuo Suu of ULVAC Japan will delve into manufacturing various types of NVM memory chips, including Phase-Change memory (PCRAM).

More industry experts adding to the conference will be announced soon.  Further event details are available at: www.theconfab.com.

The semiconductor industry continued its upward trend in the third quarter of 2017, notching 12 percent sequential growth with strength across all application markets, according to IHS Markit (Nasdaq: INFO). Global revenue totaled $113.9 billion, up from $101.7 billion in the second quarter of 2017.

As memory prices remain high and the wireless market continues to see strong demand through the fourth quarter, 2017 is shaping up to be a record-breaking year for the semiconductor industry. IHS Markit projects that semiconductor revenue will reach a record-high $428.9 billion in 2017, representing a year-over-year growth rate of 21 percent.

Key growth drivers

All application end markets posted sequential growth over the prior quarter, with wireless communications and data processing categories leading the pack.

Revenue from wireless applications grew faster sequentially in the third quarter of 2017 than any of the other high-level application markets. Semiconductor revenue from wireless applications was a record high $34.8 billion in the third quarter, representing nearly 31 percent of the total semiconductor market. IHS Markit anticipates an even bigger fourth quarter for wireless applications, projecting $37.5 billion in revenue — and more than $131 billion for the full-year 2017.

As the wireless market evolves, this growth can be attributed to a number of factors. ”More complex and comprehensive smartphone systems on a chip are supporting applications such as augmented reality and computational photography,” said Brad Shaffer, senior analyst for wireless semiconductors and applications at IHS Markit. “Premium smartphones have increasing amounts of memory and storage. The radio frequency content in these smartphones has also grown considerably over the past few product generations, with many high-end smartphones now supporting gigabit LTE mobile broadband speeds.”

The memory markets proved once again to be the driving force and highest-growing segment for semiconductors in the third quarter of 2017. “The DRAM industry had another record quarter with $19.8 billion in revenue, exceeding the prior record by more than $3 billion,” said Mike Howard, director for DRAM memory and storage research at IHS Markit. “Prices and shipments were up during the quarter as strong demand for mobile and server DRAM continued to propel the market.”

Top_5_memory

The NAND industry had another record quarter as well, growing 12.9 percent in the third quarter of 2017, with total revenue reaching $14.2 billion. “Pricing was flat in the quarter, as seasonally strong demand driven by the mobile and solid-state drive segments was able to offset moderate shipment growth,” said Walter Coon, director for NAND flash technology research at IHS Markit. “The market is expected to soften exiting 2017 and into early next year, as the industry transition to 3D NAND technology continues to progress and the market enters a traditionally slower demand period.”

Manufacturer moves

Samsung officially passed Intel to become the number-one semiconductor supplier in the world in the third quarter of 2017, growing 14.9 percent sequentially. Intel now comes in at number two, with SK Hynix securing the third rank in terms of semiconductor revenue for the third quarter.

top_5_semiconductor

Among the top 20 semiconductor suppliers, Apple and Advanced Micro Devices (AMD) achieved the highest revenue growth quarter over quarter by 46.6 percent and 34.3 percent, respectively.

There was a good deal of market share movement within the top 10 suppliers throughout the third quarter as well. In terms of semiconductor revenue, Qualcomm surpassed Broadcom Limited to secure the number-five spot, while nVidia made its way into the top 10 ranking for the first time ever. At this time last year, the top five semiconductor companies controlled 40 percent market share of the entire industry. The top five gained 4.2 percent more market share this year over last year, while comprising three memory companies instead of the previous two.

More information on this topic can be found in the latest release of the Semiconductor Competitive Landscaping Tool (CLT) from the IHS Markit Semiconductor Competitive Landscape CLT Intelligence Service.

Soitec, a designer and manufacturer of semiconductor materials for the electronics industry, today announced the latest generation of silicon-on-insulator (SOI) substrates in its Imager-SOI product line designed specifically for fabricating front-side imagers for near-infrared (NIR) applications including advanced 3D image sensors. The new SOI wafers from Soitec are now available in large volumes with high maturity to meet the needs of customers in the growing market for 3D cameras used in augmented reality (AR) and virtual reality (VR), facial-recognition security systems, advanced human/machine interfaces and other emerging applications.

“Our newest Imager-SOI substrates represent a major achievement for our company and a smart way to increase performance in NIR spectrum domain, accelerating new applications in the growing 3D imaging and sensing markets,” said Christophe Maleville, executive vice president of the Digital Electronics Business Unit at Soitec. “Innovative sensor design on SOI is achieved by leveraging our advanced know-how in ultrathin material layer transfer and our extensive manufacturing experience.”

The new SOI substrate makes it possible to simply extend the operating range of high resolution silicon based CMOS image sensors into the NIR spectrum. This optimized version of SOI substrate greatly improves the signal to noise ratio in the NIR spectrum.

The market for 3D imaging and sensing devices is forecast to grow at a CAGR of 37.7 percent over the next five years and reach US$9 billion in sales by 2022, according to Yole Développement. The market research and consulting firm predicts that 2018 will likely see a massive influx of products, with the first applications in mobile electronics and computing.*