Tag Archives: Removed Webcast

Epicor-logo-Business Inspired-2color-CMYK

How the IoT is Driving Semiconductor Technology

Date: January 22, 2015 at 1:00 p.m. EST

Free to attend

Length: Approximately one hour

The age of the Internet of Things is upon us, with the expectation that tens of billions of devices will be connected to the internet by 2020. This explosion of devices will make our lives simpler, yet create an array of new challenges and opportunities in the semiconductor industry. At the sensor level, very small, inexpensive, low power devices will be gathering data and communicating with one another and the “cloud.” On the other hand, this will mean huge amounts of small, often unstructured data (such as video) will be rippling through the network and the infrastructure. The need to convert that data into “information” will require a massive investment in data centers and leading edge semiconductor technology.

Click here to register.

Speakers

raitken dac14Robert C. Aitken is an ARM Fellow and heads the Silicon portion of ARM R&D. His areas of responsibility include low power design, library architecture for advanced process nodes, and design for manufacturability. His research interests include design for variability, reliability, and memory design. His group has participated in numerous chip tape-outs, including 6 at or below the 16nm node. He has published over 70 technical papers, on a wide range of topics.  Dr. Aitken joined ARM as part of its acquisition of Artisan Components in 2004. Prior to Artisan, he worked at Agilent and HP.  He has given tutorials and short courses on several subjects at conferences and universities worldwide. He holds a Ph.D. from McGill University in Canada. Dr. Aitken is an IEEE Fellow, and serves on a number of conference and workshop committees.

KengeriSubramani Kengeri, Vice President, Global Design Solutions

Subramani is currently the Vice President of Global Design Solutions responsible for world-wide design engineering, semiconductor design eco-system development and design-technology co-optimization. His team enables IP, EDA and SoC solutions in support of “first time right” technology qualification and customer SoC differentiation. He is also responsible for determining technology feasibility, competitiveness and manufacturability of technology platform through design-technology Interactions with customers, technology R&D and design eco-system.

Subramani joined GLOBALFOUNDRIES in 2009 as the Vice President of Design Solutions. He implemented strategic design enablement initiatives and established a strong foundation for collaboration with semiconductor design eco-system. For the last 3 years, as the Head of Advanced Technology Architecture, in the Office of the CTO, Subramani was responsible for defining competitive 14nm, 10nm and 7nm technology platforms. He started his VLSI design engineering career at Texas Instruments and prior to joining GLOBALFOUNDRIES, he was the Senior Director of design and technology platform at TSMC.

Subramani has 25 years semiconductor industry experience and has been granted 38+ U.S. patents. He holds a Master’s degree in electrical engineering from Indian Institute of Technology (IIT, Delhi) and a certificate in executive management from AeA/Stanford University.

Sponsored by Epicor Software Corporation

Epicor Software Corporation is a global leader delivering inspired business software solutions to the manufacturing, distribution, retail and services industries. With over 40 years of experience serving small, midmarket and larger enterprises, Epicor enterprise resource planning (ERP), production control software (MES), and supply chain management (SCM), enable companies to drive increased efficiency and improve profitability. With a history of innovation, industry expertise and passion for excellence, Epicor provides the single point of accountability that local, regional and global businesses demand.

air products

Trends in Semiconductor Materials

Date: Thursday, November 20, 2014 at 1:00 p.m. EST

Free to attend

Length: Approximately one hour

Chip Level Materials Markets: Growth and Opportunities

Current 3-dimensional structures present new challenges relating to uniformity, lithographic resolution, high aspect ratio etching and fills, and planarization while addressing continuing need to stay at or below current technology node scaling.  What do these challenges really mean in terms of changing material requirements and materials growth opportunities?  In this presentation, Lita Shon-Roy of Techcet will highlight those processes that must have better, alternative process materials, and provide market forecasts on these materials opportunities.

SRC: Exploring Materials Challenges Beyond Moore’s Law

The electronics industry is facing a growing crisis in being able to continue providing cost-effective processes and designs to support the continuation of what’s been referred to as ‘Moore’s Law.’ This ‘Law’, or more accurately ‘observation of the economics involved in scaling integrated circuits,’ has been a very useful guideline for several decades, but as with any similar types of projections, has been expected to some day run its course. While the exact timeframe is still uncertain, that ‘day’ is now within sight, and yet there are still no clear paths forward beyond that point. This presentation will provide a brief glimpse of some of the key materials-related challenges that exist within the frontend (devices), lithography, and backend-of-line (chip level interconnects). It will also include just a few of the research concepts that offer some potential paths forward, which the Semiconductor Research Corporation and its member companies are exploring alongside the university researchers they are supporting.

Click here to register. 

Speakers: 

jon-candelariaJon Candelaria, Director, GRC Interconnect and Packaging Sciences

Jon Candelaria has over 35 years of experience in the electronics industry in a wide variety of engineering and managerial roles. He was most recently a Distinguished Member of the Technical Staff at Motorola’s Applied Research & Technology Center before joining the SRC in September, 2010 as the Director for Interconnect and Packaging Sciences. He has over a dozen issued patents and published technical articles, and received the Motorola Patent of the Year Award for an invention which contributed over $1B to Motorola over the course of its lifetime. He served as Technical Program Chair and General Chair of the IEEE Electron Devices Society’s flagship conference, the IEDM. Jon was the V.P. of Conferences for the IEEE’s Electron Devices Society (EDS), the EDS representative on a joint United Nations-IEEE Humanitarian Challenge advisory committee, and was Chair of both the IEEE Computer Society and Laser and Electro Optics Society Phoenix Chapters. He is currently the Treasurer and Technical Program Committee member for the International Interconnect Technology Conference (IITC), and is a member of the Editorial Panel for Future Fabs International.

litaMugLita Shon‐Roy, President/CEO of Techcet, has worked in the electronics materials industry in business development and technical marketing for more than 25 years. Her work experience spans from business development, marketing and sales of IC’s, equipment, and materials to process development of flat panel displays (TFTs). She has developed new business opportunities for companies such as RASIRC/Matheson Gases and IPEC/Speedfam and helped establish marketing and sales proficiency in companies such as Air Products/Schumacher, Brooktree/Rockwell, and Hughes Aircraft. Lita helped build IPEC as a leader in CMP equipment as Director of International Sales. In 1998, Lita cofounded Techcet Group, LLC. She has authored and co‐authored various articles and texts focused on the semiconductor processing, industry forecasting, and the world economy and is now a recognized expert in electronic materials marketing and business development. Lita holds a Master’s Degree in Electrical Engineering, with a specialty in Solid State Physics from USC and a Bachelor’s Degree in Chemical Engineering from UCSD. She is currently completing her MBA at California State University, Dominguez Hills.

Sponsored by Air Products

Air Products has been a leading global supplier of high-purity gases, chemicals, and delivery systems to the electronics industry for over 40 years. We serve all major segments of the industry with a unique combination of offerings, experience, and commitment.  We’re advancing materials science. We’re advancing semiconductors. We’re advancing mobility. What can we help you advance?  www.airproducts.com/advancing

 logo_300x300[1]

Metrology

DateNovember 12, 2014 at 12:00 p.m. Eastern

Free to attend

Length: Approximately one hour

The next move in metrology and defectivity for the semiconductor industry

The semiconductor industry today is showing two major trends, as we are approaching the end of the Moore’s Law era.  First, the complexity of the process flow used to make a device has increased extremely fast in recent years.  Second, market demands extend beyond the device to the system, which integrates different functions to achieve a task, leading to 3D integration approaches. The presentation will cover our vision of the consequences of those trends in metrology and defectivity requirements. Carlos Beitia is the Metrology and Defectivity Manager, CEA-Leti, will present: the use of more and more in-lab characterization to complement in-line metrology; the need to combine measurements whether to improve uncertainty in a given parameter or improve knowledge of the object under study; the need for in-die characterization that provides information to complete the picture at transistor and wafer level; 3D integration problems, and more.

Processes for Failure Analysis

Winfield Scott, the Director of Technology at Evans Analytical Group, will present an overview of the failure analysis process as it relates to advanced process technologies will be presented. Layout dimensions are much smaller than the wavelength of light which means transistors cannot be seen with optical microscopes. Many defects appear ‘invisible’ and result in degraded transistor performance instead of opens or shorts. The presentation will include: The failure analysis (FA) methodology and flow; Localizing the failure and identifying the failure site; Localization tools LIVA, TIVA, XIVA, OBIRCH, EMMI, IR, SQUID, LTP; and an example of nanoprobe and TEM.

Click here to register.

Speakers:

wscottWinfield Scott, Technology Director, Evans Analytical Group

Winfield Scott is the Director of Technology at Evans Analytical Group and has the responsibility to ensure EAG has the tools and techniques to keep up with the advances in semiconductors and electronic packaging. He has been using FA to help solve problems for over 40 years. In addition to EAG, he has worked for Motorola, Western Digital, andSperry Flight Systems.

CarlosCarlos Beitia, Metrology and Defectivity Manager, CEA-Leti

Dr. Carlos Beitia received a Ph.D. in material science from Paris 7 University in France. He joined the CEA in 2009 as the scientific manager of the metrology laboratory in Leti’s Silicon Technology Department. Since 2011, he has been the metrology-and-defectivity manager. Previously, he worked for eight years as application engineer at KLA-Tencor focused on advanced metrology applications for worldwide semiconductor fabs. He participates in and leads activities for Leti in several European programs linked to metrology challenges of the semiconductor industry (SEA4KETs, Master 3D, Polis). He is member of the ITRS metrology working group and theFrench Nanometrology Club. His actual field of research is in metrology in optical profilometry and AFM for surface nanotopography and surface functionalization.

About the sponsor: 

Bruker Nano Surfaces is the world’s leading supplier of probe based metrology & failure characterization systems supporting the semiconductor industry with fully automated Atomic Force Microscopes and AFM probes designed specifically to address CD, depth and CMP metrology in a production environment. Come see how Bruker’s unique PeakForce Tapping capability for FinFETs, 3D-NAND and EUV lithography can help solve your critical process problems by providing unparalleled accuracy and precision. Find out more at www.bruker.com/afm.

Wet cleaning remains the most applied process step in semiconductor device manufacturing to achieve acceptable yield during continuous downscaling. Traditionally, cleaning process challenges are focused on the removal of particulate, metallic and organic contamination and the removal or growth of thin passivating films. These processes are typically based on the know-how of classical silicon processes, from which a large portion was transferred over the last years from batch to single wafer process tools. This transfer was also driven by the transition to larger wafer sizes, demanding additional efforts regarding uniform wafer processing and effective substrate wetting and drying. Furthermore, the downscaling introduces new device geometries and materials different from silicon.

This introduction requires the development of new critical and selective cleans tackling galvanic corrosion, pattern collapse both in FEOL and BEOL process steps.  An additional challenge is that the reduction in device size and an increase in device topography makes the removal of small particles even more challenging.

450mm Status Report


April 3, 2013

The switch to 450mm will be the largest, most expensive retooling the semiconductor industry has ever experienced. Will you be ready? 450mm fabs, which will give an unbeatable competitive advantage to the largest semiconductor manufacturers, are likely to cost $10 billion and come on-line in 2017, with production ramp in 2018. Unprecedented technical challenges still need to be overcome, but work is well underway at an R&D center in upstate New York, at the Global 450mm Consortium, G450C, and at the imec consortium in Europe. Hear from the G450C General Manager, Paul Farrar Jr., on the current status of activities, key milestones and schedules, and imec’s senior business development director, Lode Lauwers, on why 450mm is important for Europe, and the status of 450mm research on processes and devices.

This event was originally broadcast on March 5th, 2013 and is now available for on-demand viewing.

As the semiconductor industry moves toward smaller geometries, manufacturing processes are becoming more complex. In particular, they’re more demanding of all the variable parameters on a process tool, including process gas accuracy. Cutting down on variability in the process positively impacts productivity and yield.

Mass flow controllers (MFCs) are critical to maintaining process control.  Now, next generation MFCs like the GF135 from Brooks Instrument are enabling a leap forward in advanced process gas chemistry control. This technology optimizes semiconductor manufacturing processes while moving quality control upstream with features like:

• Integrated rate-of-decay (ROD) flow-error detection without process disruption, identifying and correcting issues before they happen, preventing wasted time and wasted wafers
• Improved process gas accuracy
• Enhanced pressure transient insensitivity (PTI) for critical processes
• Zero stability trending and correction ensuring accuracy at critical low flow set points
• Ultra-fast flow settling time for reduced process cycle time

Learn how you can improve your process yield and uptime – and your bottom line.

Die stacking enables better chip performance in a small form factor, meeting the needs of smartphones, tablets, and other advanced devices. Though-silicon vias (TSVs) are moving into volume packaging production, as manufacturers work to solve challenges with reliability, cost and scaling. 2.5D, where interposers of silicon or glass are used, is seen as an intermediary step before full-blown 3D. This webcast will explore the present status of 2.5 and 3D integration, including TSV formation.

As the industry is incorporating more MEMS devices with integrated magnetic sensors, they are encountering challenges that cannot be overcome with existing toolsets.  The deposition and magnetic alignment of these materials are critical for proper device performance and require special hardware configurations and process optimization.

As an introduction we will review applications where the Physical Vapor Deposition (PVD) of magnetically aligned materials is necessary to meet the desired film requirements in high volume manufacturing.  Veeco has optimized the configuration for these materials giving us the controllability and uniformity of magnetic and electrical properties necessary for MEMS devices with integrated magnetic sensors.

The webcast will cover the following topics:

  • Review PVD deposition of magnetically oriented films
  • Application development of  materials, magnetic and film property performance
  • Hardware considerations for the deposition of ferromagnetic materials
  • Challenges associated with the deposition of these materials
  • Tool flexibility for enhanced throughput and high volume manufacturing

Miniature auto-focus cameras of the type widely used in cell phones, have traditionally used voice coil motors to move the entire optical train to alter the focus setting.  This technology mainstay has performance limitations that are becoming increasingly apparent for high resolution cameras that use small diagonal image sensors in a compact form factor.  This webinar will provide an introduction to miniature auto-focus camera technology and voice coil motors.  It will explain lens tilt lens, de-centering and position hysteresis and the effect that these have on image quality and auto focus algorithms.  The webinar will conclude with a look at the emerging alternative of using MEMS actuators to provide auto-focus for miniature cell phone cameras and their merits and limitations compared with voice coil motors.

In this live one-hour webinar, attendees will gain a comprehensive understanding of today’s optical measurement techniques of LED technology. The course instructors will examine lighting, color theory, and LED structure to provide the basis for an expanded review of measurement techniques used to quantify the optical emission of LED’s. Topics covered will include:

  • Light Theory
  • Color Theory
  • LED’s and optical emission
  • Measurement devices
  • Measurement Types & applications specific measurements
  • Measurement results & interpretation
  • Live Q&A with Applications Engineers