Tag Archives: Small Times Magazine

by Debra Vogler, senior technical editor, Small Times

September 1, 2009: Nemotek Technologie, a manufacturer of customized wafer-level cameras for portable applications, announced a partnership with electronic component distributor Anglia to open a logistics center in Hong Kong. The new center will provide Nemotek Technologie’s customized wafer-level packaging (WLP) and wafer-level optics (WLO) to approved customers in Asia.

To be the volume producer of wafer-level cameras, the Morocco-based company must have a strong presence in Asia, as well as Europe and the US, according to Jacky Perdrigeat, Nemotek CEO. The company already has operations in Korea, Japan, Taiwan, and China.

The company’s WLO and WLP solutions are based on reflow-compatible materials, allowing for customization and flexibility while maintaining a small form factor. Bypassing configured design rules, the WLO and WLP solutions are mounted directly to application assembly boards, utilizing fewer components. Because the company has in-house capabilities for TSV, wafer-level packaging, and wafer-level optics, it can do all the operations needed to assemble the camera; is also can 100% test its cameras. These capabilities are advantageous as they eliminate the need for end-users to go to several different suppliers for each assembly operation.

Aside from mobile phones, next in line for the company’s business strategy is notebooks and medical applications, Perdrigeat told Small Times; after that will be automotive applications, for which it takes much longer to attain product qualification. (As a start-up company it’s important to be in fast-growing markets, he noted.) Estimating the timeline for products in each sector, Perdrigeat projected mobile phone products will ready by the end of 2009, followed by notebook products sometime around 2Q10, medical products not before the end of 2010, and automotive products not before 2012. — D.V.

Vogler, Nemotek, Perdrigeat, wafer-level packaging, WLP, wafer-level optics, WLO, chip-scale packaging, underfill, through-silicon via, TSV

August 31, 2009: Carl Zeiss is debuting new pieces to a “correlative microscopy” strategy of materials analysis linking light microscopy and scanning electron microscopy (SEM).

The company’s “Shuttle & Find” system enables samples to be examined under both a light microscope and also SEM environment. Samples are examined in a light microscope with various contrasting methods (brightfield, darkfield, or polarized light or interference); further samples deemed of interest are then examined using a SEM. The Zeiss interface connects upright and inverted microscopes (type SteREO Discovery, Axio Imager and Axio Observer) with a motorized stage, to a range of Zeiss SEMs (EVO, SIGMA, SUPRA, ULTRA and MERLIN) and its CrossBeam (FIB-SEM) workstations (AURIGA, NVision und NEON). Samples are transferred between the two “in a matter of minutes” and the SEM automatically relocates areas of interest “in a matter of seconds.” Also, images of the light microscopy and SEM can be overlaid and correlated to x-ray maps.

“With the interface presented today, we are taking a step which enables two largely separate worlds to come together,” said Thomas Albrecht, head of product management at Carl Zeiss SMT’s Nano Technology Systems division, in a statement.

First applications of the Shuttle & Find system “are being developed jointly with early customers,” eyeing use in materials science and industrial procedures — though Zeiss says that biological applications are not well-suited to the new setup.


Mounting of the sample holder with the adapter into the vacuum chamber of a scanning electron microscope. (Source: Carl Zeiss SMT)

August 28, 2009: Researchers at IBM in Zurich, Switzerland, have captured the “anatomy” of a molecule using noncontact atomic-force microscopy (AFM), peering through the surrounding electron cloud to capture images “with unprecedented resolution.”

The method, a longtime goal of surface microscopy, involves an AFM operated in an ultrahigh vacuum at very low temperatures (-268°C), to image the chemical structure of individual pentacene molecules (1.4nm in length). Key was using an “atomically sharp” tip apex to measure the forces between the tip and sample. Also, picking up single atoms and molecules showed that the foremost tip atom/molecule governs the AFM contrast and resolution. Terminating the AFM tip with a carbon monoxide (CO) molecule was shown to yield optimum contrast at a height of ~0.5nm, noted IBM scientist Leo Gross, in a statement. Another key: deriving a complete 3D force map of the molecule, enabled by the AFM’s mechanical and thermal stability.


Imaging the “anatomy” of a pentacene molecule – 3D rendered view: By using an atomically sharp metal tip terminated with a carbon monoxide (CO) molecule, IBM scientists were able to measure in the short-range regime of forces which allowed them to obtain an image of the inner structure of the molecule. The colored surface represents experimental data. (Image courtesy of IBM Research/Zurich)

Corroborating the results using first-principles density functional theory calculations, the researchers also figured out what caused the atomic contrast: Pauli repulsion between the CO and the pentacene molecule, explained IBM scientist Nikolaj Moll (referring to a quantum mechanical force that prevents two identical electrons from coming too close together). van der Waals and electrostatic forces, the scientists determined, “only add a diffuse attractive background.”

The AFM’s imagery, seen below compared to a diagram, is striking — hexagonal shapes of the five carbon rings and carbon atoms are clearly resolved, and hydrogen atoms also can be discerned. (IBM has posted more pictures on Flickr, and even a video on YouTube.)


Ball-and-stick model of the pentacene molecule: five linearly fused hexagonal rings of benzene, comprised of 22 carbon atoms (inner gray balls) and to which are bound 14 hydrogen atoms (outer white balls). The entire molecule is 1.4nm in length; spacing between neighboring carbon atoms is 0.14nm. (Image courtesy of IBM Research/Zurich)


The delicate inner structure of a pentacene molecule imaged with an atomic force microscope, clearly showing hexagonal shapes of the five carbon rings in the pentacene molecule, and even the positions of the hydrogen atoms around the carbon rings. Pixels correspond to actual data points. (Image courtesy of IBM Research/Zurich)

Most significantly, says IBM, this atomic-scale imaging, combined with similar experiments from IBM earlier this summer that measured the charge state of single atoms, help better understand charge distribution at the atomic scale, pointing a way to create molecular-scale devices and networks.

The work was done in collaboration with Peter Liljeroth of Utrecht University, and published in the Aug. 28 issue of the journal Science.


The scanning tunneling/atomic force microscope used to image the “anatomy” or chemical structure of a Pentacene molecule with atomic resolution. (Photo by Michael Lowry; image courtesy of IBM Research/Zurich)

August 28, 2009: mPhase Technologies says that work with a MEMS foundry partner has determined that a recently-discovered polymer coating for its Smart NanoBattery “appear[s] to be able to be replicated in a foundry manufacturing environment.”

The coating was previously found to prevent short circuiting and provide electrical isolation on conductive surfaces of the battery’s porous membrane while providing better activation control, the company explained in a statement. The coated membrane physically separates the liquid electrolyte and solid electrodes, enabling a potentially infinite shelf life. Next step is for mPhase and its (unnamed) foundry partner to transfer technical testing results with additional dielectric coating materials and processing methods into a production environment, which should allow for more consistent and uniform development of the membrane structure to which the coating is applied.

Earlier this year the company said it had improved a manufacturing technique to maximize the number of usable silicon based electrowettable membranes in its Smart NanoBattery, leading to higher yields, greater cost efficiency, and ultimately profitability.

The electrowettable reserve battery is being developed under a US Army research grant as a long-term continuous power supply for computer memory backup and potential wireless sensor applications.

August 26, 2009: Researchers from the U. of Maryland and the National Institute of Standards and Technology (NIST) say they’ve come up with a way to overcome a principle obstacle in creating molecular switches: sandwich organic molecules between silicon and metal.

The general concept of molecular switches isn’t new, but a key problem is the fragility and susceptibility of organic molecules to semiconductor manufacturing process steps, particularly the high temperatures of metal deposition for attaching to electrical contacts.

To address this, they placed a nonstick surface down before depositing the metal (in this case, gold), which cooled to an ultrasmooth surface, and on top of that overlaid a plastic substrate. The nonstick layer beneath allowed removal of the laminated gold “as easy as peeling off plastic wrap,” NIST claims in a statement. The final step is to attach organic molecules to the gold, and then flip the entire assembly onto a silicon substrate, sandwiching the organic molecules in between.

The scientists admit their solution, dubbed “flip-chip lamination,” has been tried before, but a new “nanotransfer printing” machine makes it now possible to “press the three layers together so the organic molecules contact both the silicon and gold, but without smashing or otherwise degrading them,” says Coll Bau, NIST materials scientists and paper author.



The flip-chip lamination method creates an ultra-smooth gold surface (top), which allows the organic molecules to form a thin yet even layer between the gold and silicon. Gold surfaces created by other methods are substantially rougher (bottom), and would result in many of the molecular switches either being smashed or not contacting the silicon. (Credit: Coll Bau, NIST)

More analysis, from their paper published in the Journal of the American Chemical Society:

After molecular junction formation, the monolayers were characterized with p-polarized backside reflection absorption infrared spectroscopy (pb-RAIRS) and electrical current-voltage measurements. The monolayer quality remains largely unchanged after lamination to the Si(111) surface, with the exception of changes in the COOH and Si-O vibrations indicating chemical bonding. Both vibrational and electrical data indicate that electrical contact to the monolayer is formed while preserving the integrity of the molecules without metal filaments.

Potential application is seen in biosensors due to the interaction of organics and electronics; Bau also suggests the process could be “a fabrication paradigm” for nanomanufacturing, e.g. making molecular junctions with dense monolayers chemically bonded to metals and silicon electrodes.

August 25, 2009: The Nanoscale Science and Engineering Research Center for High-rate Nanomanufacturing, a joint venture pooling efforts from Northeastern, U. of Massachusetts/Lowell, and U. of New Hampshire, has received a five-year, $12.25M renewal grant from the National Science Foundation to continue its work with commercializing nanoscale scientific process.

Work going on at the center, centered at Northeastern in Boston, MA, runs the gamut from nanobiosensors for cancer detection to flexible solar cells to nanodrug-delivery systems to batteries to flexible electronics. It also investigates the environmental, economic, regulatory, social, and ethical impacts of nanomanufacturing.

In a statement, the center cited projections from the NSF of a $1 trillion market for nanotech products by 2015 — and that getting there will require perfecting mass-production techniques of nanostructures. “The collaborative research partnership between the Center and industry is accelerating the development of nanotechnology-based products that can impact a number of industries, including healthcare and energy,” stated Ahmed Busnaina, director of the Center and prof. of mechanical and industrial engineering at Northeastern. “Our research is developing more cost-effective, safe, and highly reliable processes that can be scaled up for large-scale manufacturing.”

Established in 2004, the Center now has more than 160 researchers and staff members working on developing nanoscale processes and applications. Leadership includes deputy director Joey Mead, prof. of plastics engineering at UMass Lowell; associate director Glen Miller, prof. of chemistry and director of UNH’s materials science program; associate director Carol Barry, prof. of plastics engineering at UMass Lowell; associate director Jackie Isaacs, prof. of mechanical engineering at Northeastern; and associate director Nick McGruer, prof. of electrical and computer engineering at Northeastern.

by Dr. Paula Doe, contributing editor, SEMI

MEMS-based systems were a $46 billion business in 2008, and despite the recession should still see 12% compound average annual growth (CAGR) through 2012, burgeoning to an $83 billion industry. That will mean a $13 billion market for MEMS devices and the equipment and materials needed to produce them, according to this year’s annual report on the MEMS supply chain from SEMI and Yole Développement.

Despite the downturn, production continues to move to 8-in. wafers, and to MEMS foundries. Though there’s currently an excess of installed 8-in. capacity, investors and customers are now insisting that even companies with initially relatively small volume products must have a roadmap to 8-in. production from the beginning. Any application aimed at high volume consumer markets has to look at 8-in. production going forward. And any device that needs to integrate with sophisticated ASICs made with even semi-current CMOS processes has to look at 8-in. production now.

Yole projects 8-in. wafer usage will jump 31% next year to some 14% of total wafer starts and maintain 24% CAGR through 2012, while 6-in. usage averages only 7% annual growth; the sector should be using 8-in. wafers for 19% of its total wafer starts by 2012. Though most volume products will move some production to 8-in., major demand will come from the established large-volume consumer products, inkjet heads, and digital light processors, as well as from the emerging but potentially large and cost-driven market for RF MEMS for handsets.

MEMS production also continues to move steadily to foundries, as some major MEMS manufacturers start outsourcing production, and fabless companies continue to startup and expand their business. What will this look like in the future? Yole estimates the roughly 13% compound annual growth for the MEMS market for the decade 2006-2016 will generate about a $20 billion business in 2016. If foundries gain the same 10% share of production that they have in the more mature semiconductor market, that would mean a $2 billion MEMS foundry business.

Big IDMs STMicroelectronics and Texas Instruments currently dominate the MEMS foundry business with their contracted production for select customers, accounting for slightly more than half of the total ~$400 million in production of the top 20 foundries last year. Both these producers saw double-digit declines in their foundry revenues last year because of their particular customer base. But the crowd of open MEMS foundries with revenues clustered in the $15M-$30M range managed healthy double-digit growth making newer devices.


Figure 1. Annual growth rate 2008 vs. 2007, on US $ basis. (Source: SEMI, Yole))
CLICK HERE to view larger image

MEMS systems used some $6.9 billion worth of MEMS devices last year, and will likely maintain a similar level of demand this year, before a sharp recovery in 2011 and 2012 expands the market to some $12.4 billion, generating average 12% CAGR for the period.

Demand for materials for MEMS should generally continue to increase in line with increasing unit volumes, but the relentless drive to reduce die size to squeeze into handsets and portable gear, and to reduce costs, is limiting growth in materials consumption. Total MEMS materials demand should maintain relatively stable 8.8% CAGR through the next five years, rising from $309 million in 2008 to some $470 million in 2012.

On the equipment side, however, existing overcapacity in the face of the recession continues to limit capital expenditures. Tool demand dropped to $142 million in 2008, but should jump back up to $510 million by 2012.

SEMI puts together this market study each year with Yole Développement to meet members’ expressed need for better information on how developments across the diverse range of MEMS applications impact manufacturing technology, and what that means for MEMS equipment and materials suppliers. The report is available to SEMI members as a complimentary benefit of membership to help them grow their business, at www.semi.org/mems. Others can purchase it directly from Yole Développement by contacting David Jourdan ([email protected]”).


Figure 2. The MEMS supply chain size, 2008-2012. (Source: SEMI, Yole)

August 24, 2009: Carbon nanotube developer Surrey NanoSystems says it has secured a second round of funding totaling £2.5M (US $4.2M) to help commercialize its low-temperature growth process for carbon nanotubes, targeted for use as a replacement for copper interconnects in semiconductor devices.

Investors participating in this round include Octopus Ventures (£1.75M/$3.0M), with the rest coming from Surrey’s initial venture capital investor IP Group and the U. of Surrey, as well as other investors. The company was spun out of U. Surrey’s Advanced Technology Institute in 2006.

Typical CNT growth requires ~700°C deposition temperatures, but the company says it has developed a fabrication system and process enabling ~350°C temperatures, usable in silicon-based semiconductor manufacturing processes. “If you can solve the problem of growing precision carbon nanotubes at silicon-friendly temperatures — and we have — it opens up a massive potential market,” says Ben Jensen, CTO of Surrey NanoSystems, in a statement. “We expect to be the company that is able to offer a viable new interconnection process for high-volume semiconductor fabrication.”

After an initial focus of providing equipment to developers researching and prototyping CNTs, the firm will use the new funding to scale its hardware and optimize the materials process technology from its current 100mm wafer-size capabilities to a mass-production friendly 300mm wafer-size. A SEMI interface also will be added to the equipment for integration into wafer-processing cluster tools. The firm says it also is “pursuing technology partnerships” with both chipmakers and cluster tool suppliers.

The new funding will be used to scale the company’s materials growth technology from its current 100 mm wafer size capability, to the 300 mm sizes used in commercial wafer fabrication plants. Surrey NanoSystems will also add an industry-standard SEMI interface to its process equipment, allowing it to be integrated easily onto standard wafer-processing cluster tools. Alongside this development work, Surrey NanoSystems is pursuing technology partnerships with both semiconductor manufacturers and volume cluster tool suppliers, to shorten the path to market for its technology.

August 21, 2009: In what seems to be a bid to expand beyond its auto position into an increasingly crowded (and promising) consumer sphere, Robert Bosch’s US division is acquiring MEMS microphone maker Akustica for an undisclosed amount.

Financial terms of the deal were not disclosed, though the companies said all Akustica employees (totaling 36 in Pittsburgh, PA) will be folded into Bosch’s Sensortec unit, but operate as an independent subsidiary.

Akustica’s technology centers on digital and analog microelectromechanical microphones featuring CMOS technology, which allows integration of transducer elements and associated ICs on a single silicon chip. This complements Bosch’s MEMS activities and also its “growing” semiconductor business, noted Stefan Kampmann, EVP of Bosch Automotive Electronics, in a statement.

The two firms cite Lux Research statistics touting the promise of the MEMS microphones sector: 30% CAGR, and by 2012 $2.5B sales and 1B unit shipments, much of this coming from inertial sensors and microphones.

Mapping US nanotech efforts


August 21, 2009

August 20, 2009: Nanotech efforts in the US have spiked 50% in just the past two years, and the “map” of work is decidedly concentrated in a few locations, according to an analysis and graphic representation just released by the Project on Emerging Technologies (PEN).

Over 1200 companies, universities, government labs, and other organizations are involved in nanotech, from research and development to commercialization, up from 800 two years ago. “There is now not a single state without organizations involved in this cutting-edge field,” notes PEN director David Rejeski, in a statement.

Top four states are familiar: California, Massachusetts, New York, and Texas; Ohio has moved up four spots to six place, and NC is now among the top 10. At a more local level, top “Nano Metro” clusters include the greater Boston area (including neighboring Middlesex/Essex counties), California’s Bay Area (San Francisco, Oakland, and San Jose), and North Carolina’s “Triangle” region, specifically Raleigh. Top 3 sectors for companies working in nanotech (>200 entries) include materials, tools and instruments, and medicine/health. 182 universities and government labs are identified as working in nanotech, PEN says.

PEN’s Google Maps-powered layout of US nanotech efforts, built using Google Maps, brings the prominence of these regions into better clarity; it also is interactive, allowing drilldown into individual regions.

With surging growth in nanotech-based goods from $147B in 2007 to $3.1T in 2015 (citing Lux Research estimates), Rejeski calls this nano-map “a work in progress.”