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By Shari Farrens, SUSS MicroTec

More MEMS companies are going fabless every day and pushing production and process development to contract manufacturers and foundries. The commercialization of MEMS products, especially more consumer-oriented products such as portable displays, accelerometers for game units and gyros for image stabilization in digital cameras, are significantly changing manufacturing methods and tool sets.

According to Yole Development, there are roughly 24 foundries and contract manufacturers fabricating more than 85 percent of all MEMS devices worldwide. These companies have a revenue base just shy of $300 million today and will approach $500 million by the end of the decade. With rapid product ramps and decreasing margins on consumer products, it is essential to go to automated manufacturing techniques. This is especially true for assembly techniques such as wafer bonding.

Wafer bonding is a first-level packaging step in which the functional MEMS device is capped or sealed just prior to end-of-line packaging and testing. Historically the moving components are fabricated via sacrificial or surface micromachining methods in a starting substrate. The cap wafer is a second substrate – glass or silicon – that is placed on top of the finished devices to seal the small mechanical components from the outside world.

To complete the device fabrication the two wafers must be aligned and then permanently bonded to one another. In order to maintain margins and increase die density, devices have shrunk and alignment accuracy has become increasingly important. Maintaining alignment accuracy and monitoring the registry is an important and critical component of yield in MEMS manufacturing.

There are several key nodes in production flow where alignment accuracy can be measured and monitored. Process control monitoring starts with the very first set of alignment keys that are placed on the surface with lithography masks. By the time the device is ready for bonding, as many as ten or more mask layers may have been used, and it is important to understand whether there has been any deviation – run out – during these process steps that will prevent die to die alignment across the full wafer surface. Typical values for run out errors fall into the 0.1 to 0.5 micrometer range.

When the wafers go into the bond aligner they are aligned relative to one another with less than 0.1 micrometer offset. The associated mechanical motion and clamping of the substrates into position during the alignment step can lead to shifting. In a production environment it is imperative that post clamp accuracy be monitored and recorded automatically.

This requires that the automated aligner software have a high degree of flexibility to simultaneously determine the overlay accuracy of the two alignment keys and provide the option for switching of viewing mode to examine the wafers after they are clamped in position. All good bond alignment systems allow for this examination and the ability to back up and repeat the process until the required specifications are met.

The final step is transfer of the aligned pair to a thermal compression bonder for permanent bond formation. The thermal expansion during annealing must be symmetric and is controlled by independent upper and lower heaters with a temperature uniformity of less than or equal to one percent. It is recommended to use an air column approach for the applied force during the annealing cycle so that no shear forces are applied to the stack and induce additional shifting.

Once bonded, the wafer pair would normally be placed in an exit cassette for human assessment by off-line metrology. In the new generation of production bond clusters it is now possible to return bonded pairs to the aligner immediately after annealing for in-line metrology. The software automatically checks the alignment and records any deviations from the recipe setpoints for allowed limits.

The software is so advanced that wafers that are out of specification can trigger calls to the production manager and/or cessation of the production run. This level of automation is a first for MEMS manufacturing and enables hands-off operation of production wafer bonders with forecasted results. This revolutionary in situ metrology capability prevents lost lots because any process excursion is immediately identified and dealt with.

It now appears as though the MEMS industry will once again follow some of the IC trends: lowering manufacturing costs through higher volumes; standardizing processing; and automated foundry fabrication. The ability to produce MEMS products with less human interference will indeed lead to lower cost manufacturing and higher yields, but only if safeguards can be put in place. Using in situ metrology to check bonding is an essential step along that path.

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Shari Farrens is chief scientist, wafer bonder division at SUSS MicroTec (www.suss.com) in Waterbury Center, Vt.

By Roger Grace

Technology clusters – geographic concentrations of companies, suppliers and institutions specializing in a particular field – first became prominent in the Route 128 area of Boston in the early 1940s to support U.S. military involvement in World War II. Silicon Valley, in turn, saw its first technology cluster develop to support the meteoric growth of the semiconductor industry in the early 1960s.

They are two notable examples of cluster development. Clusters have provided their constituent organizations with competitive advantages, including cost efficiencies and faster time-to-market. They have also created jobs and wealth for employees and the host localities and regions. A look at successful clusters reveals a pattern – a set of components that evolve on their own, and are also encouraged and promoted by public and private institutions and individuals.

Intellectual property

Most high tech clusters originally form around centers of intellectual property creation, either through government-funded laboratories or research-based universities. People who have worked for these institutions, who are gifted with great ideas and an entrepreneurial spirit, venture off on their own to found companies.

These people can form the seeds of a tech cluster. They often wish not to move themselves and their families to other communities and they want to take advantage of the business and social infrastructure within which they have developed. They tend to create organizations in close proximity to their former employer.

Access to capital

However, those nascent entrepreneurs can’t go it alone. Although the world of capital formation has no physical boundaries, investment firms tend to have offices in close proximity to cluster areas in which they have invested. In the case of Boston’s Route 128, initial investments were made in the 1950s and 1960s out of offices in New York City, the U.S. financial capital. But those New York investment firms soon set up offices in the Boston area, and Boston-based financial institutions created venture arms.

In the case of Silicon Valley, early investors came from outside the area, including from Los Angeles, the West Coast financial capital at the time, as well as from Boston and New York, before a significant financial infrastructure was set up locally in northern California. Funding sources need not be physically located with a cluster, but it certainly enhances effectiveness if they are.

Today, groups interested in encouraging tech cluster development try to recruit venture capitalists and other financial organizations to visit their areas and, if appropriate, co-locate satellite offices there to facilitate investment activity.

Although Boston’s Route 128 corridor and Silicon Valley received no direct federal funds – other than military contracts from the Department of Defense – most micro and nanosystems clusters also received direct investments in research funding, facilities or favorable tax considerations from their local and regional governments.

Infrastructure support

Achieving competitive advantage requires an infrastructure with human resources, plants, equipment and services. The availability of these resources can reduce time-to-market and product development costs. The local availability of well-trained legal, financial and business professionals in addition to technicians, machine operators, designers and a broad spectrum of consultants is also critical.

In the case of capital-intensive industries such as the semiconductor and micro and nanosystems industries, research and development facilities and prototyping facilities are important, as are access to raw materials. In some cases, a region will have a well-trained workforce that simply needs to embrace a new industry leader. Regions developing new clusters are building the workforce from the bottom up, starting with industry-oriented college training programs and facilities.

Effective communications

Finally, clusters must get the word out. Many tools exist, including – the most effective – the creation and hosting of technical conferences and seminars within the region. Many economic development agencies sponsor commercial conferences and host events where the region’s organizations can showcase their technologies to a broad audience. In addition, traditional vehicles, including media and public relations campaigns have been used very effectively by various clusters.

The first microsystems-specific cluster was established in Dortmund, Germany, in 1986. Since then, more than 1,500 high-skill and high-paying jobs have been created by local companies in the region. On a global scale, microsystems clusters have created more than 100 firms worldwide and thousands more jobs. While the organic evolution of such clusters is always welcome, the explicit cultivation, funding and support of them is the most telling sign of their success.

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Roger Grace is president of consultancy Roger Grace Associates in Naples, Fla. (www.rgrace.com). He is the past-president and co-founder of MANCEF. Mahendra Ramsinghani and the Michigan Economic Development Authority assisted in the research for this article.

Oh say can you see?


September 1, 2006

Seeing is believing, at least for the Guinness Book of World Records, which recently turned down a submission from a team of University of Texas students who spent months building a three-dimensional, seven-micron-tall American flag that they claim is the world’s smallest.

The image of the flag, which includes all 50 stars and 13 stripes, was transferred onto a silicon wafer. Then the flag and its pole were cut using an ion beam and lifted to a standing position by a nano-manipulator.

The reason it was rejected by Guinness? “They told us they don’t have a method to actually see the flag,” said JangBae Jeong, one of the electrical engineering students on the design team.


Researchers at the University of Texas at Dallas claim to have built the smallest American flag in the world – shown here in a colorized image – but the Guinness Book of World Records wants better proof. Image courtesy of The University of Texas at Dallas
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Moon Kim, the engineering professor who oversaw the team, was disappointed by the rejection. “Even though we provided them with all the information and have witnesses to attest to its size, they said they had no way to judge it because it’s too small.”

But, he adds, he won’t dwell on the loss. He considered resubmitting the material, but decided not to because he is “busy working on cooler stuff.” That includes designing the world’s smallest book, complete with tiny pages and full text. Once that’s done, said Kim, maybe the Guinness Book will be ready to reconsider its point of view.

– Sarah Fister Gale

By Joe Brown, SiTime

Silicon resonators are by no means novel technology. They have been demonstrated in laboratories for more than 30 years. In comparison to quartz crystals, performance for silicon vibrating beams was elusive due to several factors that have significant influence, such as drift, temperature sensitivity, instability and hysteresis. Today silicon-based resonator technology has dramatically advanced with the use of standard semiconductor processing and low cost packaging, meeting the size, cost and reliability expectations of customers seeking to integrate these devices.

MEMS processing has enabled micro-scale mechanical elements, that when packaged with CMOS circuitry, create a silicon-based oscillator capable of unmatched performance. To differentiate and advance from typical MEMS-based products was the motivation behind technology invented by Bosch, now licensed by SiTime, an integrated circuit company developing silicon timing, clock and RF chips. The chips incorporate MEMS timing reference devices inside standard silicon electronic chips, eliminating the need for quartz crystals.

It has been said that 70 percent of the cost of MEMS devices is due to packaging and testing where special processing is often required. For decades, MEMS-based “killer applications” had been expected but in reality had been limited to sensors and actuators. These days MEMS have emerged with high quality, high reliability and competitive prices to advance optical display technology, microphones and time reference.


SiTime is seeking to unseat quartz with its MEMS chip. Photo courtesy of SiTime
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The time reference application described in this article uses mainstream semiconductor processing and has been accepted as compatible with CMOS at many factories producing nano-scale features on 200-millimeter wafers. The inventions of the MEMS First and EpiSeal processes have provided process conditions that create a pure – ultra-clean – encapsulated environment that enables silicon to resonate without deviation. As a result the silicon area is optimized for active device performance, not requiring a protective cap as in other MEMS-based solutions that adds cost, process complexity and is not readily available at advanced CMOS factories.

Today quartz crystals are common and often the only alternative for precise time-based solutions. Quartz is a wonderful material but has limits in size and cannot be integrated with silicon. When polished to specific levels quartz will vibrate at one frequency, so multiple crystals are required for multiple frequencies. On the other hand, silicon can be shaped and fabricated using photolithographic and etching processes, which are the basis for defining the frequency of a device. As a result, many different frequencies can be fabricated next to each other on a single chip.

The process begins with a silicon on insulator (SOI) wafer where the device layer – above the oxide – of single crystal silicon will be formed into the resonant structure(s). Another Bosch creation, deep reactive ion etching, or DRIE (also known as ICP, or inductively coupled plasma) then forms the beam structure. Following this etch process, the entire surface is covered with a thin layer of silicon oxide (SiO2). A thin layer of silicon (Epi/Poly) is grown and deposited on top of the oxide, and this layer becomes the foundation of the wafer level encapsulation that follows.

Small holes are then drilled into the silicon cap just above the mechanical element. The moveable structure at this time is fully surrounded in silicon oxide. It is ready to be set free to move and is released with the introduction of hydrofluoric acid. The acid etches away the sounding oxide from the beam. With the beam free to move (vibrate), the protective cover is processed further, built up using common process conditions for this process step (high temperature) that create the ultra-pure environment required for high performance. Silicon is again grown and deposited, sealing the small holes. This high temperature process has a self-cleaning effect on the area surrounding the structure.

Performance is solid since contaminants such as moisture and organics have been removed from the device environment. Single-digit part-per-million stability is realized, maintained under aggressive temperature cycling (-45 degrees Celsius to +85 degrees Celsius) and has been demonstrated over long-term drift analysis over one year. Reliability is also improved: Silicon sensor technology with a similar makeup has demonstrated complete shock and vibration immunity at the range of use.

The existing market consists of 10 billion sockets ready to adapt to a change from quartz to silicon. With advantages in size, cost, reliability, function and ease of use, silicon is at the forefront of another technological revolution.

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Joe Brown is head of strategic alliances at SiTime Corp. (www.sitime.com) in Sunnyvale, Calif. and a board member of MANCEF.

By Jay Lyman

Manufacturers and other MEMS players have come to realize the importance of incorporating packaging into the design and manufacturing process. However, they are still facing the difficult task of balancing a design for manufacturability approach with outsourcing of fabrication, an increasing necessity given the requirements and cost of high-volume facilities.

Companies navigating this confluence of design forethought and outsourcing must know what manufacturing variations they and their MEMS products can live with, and come up with a strategy that will enable the high volumes and high yields necessary to find a manufacturing partner, according to Farrokh Ayazi, associate professor in the School of Electrical and Computer Engineering at the Georgia Institute of Technology.

“If you don’t maintain a high volume, the manufacturing houses that maintain tight specifications are not going to take you seriously,” Ayazi said. “They won’t even talk to you.”

Choose wisely

Before getting to volume, organizations focused on MEMS solutions are waking up to the fact that there must be a compelling, workable application for their products, given that the days of investing in technology for its own sake have passed.

At the same time, organizations must make sure they are designing for manufacturability from the start, including packaging, which is no small task, according to Concurrent Design and Drafting Principal Tom Ortman, whose Texas-based firm provides engineering design and build services.

“When you move that part of the process up front, you’ve essentially created more variables and more complexity,” he said. “This doesn’t make it easier doing these things in parallel rather than sequentially. It is clearly a more difficult process to be able to account for variables and added levels of complexity.”

Add the outsourcing of MEMS fabrication to the mix, and it becomes an even more difficult proposition. However, this is not to say it can’t be done, say Ortman and other experts, who stress that the selection of the right manufacturer becomes even more critical.


Farrokh Ayazi, associate professor in the School of Electrical and Computer Engineering at the Georgia Institute of Technology, advises would-be designers to “design your product to be process tolerant.” Above, he holds a wafer with integrated RF MEMS components while the monitor shows a MEMS navigational-grade gyroscope. Photo courtesy of Georgia Electronic Design Center (GEDC)/Georgia Tech
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“You would be best served by having a good understanding of a manufacturer’s capabilities, and be able to design a product within or to those capabilities, optimizing manufacturer capabilities so when you get to manufacturing, they’re not seeing it for the first time and you have designed things that would work well within those capabilities, not outside their abilities or dimensional size. The trick in that is kind of a subtle one,” Ortman added. “You want to choose the best vendor to design a product, yet you don’t have a product to design yet. You don’t have anything to show him at the beginning.”

In addition to capabilities, MEMS companies looking for a foundry partner must also consider other factors, including qualifications, availability, and cost, Ortman said. He said the model of combining design for manufacturability with outsourcing of MEMS fabrication can work, provided the fabless company has two things: the ability to dedicate skills in smaller, niche application areas; and a business team capable of supporting the effort with money, supplies and the right foundry partner.

“Those two things really are the two pieces of the puzzle that work extremely well at a macro level,” Ortman said, indicating a large number of fabless MEMS and semiconductor companies are leveraging the foundries in order to “do what they do best.”

Know their limits, and yours

Ayazi, who researches micro and nano electromechanical resonators at the Microsystems Packaging Research Center, stressed the sensitivity to process variation in MEMS fabrication. He highlighted industry awareness of the need for design that includes packaging, but said there is less awareness of the need for a wider design for manufacturability approach.

“The solution to that is to design your product to be process tolerant,” he said, indicating that the manufacturers are able to specify their parameters, and expect the same of their fabless partners.

“It will all come down to yield and cost,” Ayazi said. “If the variations drop the yield, then you don’t have a deal with a manufacturer.”

In addition, he stressed the need for both a robust design that can be manufactured and the use of critical materials that are well characterized and reproducible. He also said fabless MEMS companies should expect that some common questions from the manufacturers – including variation, yield and cost – will all be considered hand-in-hand with packaging.

“Those are the types of questions you’re going to get as soon as you start talking to them,” he said.

‘S’ is for systems

Dave Monk, an operations manager with Freescale Semiconductor, says it’s important to remember that the “S” in MEMS stands for systems. MEMS products must be designed as systems from the start. For Freescale, this has meant pulling different organizations and teams together to collaborate, thereby necessitating fewer processes.

“You really do a design for an entire system,” he said.

Monk also said time has taught him that materials changes need to be taken seriously, and the proper investment needs to be put forth. Once an organization focuses on a particular MEMS process and application and has factored in packaging and manufacturing, then it is ready to take advantage of the manufacturing power of a foundry, which enables more entrepreneurial spirit, according to Monk.

“It’s a little bit of a self-fulfilling prophecy,” he said. “To get to that level of maturity, you can go out to the foundries.”


Brad Nelson, VP of operations at TeraVicta Technologies, says that the demands of tightly integrated design mean that sometimes it’s easier to build your own product first before approaching a fab. TeraVicta makes MEMS switches like the ones pictured here. Photos courtesy of TeraVicta
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Monk also referred to a maturation of the MEMS industry, which while still 15 to 20 years behind the fabless CMOS model, is rapidly advancing. Going back to the beginning of the trend toward outsourcing of fabrication in CMOS, Monk said there was not the same level of design maturity that exists today in MEMS.

“I see the foundry mentality growing up,” he said.

What is more similar to the old CMOS outsourcing model is the need for fabless ventures to be able to provide some basic business metrics, including cost and yield, for their foundry partners, Monk said.

“MEMS is getting to where those cost metrics are more important,” he said.

Take measured steps

Given the novelty of MEMS technology compared to semiconductors, it can be difficult to take the fabless route right away, according to Brad Nelson, vice president of operations at TeraVicta Technologies, which makes MEMS switches for electronics, telecom and other applications.

“In the case of MEMS, the technology is so immature relative to building integrated circuits,” Nelson said. Rather than initially look outside for foundries for manufacturing and packaging, TeraVicta incorporated design into its own small fab facility to get started before seeking a foundry partner.

“From day one, we’ve concentrated on having all the fundamental expertise, as well as a small fab to develop the technology,” he said. “For high volume, we’ve hired a high-volume manufacturer who will transfer our technology.”

Nelson explained TeraVicta’s manufacturing partner, Hong Kong-based China Resources Semiconductor, was willing to take TeraVicta’s technology and run with it – something TeraVicta or other small MEMS companies cannot do on their own. “They were willing to invest in our technology and transfer our technology,” he said.

Support your outsourcing

Nelson stressed that until organizations can whittle MEMS manufacturing down to a handful of processes, which is not currently the case, the fabless model will continue to pose unique challenges. However, once an organization is ready to take their MEMS to higher volume, the usual rules of outsourcing apply, Nelson said.

“You have to work very closely with them, which means spending significant resources to make them and yourself succeed, instead of (the) over-the-wall design and mask, make me X units per month (type of approach),” he said.

For TeraVicta, that has meant substantial travel for both the company’s and its foundry’s engineers.

“In the case of new technology, it’s also about helping them understand,” Nelson said. “You have to build that infrastructure while you’re having to maintain a significant infrastructure of your own,” he added, indicating this task is often underestimated by fabless semiconductor companies.

Nelson said he does not see the challenge getting any easier soon given the many, various MEMS flavors and many processes within those. And while even large companies that outsource significant chunks of their volume sometimes struggle to maintain mindshare and fab capacity, companies can leverage design and outsourcing together with the right approach.

“We haven’t achieved a perfect balance, but we’re going into it with our eyes open,” Nelson said.

China Resources Semiconductor Co. Ltd.
www.crsemi.com

Concurrent Design and Drafting
www.concurrentdesign.com

Freescale Semiconductor
www.freescale.com

Georgia Tech College of Engineering Microsystems Packaging Research Center
www.prc.gatech.edu

TeraVicta Technologies
www.teravicta.com

By James R. Dukart

On a stifling hot summer day in New England, Dan Coughlin probably likes nothing better than the shade of a nearby nanotech fabrication laboratory.

It may look like Coughlin is heading for the shade of a tree, but to Coughlin – co-chairman of the nanotechnology initiative for the American Forest & Paper Association – the green, leafy structure he is parked beneath is nothing less than a complex, living nanotech lab. It may very well, in fact, hold keys to “green” manufacturing and supply chains through the use of nanotechnology.

“If you look at the processes within a tree, you can think of it as being your manufacturing process,” Coughlin said. At a cellular level, he explains, trees both host and manufacture a “cornucopia” of naturally-occurring nanomaterials – including the building blocks for a host of sugars, alpha and beta-celluloses and lignin, a complex polymer that binds to cellulose fibers and strengthens the cell walls of plants.

Coughlin argues that current manufacturing processes take the product of that tree – wood, mostly – and either turn it into finished products, such as paper and lumber, or burn it, spending its molecular energy as fuel to catalyze other processes. Nanotechnology promises to offer a different approach: the study and use of nanomaterials already in the tree – as production elements themselves or as examples of processes that can reduce the use of raw materials. Using fewer raw materials means cutting pollution and energy costs, and in turn protecting the environment.

The American Forest & Paper Association believes so strongly in nanotechnology that it has created a roadmap for nanotech in the forests and committed $40 to $60 million per year to research and development marrying trees and nanotech. Early successes include the separation of lignin in lumber production for use as a replacement for petroleum in plastics manufacturing.

Another green chemistry and nanotechnology proponent, Jim Hutchison, director of the Materials Science Institute at the University of Oregon and leader of the Safer Nanomaterials and Nanomanufacturing Initiative at the Oregon Nanoscience and Microtechnologies Institute, targets semiconductor manufacturing for greening. Citing a calculation from researchers at the United Nations and National Science Foundation, Hutchison notes that traditional manufacturing methods require some 1.7 kilograms of energy and raw material to produce a typical 2-gram DRAM chip. “The process might take 10 or 11 steps, and nearly everything you see is thrown away,” Hutchison says. “The photoresist, cleaning solutions, solvents, even most of the metal is discarded.”

Contrast that to biomolecular nanolithography, something the Hutchison lab is actively working on. The lab uses self-assembly of nanoparticles on biopolymeric (DNA) scaffolds to form lines and more complex patterns. The resulting molecularly integrated nanocircuits, Hutchison notes, contain all raw materials used in production – with zero waste.

Another way to use nanotechnology to green up manufacturing processes is to alter the agents, solvents or reagents used in processes. Hutchison’s lab has patented a method for producing gold nanoparticles stabilized with triphenylphosphine, using water as a solvent rather than benzene. The result of this change in reagents is a faster, cleaner and far less expensive manufacturing process – the lab can now produce the particles for $500 per gram, dramatically less than what it had cost to have them made using traditional methods.

“The place to start is to green up the existing process,” Hutchison said. “What agents are you using? Can you use a catalytic process at room temperature? Can you use microwave heating instead of thermal heating? Are you incorporating all the atoms of the material or are many being wasted in the process?”

Barbara Karn, a visiting scientist at the Woodrow Wilson International Center for Scholars Project on Emerging Nanotechnologies, sees big things ahead in the way catalysts are used to bring nanotechnology to manufacturing. “In the 20th Century, catalysts were being made more efficient,” Karn said. “With nanotechnology, they can be made more specific.”

John Warner, director of the Center for Green Chemistry at the University of Massachusetts Lowell, sees another benefit to the use of more targeted catalysts and benign reagents and solvents: the ability to manufacture at much lower temperatures, saving both the energy needed to heat chemical reactions and the waste heat generated by the processes.

“Look at the mineralization of bones and seashells, and they don’t need extreme heat,” Warner said. “Using bioinspiration we should be able to figure out how to do things at room temperature that are now being done at heats of 500 degrees Celsius and higher.”

One of Warner’s key research areas is noncovalent derivatization, essentially the use of natural forces to construct materials rather than using heat or light to break things apart. “We have to focus on the non-obliterative technologies,” Warner said. “Instead of the typical (processes), where you shine a laser on something and blow something else away, we want to look at the molecular level and create from the bottom up.”

Another alluring combination of nanostech research and green manufacturing is the promise of true life-cycle product planning. Hutchison refers to Sea-Nine, a marine antifoulant used on the hulls of ships that has been specifically designed to degrade into environmentally benign substances as it flakes off into seawater.

While Sea-Nine is more a product of molecular engineering than nanotech, Hutchison sees excellent life-cycle management possibilities using nano. “Hopefully we can make nanomaterials that serve some purpose out in the environment but are designed so they rapidly degrade into harmless materials when the end of their life occurs,” he said.

Karn says true life-cycle management follows a product from manufacture through use and disposal. Nanoscale products, she notes, have an inherent advantage in terms of waste reduction. “Pollution is waste,” she said. “Say you take a dendrimer and put a drug inside it and decorate it with something that is specific to the target cells. Making the drug that specific is an aid to the environment.” It’s one among an increasing number of examples where economic and environmental concerns are in synch.

American Forest & Paper Association
www.afandpa.org

Center for Green Chemistry, University of Massachusetts Lowell
www.greenchemistry.uml.edu

Wilson Center Project on Emerging Nanotechnologies
www.nanotechproject.org

Safer Nanomaterials and Nanomanufacturing Initiative
www.uoregon.edu/~cgnn

I have long been stating that it is especially important for companies working in the field of micro-nano and molecular technologies to properly assess their true market opportunities. This is simply because these companies – which are, in essence, highly sophisticated material processing companies – are normally very capital intensive, have high fixed costs, and therefore need a sufficiently large market to justify their expensive cost structures.

In many cases, it appears that the markets served are just not big enough to justify a company’s capital expenditures. Some companies try to escape these constraints by trying to develop some sort of platform strategy. For example, the company might develop many different products serving completely different markets using the same technological base. However, it remains to be seen whether this concept can really work out well for nanotech companies.

I therefore strongly recommend that these companies, in their discussions with investors, should not only focus on the technological aspects of their work, but also give a very credible analysis about precisely which market or markets they are targeting, and provide specifics about how they are going to achieve their goals.

We who invest in publicly-traded companies normally don’t have a sufficient understanding of the technology, but we understand terms like market share, competitive situation, projected revenue growth and margin projections. If you want to convince us that your all-embracing technology platform is going to solve major problems in information, energy or materials, then show us your numbers. Technology stories are fine, but make the business case.

Unfortunately, without a clear pathway into a possible industrial implementation, R&D alone won’t be sufficient to economically drive down production costs. It’s the direct and immediate diffusion into the market that enables us to drive down the cost curve through economies of scale – the steady ramp-up of even more efficient production facilities. And once unleashed, it’s the market itself that really will help us to accelerate innovation more than anything else.

Sometimes the market needs to be nudged in the right direction before it can have its impact. One need look no further than the photovoltaics market for a good example. For more than two decades, thousands of researchers all over the world were working on improvements in the material to maximize the conversion efficiency of light into electricity. And yet the real breakthrough for the implementation of solar energy into our electrical grids did not come from any new revolutionizing scientific breakthrough. Rather, it is coming in the form of the political will to prepare the market for this new type of electricity generation.

First in Japan, then in Germany, and now in more countries all over the world, there is a growing trend toward creating political incentives to loosen the world’s dependency on hydrocarbon energy resources. The foremost “solar incentivized” markets exploded, inducing a rapid virtual cycle through cost and efficiency improvements. In Japan today, the subsidies are no longer necessary, and photovoltaics is becoming competitive for electricity delivery.

More countries are going to follow over the next decade. This entirely new market opened up and accelerated considerably the search for new, more efficient and cheaper material developments, starting from new thin-film technologies based on amorphous silicon to cheap polymer materials.

All this shows us that for a better appreciation of micro and nanotechnologies in the economy and in the perception of investors, we need the market first and foremost. In conclusion, focus on the market, be it with or without governmental support. With the increasing importance of micro and nanotechnologies not only in the sectors of energy and the environment, but also in information technologies, healthcare, consumer products, and many other areas, well placed companies should not be too embarrassed to include in their “investment stories” also a “margin” and a “market” story.

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Thiemo Lang is a specialized fund manager at Lombard Odier Darier Hentsch & Cie in Zurich. He can be reached at [email protected].

By Steve Nasiri, InvenSense

Motion sensing is quickly becoming the next critical technology to enable innovative applications for the handheld consumer market. Device makers are demanding motion sensing in order to develop solutions that address a range of challenges, from blur-free camera phone pictures that will spark more wireless image sharing to gesture-based commands and more intuitive user interfaces.

While motion-sensing devices have existed for some time, the current generation of products is unsuited to the mobile handset market. These devices are discrete, bulky and expensive for a high-volume industry where components are evaluated based on millimeters and cents. They are often composed of single-axis ceramic or quartz-based gyroscopes, cobbled together in a module with an add-on three-axis accelerometer. This multi-component architecture is a barrier to entry, with different mixes of technology, output signals and calibration performance. Making these devices work together is challenging and too costly for mainstream consumer applications.

The solution to motion sensing challenges for handheld devices lies in the development of miniature integrated motion-sensing devices, or IMUs (inertial measurement units), that measure all axes of motion. Such devices can integrate three axes of angular rotation and three axes of linear motion into a small silicon chip. Unlike single accelerometers, IMUs will offer greater precision, better responsiveness and easier integration into multiple applications.


Tiny inertial measurement units could add a new “twist” to handheld devices by giving them a gesture-based user interface. Photo courtesy of InvenSense
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However the development of an IMU device poses significant technical and business hurdles, and to date no such products are on the market. While single-axis gyros, dual-axis gyros and three-axis accelerometers are more readily available, integration of all these sensing axes and accompanying electronics into a single die and package would be a breakthrough solution that could enable a whole new motion-sensing industry. At the same time, the solution must be manufacturable in consumer volumes – at a unit price point that meets industry requirements, currently $0.50 per axis.

InvenSense is a fabless MEMS company specializing in motion sensing technology that sought to tackle size, cost and manufacturability issues during the initial design phase. MEMS technology is clearly the correct choice for achieving miniaturization, integration and price by its inherent virtue of leveraging semiconductor-based fabrication processes. Although MEMS fabrication is cost effective, packaging and testing of MEMS devices have long been problematic. Because MEMS devices by definition are different than standard semiconductor dies, standard semiconductor packaging and assembly solutions could not be leveraged as efficiently – hence the old adage, “Eighty percent of MEMS device costs are in packaging and test.”

The main challenge is designing a MEMS solution that not only leverages standard fabrication processes, but also standard assembly and test technologies. InvenSense uses an approach called “wafer-scale integration” that combines finished bulk silicon MEMS with finished CMOS wafers at wafer level. The integration technology is completely CMOS-compatible and requires no additional material over aluminum. It allows for simultaneous electrical interconnections and mechanical hermetic sealing between the MEMS and CMOS wafers. This solution enables complete, finished MEMS wafers that can be handled and tested just like CMOS wafers, permitting packaging in standard QFN housings using standard semiconductor manufacturing lines. Special handling, custom assembly lines, cavity packages, multichip modules, etc., are eliminated.

The technology was applied to the company’s first family of products, the first integrated dual-axis gyroscope, addressing the immediate market need for image stabilization for digital still and video cameras. The silicon die measures 3.5 x 3.5 x 1 mm, and is packaged in a 6 x 6 x 1.45 mm QFN package. The second-generation silicon is 3 x 3 x 0.8 mm and will be packaged in a 5 x 5 x 1.3 mm QFN package.

The new dual-axis gyroscope chip is produced as two products with different specifications targeting two major application areas. The first is an image stabilization device for camera phones and digital still cameras (DSCs) that senses natural hand jitter in order to accurately correct for blurring due to low frequency hand motion. The second addresses the motion sensing market, with a full scale range of 400 degrees per second. It is used for applications requiring accurate tracking of hand or object motion.

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Steve Nasiri is chief executive of InvenSense Inc. (www.invensense.com) in Santa Clara, Calif.

By Richard Acello

An American Bar Association committee of attorneys has concluded that no major changes are required in statutes to bring nanotech products and processes under the jurisdiction of the Environmental Protection Agency.

Lynn Bergeson, chair of the ABA’s Section of Environment, Energy and Resources (SEER) and a partner at the Washington, D.C., firm of Bergeson & Campbell, says the panel’s review was spurred by the increasing use of nanotech in everyday products.

“Products such as food packaging materials are starting to involve nanotech,” Bergeson said. “Our hope is that the technology is applied with eyes wide open and with a good deal of common sense.”

From March through May of this year, more than a hundred SEER attorneys were organized into seven teams to consider whether the EPA’s current statutory authority was sufficient to bring nanotech products within its purview. The SEER attorneys produced seven papers on topics ranging from whether regulation of nanotech materials is included in the Clean Water Act to regulation of nanoscale materials under the Toxic Substances Control Act. The complete set of papers can be found at www.abanet.org/environ/nanotech. The SEER committee has already briefed EPA General Counsel Ann Klee on its work.

“Our goal was to provide scholarly, balanced reviews of these statutes to see if they provide EPA with the authorization to address nanotech products, and the answer is yes, they do,” Bergeson said.

While the ABA report finds existing statutes sufficient to regulate nanotech products, agencies may need to revise and update their regulatory schemes to include nanotech products.

“The devil is in the details,” Bergeson said. “There’s a lot we don’t know that involves data development, the retooling of screening procedures, and (EPA) needs to get a handle on that stuff, but we don’t need a new law. These laws are very elastic and well-suited to address nanotech issues and risks. Some of the regulatory programs will need to be amended, some tweaked and some re-thought to deal with nanotech.”

In addition to the EPA’s set of water, air and hazardous material legislation, nanotech products may be subject to regulation by other federal agencies. For example, nanotech manufacturers are subject to rules of the Occupational Health and Safety Administration (OSHA), and may be subject to regulation by the Food and Drug Administration (FDA), among others.

A tricky issue for regulators may be how much they’re likely to know about the potential risks of a nanotech product before it has been introduced into the stream of commerce.

“It’s a combination of EPA and the manufacturing sector and the user community appreciating that there are unknowns,” said Bergeson. “So if you don’t know, you minimize exposures, make sure (workers) are wearing the appropriate clothing and equipment, and minimize potential troubles through waste and shipment, using an abundance of caution.”

Europe has also been wrestling with nanotech regulation issues and appears to be leaning toward a model of nanotech regulation that involves more government oversight than in the United States. One issue for both European and U.S. regulators is whether nanotech products should be subject to government approval before they enter the stream of commerce. Pre-approval by the FDA is part of the government’s regulatory scheme for new drugs, but not for most products.

Bergeson counseled nanotech-related businesses to apply the technology prudently and to manage risks associated with nanotech “as you would any other business risk, but don’t ignore it.”

The seven briefing documents prepared by the American Bar Association’s Section of Environment, Energy, and Resources were as follows:

  1. CAA (Clean Air Act) Nanotechnology Briefing Paper
  2. CERCLA (Comprehensive Environmental Response, Compensation and Liability Act) Nanotechnology Issues
  3. CWA (Clean Water Act) Nanotechnology Briefing Paper
  4. EMS (Environmental Management Systems)/Innovative Regulatory Approaches
  5. The Adequacy of FIFRA (Federal Insecticide, Fungicide, and Rodenticide Act) to Regulate Nanotechnology-Based Pesticides
  6. RCRA (Resource Conservation and Recovery Act) Regulation of Wastes from the Production, Use, and Disposal of Nanomaterials
  7. Regulation of Nanoscale Materials under the Toxic Substances Control Act

The full text of each white paper and additional information about the SEER’s nanotechnology project is available online at www.abanet.org/environ/nanotech.