Wafer Level Packaging

WAFER LEVEL PACKAGING ARTICLES



Amkor record 2010 financials capital investments in 2011

02/10/2011 

Amkor Technology Inc. (NASDAQ: AMKR), semiconductor assembly and test services provider, announced financial results for 2010, with net sales of $2.94 billion, net income of $232 million, and earnings per diluted share of $0.91. Amkor is currently planning capital additions of approximately $500 million for 2011.

Stacked silicon interconnect is better than 3D stacking Xilinx

02/08/2011 

ElectroIQ caught up with Suresh Ramalingam, director of advanced package design and development at Xilinx, at the January MEPTEC luncheon, where he gave a presentation on the company's stacked silicon interconnect technology. In an interview with Debra Vogler, Ramalingam discusses SSIT in relation to die stacking and TSV.

Camgian integrates Air Force radar on chip with low power active logic

02/04/2011 

Under a 3-year, $9.3 million contract with the Air Force Research Lab (AFRL), Camgian Microsystems will develop two ASICs with ultra-low-power characteristics: an RF transceiver ASIC will use radar-on-a-chip technology, while a DSP architecture will integrate aggressive power management.

Clarkson U tallies 1.4M support from Intel

02/04/2011 

During the past ten years, Clarkson University has received more than $1.4 million of direct and indirect (through Semiconductor Research Corporation) funding from Intel Corporation.

Agilent Infiniium oscilloscopes gain deeper standard memory

02/02/2011 

Infiniium 9000, AgilentAgilent Technologies Inc. (NYSE: A) enhanced the memory depth of its Infiniium oscilloscope lineup. All 30 models now ship with the industry's deepest standard memory and offer the deepest memory options, according to the company.

Conductive pressure sensitive tapes films introduced by Creative Materials

02/01/2011 

Creative Materials Inc. announced a new series of pressure-sensitive tapes that suit use in the fabrication of solar cells and modules; to replace solder and/or conductive adhesive connections; or as bus bar materials for a wide variety of printed electronics applications, including touch panels, LCDs, electro-chromatic displays, and electro-luminescent displays.

RF MEMS packaging collab DelfMEMS KFM

02/01/2011 

DelfMEMS and KFM Technology signed a common agreement to combine their expertise in RF micro-electro-mechanical systems (MEMS) and thin film packaging (TFP) technology. DelfMEMS will use the collaboration to provide packaged MEMS switches, fixed capacitors, and high-Q inductors on the same chip.

The road ahead for SiPs

02/01/2011  With the proper up-front evaluation of SiP designs, a tool box of enabling technologies, and strong team interactions between all involved parties, SiP solutions can enable novel electronic products with faster time to market than would be possible with traditional scaling. Darvin Edwards, Masood Murtuza, Texas Instruments, Dallas, TX USA

QFN leadframes without plating etching waste or bulk EoPlex

01/31/2011 

EoPlex model showing different materials (colors) and different metastructures (patterns).Arthur Chait, president and CEO of EoPlex, describes the company’s high-volume print forming technology -- a lead carrier product called xLC-- and how it enables a cost-effective replacement for conventional quad flat pack no-lead (QFN) leadframes.

Low shrinkage adhesive for optical assembly

01/27/2011 

DYMAX OP-67-LS opto-mechanical adhesiveA fast-cure, low-shrinkage adhesive for optics and optical assembly, DYMAX OP-67-LS opto-mechanical adhesive cures in seconds for bonding of optical components. The product's low-shrink nature virtually eliminates movement during curing and subsequent thermal cycling.

Tessera director Bruce McWilliams SuVolta resigns

01/25/2011 

Tessera Technologies (Nasdaq:TSRA) announced that Bruce McWilliams, PhD, has resigned as a member of Tessera’s board of directors effective immediately, to devote his time and attention to the needs of SuVolta's growing business.

Thermal nano tape for semiconductor packaging

01/24/2011 

SRC and researchers from Stanford University have developed a combination of elements that yields a unique nanostructure material for packaging. This advance should allow longer life for semiconductor devices while costing less than current state-of-the-art materials.

Silicon Si interposers aim of CEA Leti SHINKO common lab

01/21/2011 

CEA-Leti signed a multiyear agreement with SHINKO ELECTRIC INDUSTRIES CO. LTD. to develop advanced semiconductor packaging technology. They will focus on volume production of silicon interposers.

Brush Engineered Materials changes name to Materion

01/20/2011 

Brush Engineered Materials Inc. (NYSE:BW) will change its name to Materion Corporation (NYSE:MTRN) and unify all of its businesses under the new name effective March 8, 2011.

Packaging, assembly changes coming in next ITRS Update

01/19/2011 

Dr. Phil Garrou looks ahead to a laundry list of changes coming in the next ITRS Update with respect to assembly and advanced packaging, including 3D integration, interposers, and applications from medical to automotive and embedded applications.

 

Advanced packaging collab Rudolph Technologies process tool supplier IC device manufacturer for defect inspection wafer debonding

01/18/2011 

The development effort involves the integration of defect inspection with a debonding tool. Manufacturing efficiencies, along with the ability to handle ultra-thin wafers, necessitates the integration of inspection in de-bonding applications. Rudolph is bringing its inspection technologies to this three-way collaboration to provide this integrated process control solution.

STATS ChipPAC expands wafer level packaging WLP with 300mm line

01/18/2011 

STATS ChipPAC Ltd. (SGX-ST:STATSChP), semiconductor test and advanced packaging service provider, expanded its wafer level package (WLP) offering with new 300mm manufacturing capabilities in Taiwan.

SMC 2011: Materials projections, and China as an island

01/18/2011 

The final day of SEMI's Strategic Materials Conference (SMC) dug deeper into rare earth elements supplies, deposition precursors, projections for semiconductor packaging materials and fab equipment, and a geopolitical perspective on relevant markets, reports Techcet's Michael A. Fury.

CEA Leti ramps 300mm 3D packaging integration line

01/17/2011 

CEA-Leti is expanding its technology offering, ramping up one of Europe’s first 300mm lines dedicated to 3D-integration applications. The new line is dedicated to R&D and prototyping and includes 3D-oriented lithography, deep etching, dielectric deposition, metallization, wet etching, and packaging tools.

JEDEC expands solid state drive SSD standards

01/12/2011 

JEDEC Solid State Technology Association, standards developer for the microelectronics industry, today announced that its JC-64.8 Subcommittee for Solid State Drives will target the development of standards for SSDs in applications beyond conventional disk drive form factors.




WEBCASTS



Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

Date and time TBD

As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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