Wafer Level Packaging

WAFER LEVEL PACKAGING ARTICLES



JV Installs SUSS Coater/Developer

08/14/2007  SUSS MicroTec delivered a 200-mm Gamma production coating and developer cluster to HD MicroSystems, LLC (Wilmington, DE), to support the company's polyimide and PBO material technologies. HD MicroSystems is a joint venture (JV) of Hitachi Chemical Co. Ltd. and DuPont Electronic Technologies. It will use the production cluster to support expansion into advanced packaging markets, said John Malloy, U.S. marketing and sales manager, HD MicroSystems.

MEMSConcepts.com launches idea-exchange platform

08/09/2007  MEMSConcepts.com has officially launched its membership-based network to join innovators and idea seekers.

Investors Back Vietnam Packaging

08/06/2007  Several Silicon Valley companies invested as much as $200 million to launch a packaging plant in Hanoi, Vietnam. The company, Vietnam-Chipscale Advanced Packaging Services (V-Caps) will involve executives from the Silicon Valley region and the local industry in Vietnam, and could employ up to 1,500 workers initially.

Henkel Adds N.A. Distributor

08/03/2007  Henkel Corporation partnered with Production Automation Corporation (PAC), extending its distribution network in the U.S. and Mexico. PAC will market and support Henkel's Hysol, Loctite, and Multicore electronics assembly and semiconductor packaging materials.

Outsourced Packaging Outgrowing In-house

08/03/2007  BCC Research finds, in "The Global Market for Advanced Electronic Packaging," the outsourced semiconductor packaging and test (OSPT) services sector outpacing conventional in-house package-and-test in growth, though outsourcing remains a $16.2B industry compared to $23.3B done in-house. The overall package-and-test market will grow from $38.5B in 2006 to $57.6B by 2011, according to the report.

Flux and Underfill Compatibility in a Lead-free Environment

08/01/2007  Since their introduction nearly 20 years ago, the benefits of integrating flip chips into modern devices have been well proven.

Advantest demos new integrated test cell Solution at SEMICON West

07/31/2007  July 17, 2007 -- /PRNewswire/ -- SAN FRANCISCO, CA -- Advantest Corporation is demonstrating its new, comprehensive hardware and software test cell solution for a range of complex consumer devices at SEMICON West.

Flip Chip Adhesive

07/31/2007  For use in flip chip packaging, EA-6800 and 6900 adhesives are designed for lead-free processing temperatures and fast cure times, respectively. Each adhesive reduces voiding from residual moisture within substrates.

Thin-wafer Handling System

07/31/2007  A polymeric spin-on coating, WaferBOND HT-250, temporarily attaches device substrates to a carrier substrate, enabling wafer thinning and subsequent processing. It will reportedly permit advanced packaging processes such as the creation of through-silicon vias (TSVs), 3D stacking, and other etching, plating, and follow-on processes.

SUSS spins off device bonder unit

07/27/2007  July 27, 2007 - SUSS MicroTec has carved out its device bonder division through a management buyout initiated by SUSS France president Gael Schmidt, in order to gain independence from the parent company which has little strategic synergies.

Gartner Predicts Tempered Expansion

07/25/2007  Three semiconductor manufacturing facilities, all in China, began production in the second quarter of 2007; however, generally slow growth in semiconductors will keep the packaging-and-test sector from meeting growth levels set in 2006, according to Gartner Inc.'s report "Semiconductor Packaging, Assembly, and Test Facilities: Worldwide, Q'03 2007."

RFMD Expands China Packaging

07/23/2007  RF Micro Devices, Inc. (RFMD), will expand its Beijing, China, facility with increased capacity and new advanced packaging processes to enable flip chip, wire bond, test capabilities, and proprietary self-shielding RF assemblies.

IBM, SUSS ramp C4NP pilot line

07/20/2007  July 20, 2007 - IBM is now ramping pilot production of its first controlled collapse chip connection new process (C4NP) production line in East Fishkill, NY, just over a year after completing initial reliability testing for 300mm C4NP solder-bumped wafers.

TechXPOT Focus: Packaging Material Trends

07/20/2007  By Françoise von Trapp, managing editor, Advanced Packaging

Material science has a firm foothold in the future of advanced packaging. At SEMICON West's Wednesday, July 18, Packaging Materials Trends TechXPOT, sponsored by IMAPS, industry experts shared insights and developments in packaging materials, their applications, and how these innovations will help device packaging address functionality, form factor, and reliability challenges.

Universal Launches Monthly Seminars With Flip Chip

07/20/2007  Universal Instruments will hold a free seminar August 10, 2007, at its Advanced Process Laboratory in Shanghai, focusing on flip chip assembly processes, materials, and requirements. The seminar is open to customers and all interested parties.

Materials establishing firm foothold in advanced packaging

07/19/2007  At Wednesday's (July 18) Packaging Materials Trends TechXPOT, sponsored by IMAPS, industry experts shared insights and developments in packaging materials and applications, and how innovations will help device packaging address functionality, form factor, and reliability challenges.

SEMICON Attendees Choose ACA Winners

07/19/2007  Advanced Packaging and Solid State Technology Magazines presented the Attendee's Choice Awards (ACAs) in six front-end and final manufacturing categories to exhibitors at SEMICON West. The awards were voted on by show attendees, and presented on the tradeshow floor.

Vistec combines litho groups

07/19/2007  July 18, 2007 - Vistec Semiconductor Systems says it will combine its electron beam and lithography business groups in order to "better meet customers' requirements and improve synergy across the organization."

SEMICON WEST REPORT: Interconnect symposium heralds exciting year

07/18/2007  Participants in Tuesday's Interconnect Symposium hosted by Kulicke & Soffa and Advanced Packaging magazine, examined a list of trends, challenges, and opportunities in advanced packaging (e.g., wire-bonding and flip-chips) that are being thrust into the semiconductor manufacturing spotlight. "If you're an advanced packaging engineer, you're finally getting the recognition you deserve," noted TechSearch International president E. Jan Vardemann.

Amkor, IMEC sign agreement for 3D WLP

07/18/2007  July 18, 2007 - At SEMICON West, Amkor Technology Inc., a provider of advanced semiconductor assembly and test services, and IMEC, the independent nanoelectronics and nanotechnology research center based in Belgium, announced that they have entered into a 2-year collaboration agreement. They will develop cost-effective, 3D integration technology based on wafer-level processing techniques.




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Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

Date and time TBD

As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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