Wafer Level Packaging

WAFER LEVEL PACKAGING ARTICLES



Robert Haavind Wins ASBPE Gold

08/10/2006  Robert Haavind, editorial director for Solid State Technology Magazine, received a national gold award from the American Society of Business Press Editors (ASBPE). Haavind's editorials in the September 2005 and November 2005 issues of Solid State Technology — titled "Educating innovators" and "The future of energy" — were chosen as the best editorials for all business-to-business (B2B) magazines with a circulation under 80,000.

IMAPS Consolidates ITRS and iNEMI Roadmaps

08/09/2006  The IMAPS Global Business Council (GBC) will undertake a project to interpret industry roadmaps' coverage of semiconductor packaging challenges. IMAPS began a study of two widely-used industry roadmaps — the International Technology Roadmap for Semiconductors (ITRS) and the roadmap of the International Electronics Manufacturing Initiative (iNEMI) — after discussions at IMAPS GBC workshops, and with their National Technical Committee (NTC).

SST's Haavind wins Gold at ASBPE awards

08/04/2006  August 4, 2006 - Solid State Technology editorial director Bob Haavind has won a gold national award from the American Society of Business Publication Editors (ASBPE), for two of his editorials in SST's September and November 2005 issues, addressing topics in education and government.

Metamorphosis

08/01/2006  maybe it was the beautiful summer weather, or the fact that I took the elevator instead of the stairs — coming into the building that way reminded me of the first time I walked into the building for my job interview almost exactly a year ago.

Freescale touts "breakthrough" packaging replacement for BGA, flip-chip

07/25/2006  July 25, 2006 - Freescale Semiconductor says it has developed a new "redistributed chip packaging" technology that could replace ball grid array (BGA) and flip-chip for packaging and assembly, and claims to have already fabricated a device targeting use in mobile phones.

EV Group and Brewer Science Seek Handling Solution

07/21/2006  EV Group, which specializes in wafer bond systems, and Brewer Science Inc., a multidivisional technology company, are co-developing a solution for handling ultra-thin wafers. EV Group and Brewer Science's research for high-temperature advanced packaging processes involves temporary wafer bonding for the ultra-thin wafers.

EV Group, Brewer collaborate on ultrathin wafer solution

07/20/2006  EV Group (EVG), based in St. Florian/Inn, Austria, and Brewer Science, based in Rolla, Mo., announced that they are co-developing a solution for the handling of ultrathin wafers that will allow high-temperature advanced packaging processes using a temporary wafer bonding system.

EV, Brewer system targets ultrathin wafer handling

07/19/2006  July 19, 2006 - Austria's EV Group and US-based Brewer Science Inc. say they are codeveloping a temporary wafer-bonding system for handling ultrathin wafers, designed to allow high-temperature advanced packaging processes followed by quick debonding.

Structural Desiccants

07/17/2006  Designed to protect semiconductors in sealed environments that are vulnerable to moisture ingress through packaging material, NatraSorb 900 and Multiform desiccants remove water vapor and provide crush-resistance at up to 8,000 lb per in2. Multisorb produces the desiccants in pre-molded shapes or blanks for custom fabrication, to be integrated into semiconductor or packaging design.

Advanced Packaging Award Winners Lauded

07/14/2006  Advanced Packaging Magazine announced its Sixth Annual Advanced Packaging Awards recipients during a presentation at the San Francisco Museum of Modern Art on July 12, 2006. The nominees gathered at the Wattis Theater to accept awards and mingle at a reception that followed.

Lead-free Wave Solder Alloy Gets Nod

07/13/2006  LG Electronics DS Division approved the ALPHA Vaculoy SACX lead-free alloy, from Cookson Electronics Assembly Materials, for wave solder. They will use it as their lead-free wave solder in the CD-ROM division. The alloy demonstrates faster wetting speeds and lowered bridging defects, according to the company.

Substrate Possibilities and Limitations

07/03/2006  By Meredith Courtemanche, assistant editor

A recent report analyzing delivery time length and prices of laminate flip chip build-up substrates found that increased demand for the substrate in 2005 created supply deficiencies. TechSearch International, who created the report, expects the problem to continue through 2006, and possibly into 2007 and 2008 as well.

Flip Chip Technology

07/01/2006  Mainstream At Last

Advanced Packaging: on the road again

07/01/2006  We had such a great time, met such interesting people, and learned so much on our first Roadshow trip that we knew it was just the beginning of a great new element of Advanced Packaging.

Cadence and ARC Unite Against Sub-100-nm Problems

06/30/2006  Sub-100-nm processes require extra attention to ensure that designs are manufacturable with acceptable yield. Cadence Design Systems and ARC address this situation by integrating the Cadence Encounter digital IC design platform into ARC's ARChitect processor configuration tool. "The product integration will really help designers," said Lou Scheffer at Cadence.

ASE gains $247M in facility fire settlement

06/28/2006  June 28, 2006 - Semiconductor packaging service provider Advanced Semiconductor Engineering Inc. has reached a final settlement with nine insurance companies regarding a fire at its facilities in Chung-Li in May 2005.

Tegal Announces Cluster Tool Sale

06/20/2006  Tegal Corp announced that a global leader in wafer-level packaging (WLP) purchased its Endeavor AT PVD cluster tool for under-bump metallization (UBM). Sputtered Films, a subsidiary of Tegal, received the order. The cluster tool is reportedly the fifth of its kind this customer has ordered.

Another Word on Nano

06/06/2006  The day after I wrote my last editorial entitled Nano-inspiration, I attended the MEMS and Nanotechnology session at the IMAPS New England Symposium, May 16, in Boxborough, MA. There was so much discussion about nano-hype, multiple definitions of nano, how nanomaterials are made, and what you can do with them that I wished the session had occurred a few days earlier.

SEMI Holds Meeting on MEMS Packaging Standards

06/06/2006  (June 6, 2006) SAN JOSE, CA — If you're like most people who responded to SEMI's survey on MEMS packaging standards, you're not aware that SEMI has published three MEMS-related standards. Existing standards cover microscale fluidic systems, terminology, and wafer bonding. SEMI's MEMS technical committee has identified MEMS packaging as a task force area, and standardization efforts are just beginning.




WEBCASTS



Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

Date and time TBD

As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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