Wafer Level Packaging

WAFER LEVEL PACKAGING ARTICLES



Bare die will shine on

09/01/2000  Circuit manufacturers are more accepting of bare die than they were in the past

Lost in the PR labyrinth

09/01/2000  How does a new product or technology reach its customers, gain a strong market share or become an industry standard?

K&S Receives $15 Million Order from ChipPAC

08/31/2000  New York -- August 29, 2000 --Kulicke & Soffa Industries Inc. said it received a $15 million order for its Model 8028 IC Ball Bonders from ChipPAC Inc.

Amkor, Toshiba Plan Japanese Packaging and Testing Venture

08/28/2000  ;Aug. 28, 2000—In a move to gain a strategic advantage in Japan, Amkor Technology Inc. today announced plans to create a joint semiconductor packaging and testing venture with Toshiba Corp.

Zuken USA Wins $1 Million Order from Medtronic

08/23/2000  SANTA CLARA, Calif.--Aug. 23, 2000--Zuken USA is announcing an order valued at $1 million from medical electronics device manufacturer Medtronics for its CR-5000 Advanced Packaging solution.

Companies Complete Flip Chip Technology Transfer

08/03/2000  KAOHSIUNG, Taiwan--August 2, 2000--Advanced Semiconductor Engineering flip chip factory has received wafer bumping and redistribution technology from Kulicke & Soffa Industries and Flip Chip Technologies.

Pizza Contest in Pizza Bay

08/01/2000  Five pizza companies - Andy's, Bebe's, Cassidy's, Denzy's and Elsie's - submitted 5 pizzas each, with toppings of pepperoni, bologna, cheese, anchovies and pineapple, for the Annual Best Pizza Contest held in Pizza Bay

Making connections... across the board

08/01/2000  When I was first introduced to the semiconductor packaging industry, my colleagues educated me about interconnection technologies - gave me a crash course on ICs and PCBs, and loaded me down with jargon

STATS Introduces Upgraded RF Test Capability

08/01/2000  SINGAPORE and MILPITAS, Calif.--July 31, 2000--With demand rising for high-speed testing, independent semiconductor test and advanced packaging service provider ST Assembly Test Services (STATS) is expanding its RF test development and production testing capabilities to support frequencies up to 6 GHz.

Ultratech Named Exclusive Lithography Supplier by IEP/Casio

07/11/2000  SEMICON West '00--July 11, 2000--Ultratech Stepper Inc. has been awarded exclusive supplier status by IEP/Casio (Integrated Electronics & Packaging Technologies Inc.).

STATS Adds Agilent's VLSI Test Platform

06/16/2000  MILPITAS, CA--June 16, 2000--Test and advanced packaging service provider ST Assembly Test Services (STATS) has installed Agilent's 83000 VLSI test platform in its Test Development Center. The center is located in San Jose, Calif.

The School Break

06/01/2000  "I know that you wanted only 10, 100, 10K and 100K Ohm resistors for your school project (SP), but I bought a box that contains more than the quantities you need, as well as several resistors of other values," said Tom's dad

Christmas in July

06/01/2000  Every summer in Chicago, there's a special occasion called Christmas in July - a non-secular event during which companies and individuals donate their time to volunteer in their communities

About the Site

06/01/2000  Advanced Packaging serves those in operations that integrate electronic component packages into circuitry of their end products. Advanced Packaging magazine debuted in 1992 to the IC packaging engineering community.

Editorial

05/01/2000  It was a pleasure to meet you...

The springtime swirl

04/01/2000  As springtime activities spin around us, everyone at Advanced Packaging magazine is squeezing in time to dash off to the dry cleaners, pack suitcases and make last-minute limo reservations for the litany of upcoming shows we plan to attend. By the time this issue goes to press, we will have just completed trips to NEPCON West, APEX 2000 and IMAPS` International Symposium on Advanced Packaging Materials. We certainly understand the importance of getting away from our desks and talking with reader

ECTC meets in Las Vegas

04/01/2000  The Electronic Components and Technology Conference (ECTC) will celebrate its 50th anniversary May 21-24 at Caesar`s Palace in Las Vegas. The conference is expected to attract more than 800 designers, engineers and technical managers from the packaging, components and materials segments of the electronics industry. The meeting features more than 300 technical papers, short courses, a review of educational programs and initiatives in packaging, and a technology corner featuring exhibits by leadin

Combo Memory agreement

04/01/2000  APack Technologies Inc., the first wafer bumping and flip chip foundry service provider in Taiwan, signed a memorandum of understanding (MOU) with Itochu Corp., Linvex Finet Japan and Siix Corp. for joint development and promotion of Combo Memory to the worldwide market. The Combo Memory module stacks SRAM and flash memory components to fulfill the small form-factor requirement of wireless communication handsets. According to the MOU, APack will provide its packaging design and manufacturing kno

Package or surface mount assembly?

03/01/2000  A client recently posed the question, "Can you help us to define the difference between semiconductor packaging and surface mount assemblies?" "It`s obvious," you say? "Semiconductor packaging deals with bare die and surface mount assembly uses only packaged devices." But upon further consideration, the problem becomes far more complex and depends greatly on the perspective taken. Technically speaking, where would thick and thin film hybrids belong? And multi-layer ceramics? And how about multi-

Letter to the Editor

03/01/2000  I was pleased to see the results of the Third Annual Semi Dice Inc. Bare Die Survey featured in the pages of the November/December issue of your magazine ("CSP No Match for Bare Die"). I want to clarify the results on the survey as they relate to Chip Scale Packaging. CSP is certainly a viable packaging option and has a bright future. The survey results clearly indicate that CSPs will have little impact on the Bare Die Market.




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Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

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As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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