Wafer Processing

WAFER PROCESSING ARTICLES



Backside wafer particle reduction using ionization in PVD

01/20/2011 

Ionizers used in PVD wafer processingIonizers can improve wafer back- and frontside particle performance in PVD processing tools by removing surface charges that hold electrostatically adhered particles. Controlling charges results in higher yields for chip manufacturers and improved tool performance. Viraj Pandit and Emery Kuo, Novellus Systems and Cheryl Avery, ION Systems show that the INOVA PVD system’s good particle performance (with good quality wafers) is made more robust with an ionizer installation (with marginal quality wafers).

Flat 2011 wafer fab equipment capex, but look to 193i stepper to step out

01/19/2011 

Semiconductor capital equipment, 4Q10: strength through 2013, then retrenchment. Source: Gartner.Wafer fab capex in 2011 is expected to stick around 2010 levels. But don't despair of growth, says Dean Freeman of Gartner. For one thing, cutting-edge wafer fab equipment will be hot. On top of that, 2011 will be a brief respite, with a strong 2012/2013 waiting in the wings.

450mm-TSV-EUV-transitions-SEMATECH-Armbrust

01/19/2011 

SEMATECH January 2011Dan Armbrust, SEMATECH, spoke about the role of collaboration in his SEMI Industry Strategy Symposium presentation. Significant technology transitions facing the semiconductor industry include lithography (introduction of EUV), interconnects (TSVs and 3D packaging), and productivity (450mm wafer manufacturing). Additionally, disruptive technology in logic and memory devices will challenge the industry.

Packaging, assembly changes coming in next ITRS Update

01/19/2011 

Dr. Phil Garrou looks ahead to a laundry list of changes coming in the next ITRS Update with respect to assembly and advanced packaging, including 3D integration, interposers, and applications from medical to automotive and embedded applications.

 

Advanced packaging collab Rudolph Technologies process tool supplier IC device manufacturer for defect inspection wafer debonding

01/18/2011 

The development effort involves the integration of defect inspection with a debonding tool. Manufacturing efficiencies, along with the ability to handle ultra-thin wafers, necessitates the integration of inspection in de-bonding applications. Rudolph is bringing its inspection technologies to this three-way collaboration to provide this integrated process control solution.

ITRS 2010: Taking on the energy challenge

01/18/2011 

For the first time, the newly updated International Technology Roadmap for Semiconductors (ITRS) overtly addresses energy consumption. Laura Peters looks at how the ITRS maps out the influence that devices can have on power consumption in various applications, and long-term goals for developing energy-efficient materials and devices.

STATS ChipPAC expands wafer level packaging WLP with 300mm line

01/18/2011 

STATS ChipPAC Ltd. (SGX-ST:STATSChP), semiconductor test and advanced packaging service provider, expanded its wafer level package (WLP) offering with new 300mm manufacturing capabilities in Taiwan.

Toppan, IBM focus 14nm photomask JV on ArF immersion lithography

01/17/2011 

Toppan Printing Co. Ltd. extended a joint development agreement with IBM for leading-edge photomask process, covering the 14nm technology node for logic devices. Toppan and IBM will focus their joint development efforts on ArF immersion lithography for the 14nm node.

Chipscale packaging tech garners SEMI award

01/17/2011 

SEMI named Thomas DiStefano, John W. Smith Jr., and Michael Warner as recipients of the 2010 SEMI Award for North America for contributions to the development and commercialization of Micro Ball Grid Array (μBGA) technology.

Below 22nm, spacers get unconventional

01/13/2011 

IEDM Spacer discussionSpacers are considered "conventional materials," and thus an odd topic for the cutting-edge IEDM. ASM CTO Ivo Raaijmakers points out that semiconductor fab below 22nm will require different processes for spacers: atomic layer deposition (ALD) and plasma-enhanced ALD (PEALD).

Heated vacuum-chuck increases control with thin substrate coating, says USI

01/13/2011 

Ultrasonic Systems, Inc. (USI) released a heated vacuum chuck option for the Prism spray coating system. The heated vacuum chuck option for Prism suits thin substrate, wafer, foil, and membrane coating applications, where it enhances control of the substrate.

Tooling and process technology vital for thin packages

01/11/2011 

Getting thinner appears to be the goal driving the market in both the wafer-level and substrate-level sectors, and innovative tooling and process technology will become paramount in addressing thinned packaging and ramping up to volume reliably, writes Dave Foggie from DEK.

22nm brings maskmakers, end users closer

01/11/2011 

The conditions and challenges at the 22nm technology node are becoming clear: double patterning, source-mask optimization are becomign pervasive, EUV is on the doorstep, and they will all have significant impact on mask manufacturers, writes Franklin Kalk from Toppan Photomasks.

22nm: The era of wafer bonding

01/11/2011 

The migration to the 22nm node is about more than just scaling down, it's also about scaling up with thinner devices stacked into a single package -- and these require new manufacturing considerations with wafer bonding playing a central role, writes Bioh Kim from EV Group.

Keys to CMP and cleans in 2011

01/11/2011 

Robert L. Rhoades, Entrepix, examines the ever-shrinking contamination particle size, and the switch from immersion cleans to single-wafer systems. Custom solutions and new materials at the 22nm wafer fab will mean custom CMP and clean formulations -- if possible, tunable by the user. This is an online exclusive essay in SST's Forecast for 2011: Back to Reality series.

Failure analysis challenges at 22nm turnkey FA tools

01/11/2011 

Paul Kirby, FEI, provides insights on the shift to complex 3D device structures and complex interconnect methods such as TSV. In the future, 3D analysis techniques could play increasingly important roles, he says. In advanced packaging, failure analysis is more critical because multi-die stacks can fail due to one bad die. This is an online exclusive essay in SST's Forecast for 2011: Back to Reality series.

Materials forecast for 22nm devices

01/11/2011 

Weimin Li, ATMI, looks at changes in the materials side of wafer fab that might occur in 2011, especially for advanced DRAM devices. For every evolutionary change or radical new method, cost and performance considerations are high. This is an online exclusive essay in SST's Forecast for 2011: Back to Reality series.

China WLCSP established R and D subsidiary in CA

01/10/2011 

China WLCSP Co. Ltd., provider of wafer level (WLP) miniaturization technologies for the electronics industry, confirmed its commitment to the US market with the opening of a new R&D center in Sunnyvale, CA.

Addressing defectivity will require new surface-engineering processes at 22nm

01/10/2011 

Gilles Baujon, CEO of Nanoplas, explains how the industry's migration toward the 32nm and 22nm nodes will require development of new process integration schemes, device structures, new materials assemblies -- and thus innovative surface-engineering solutions.

CyberOptics Semiconductors vibration monitoring software

01/07/2011 

CyberOptics Semiconductors updated its wafer vibration monitoring softwareCyberOptics Semiconductors updated its wafer vibration monitoring software, offering new capabilities for data analysis and third-party data interfaces. CyberOptics’ AVS 2.0 vibration monitoring software provides engineers with the data needed to predict equipment failures related to vibration during semiconductor fabrication to improve process yield and cycle times.




WEBCASTS



Environment, Safety & Health

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The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

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As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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