Wafer Processing

WAFER PROCESSING ARTICLES



Leti's 2× wafer-level integration scheme

08/04/2009  André Rouzaud, VP deputy, division heterogeneous integration at Leti, describes two generic integration schemes at the wafer level: one for integrating chips from different sources without design access, another for those with design access. He also addresses thin wafer handling.

FEI's Tecnai Osiris S/TEM goes for speed in analytics

08/03/2009  FEI exec Joseph Race shows how the company's Tecnai Osiris scanning/transmission electron microscope (S/TEM) addresses an emerging need amid device-size shrink and proliferation of new semiconductor materials: a tool that combines the ease-of-use of EDX analytics with an elemental mapping speed comparable to STEM imaging.

Progress in open-architecture 3D/TSV

07/28/2009  Hans Stork, Group VP & CTO at Applied Materials discusses the progress being made in developing cost-effective 3D/TSV solutions. In particular, the company is working in an open architecture environment to ensure complete solutions are ready for end users.

Market shuffle, maturity compounds foundry woes

07/28/2009  Foundries have been growing at a better rate than the semiconductor industry for several years, but the global economic quagmire compounds a fundamental restructuring of the pure-play contract chipmaking sector centered on how to deal with facilities being made obsolete in the changing marketplace, according to a new report from iSuppli.

Analyst: Solar inventory piling up

07/28/2009  Inventories are spiking in the solar supply chain due to oversupply coupled with lackluster demand, and the glut will cause price erosion from raw materials to cells, according to a report from iSuppli.

Going green gives new life to reclaimed silicon

07/27/2009  ATMI exec Tod Higinbotham describes his company's latest "green" product, unveiled at SEMICON West: the RegenSi 74, an improvement to its advanced test wafer recycle and reclaim products that it claims can cut film removal cycle times in half and greatly reduce the amount of chemicals required for wafer reclamation.

FEI uncrates new TEM

07/21/2009  July 20, 2009: FEI Corp. has unveiled a new scanning/transmission electron microscope (S/TEM) that it says "dramatically increases productivity" for analysis work in applications such as semiconductor manufacturing and materials analysis.

EVG, AMAT pair for 3D thin-wafer bonding

07/17/2009  EV Group and Applied Materials say they will jointly develop wafer bonding processes for making through-silicon vias (TSV) in 3D IC packaging applications, working as members within the Semiconductor 3D Equipment and Materials Consortium (EMC-3D).

EVG, AMAT pair for 3D thin-wafer bonding

07/17/2009  EV Group and Applied Materials say they will jointly develop wafer bonding processes for making through-silicon vias (TSV) in 3D IC packaging applications, working as members within the Semiconductor 3D Equipment and Materials Consortium (EMC-3D).

Behind the scenes: ISMI's next-gen fab program

07/17/2009  Reducing cycle times by 50%, and costs by 30%, over the next three years is the stated goal of ISMI's next-generation fab (NGF) program. The group provided SST with tidbits from its member discussions on progress in the most important NGF capabilities to drive equipment effectiveness, including continuous processing, data access, and reducing wafer delays and setup times.

Best of West: Going green with DI water clusters

07/16/2009  Improve a process, save money and eliminate waste, with no loss of performance or efficiency, and go green at the same time. They're the reasons Nano Green Technology was awarded SEMI's 2009 Best of West award Wednesday (July 15) at SEMICON West, for its technology that replaces the traditional SC-1 or SC-2 etch-based cleaning process with a megasonics-based solution that relies on water. SST also takes a snapshot of the other Best of West finalists: Alchimer, Gore, IMEC, and K-Patents.

SEMATECH's 450mm progress, next steps

07/16/2009  ISMI provided SST with tidbits from its closed-door discussions on Wednesday centered on the 450mm transition: some supplier selections are complete and >60 are engaged for test wafers, which are slated to distribute in 3Q09.

Double patterning's 22nm win for breakfast

07/16/2009  Franklin Kalk of Toppan Photomasks reports for SST from Wednesday's Sokudo Lithography Breakfast, which offered a buffet of double patterning views as the transition from single-exposure 193i closes in at 40nm half-pitch.

Stepping up to the 3D challenge

07/15/2009  Soitec's president and CEO, André-Jacques Auberton-Hervé, discusses the three pillars of 3D integration at the wafer level, as well as bonding at room temperature. Also noted is Soitec's partnership with IBM, announced during SEMICON West.

Stepping up to the 3D challenge

07/15/2009  Soitec's president and CEO, André-Jacques Auberton-Hervé, discusses the three pillars of 3D integration at the wafer level, as well as bonding at room temperature. Also noted is Soitec's partnership with IBM, announced during SEMICON West.

KLA-Tencor lines up trio of 3X-2X inspection systems

07/14/2009  KLA-Tencor exec Brian Trafas explains what's under the hood of the company's three new tools for defect wafer inspection and review: the 2830, the Puma 9500, and eDR-5210.

Applied debuts "game-changing" wafer tracking system

07/13/2009  Applied Materials has revealed what it calls a "game-changer" for mature fabs: a hardware/software package that integrates with existing MES software to wirelessly track and direct movements for 200mm and 300mm wafer lots.

Cymer ships 75W LPP EUV tool to ASML

07/13/2009  July 13, 2009 - Cymer says it has delivered the world's first fully integrated laser produced plasma (LPP) EUV lithography source to ASML, achieving 75W of full-die exposure power, and says the system will hit 100W "within the current quarter," enabling 60 wafers/hr throughput.

Supply-demand dynamics call 'time' on legacy cell production technology

07/09/2009  Changes in market supply-demand dynamics, coupled with less favorable financing conditions brought on by the current credit crunch climate, are together redefining the type of c-Si production equipment required by cell manufacturers over the next few years, explains Coherent's Finlay Colville.

Reduction of PFC emissions from heat transfer fluids

07/07/2009  This technical brief describes the use of commercially available alternative heat transfer fluids as the basis to reduce greenhouse gas emissions from microelectronic manufacturing facilities that use perfluorocarbons (PFCs) and perfluoropolyethers (PFPEs) by 58% to over 99%.




WEBCASTS



Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

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As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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